Murali Jayapala - researchr alias

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Viewing Publication 1 - 41 from 41

2023

2019

Graph and Rank Regularized Matrix Recovery for Snapshot Spectral Image DemosaicingGrigorios Tsagkatakis, Maarten Bloemen, Bert Geelen, Murali Jayapala, Panagiotis Tsakalides. tci, 5(2):301-316, 2019. [doi]

2016

Characterization of VNIR Hyperspectral Sensors with Monolithically Integrated Optical FiltersPrashant Agrawal, Klaas Tack, Bert Geelen, Bart Masschelein, Pablo Mateo Aranda Moran, Andy Lambrechts, Murali Jayapala. ei-iss 2016: 1-7 [doi]

Non-negative Matrix Completion for the Enhancement of Snapshot Mosaic Multispectral ImageryGrigorios Tsagkatakis, Murali Jayapala, Bert Geelen, Panagiotis Tsakalides. ei-iss 2016: 1-6 [doi]

2011

Automated architecture exploration for low energy reconfigurable AGUIttetsu Taniguchi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai. isocc 2011: 191-194 [doi]

2009

Locality optimization in a compiler for wireless applicationsJaved Absar, Praveen Raghavan, Andy Lambrechts, Min Li, Murali Jayapala, Francky Catthoor. dafes, 13(1-2):53-72, 2009. [doi]

Compilation Technique for Loop Overhead MinimizationNikolas Kroupis, Praveen Raghavan, Murali Jayapala, Francky Catthoor, Dimitrios Soudris. dsd 2009: 419-426 [doi]

Interconnect Exploration for Energy Versus Performance Tradeoffs for Coarse Grained Reconfigurable ArchitecturesAndy Lambrechts, Praveen Raghavan, Murali Jayapala, Bingfeng Mei, Francky Catthoor, Diederik Verkest. tvlsi, 17(1):151-155, 2009. [doi]

Distributed Loop Controller for Multithreading in Unithreaded ILP ArchitecturesPraveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest. TC, 58(3):311-321, 2009. [doi]

Playing the trade-off game: Architecture exploration using CoffeeePraveen Raghavan, Murali Jayapala, Andy Lambrechts, Javed Absar, Francky Catthoor. todaes, 14(3), 2009. [doi]

EMPIRE: Empirical power/area/timing models for register filesPraveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest. mam, 33(4):295-300, 2009. [doi]

Reconfigurable AGU: An Address Generation Unit Based on Address Calculation Pattern for Low Energy and High Performance Embedded ProcessorsIttetsu Taniguchi, Praveen Raghavan, Murali Jayapala, Francky Catthoor, Yoshinori Takeuchi, Masaharu Imai. ieicet, 92-A(4):1161-1173, 2009. [doi]

Systematic architecture exploration based on optimistic cycle estimation for low energy embedded processorsIttetsu Taniguchi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai. aspdac 2009: 449-454 [doi]

2008

Operation shuffling over cycle boundaries for low energy L0 clusteringYuki Kobayashi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Masaharu Imai. asap 2008: 150-155 [doi]

Efficient Method to Generate an Energy Efficient Schedule Using Operation ShufflingYuki Kobayashi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Masaharu Imai. ieicet, 91-A(2):604-612, 2008. [doi]

Energy-Aware Interconnect Optimization for a Coarse Grained Reconfigurable ProcessorAndy Lambrechts, Praveen Raghavan, Murali Jayapala, Francky Catthoor, Diederik Verkest. vlsid 2008: 201-207 [doi]

Coffee: COmpiler Framework for Energy-Aware ExplorationPraveen Raghavan, Andy Lambrechts, Javed Absar, Murali Jayapala, Francky Catthoor, Diederik Verkest. hipeac 2008: 193-208 [doi]

Address Generation Optimization for Embedded High-Performance Processors: A SurveyGuillermo Talavera, Murali Jayapala, Jordi Carrabina, Francky Catthoor. vlsisp, 53(3):271-284, 2008. [doi]

2007

Locality optimization in wireless applicationsJaved Absar, Min Li, Praveen Raghavan, Andy Lambrechts, Murali Jayapala, Arnout Vandecappelle, Francky Catthoor. codes 2007: 125-130 [doi]

Architectures and Circuits for Software-Defined Radios: Scaling and Scalability for Low Cost and Low EnergyLiesbet Van der Perre, Bruno Bougard, Jan Craninckx, Wim Dehaene, Lieven Hollevoet, Murali Jayapala, Pol Marchal, M. Miranda, Praveen Raghavan, Thomas Schuster, Piet Wambacq, Francky Catthoor, Peter Vanbekbergen. isscc 2007: 568-569 [doi]

Methodology for operation shuffling and L0 cluster generation for low energy heterogeneous VLIW processorsYuki Kobayashi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Masaharu Imai. todaes, 12(4):41, 2007. [doi]

Semi Custom Design: A Case Study on SIMD ShufflersPraveen Raghavan, Nandhavel Sethubalasubramanian, Satyakiran Munaga, Estela Rey Ramos, Murali Jayapala, Oliver Weiss, Francky Catthoor, Diederik Verkest. patmos 2007: 433-442 [doi]

A Customized Cross-Bar for Data-Shuffling in Domain-Specific SIMD ProcessorsPraveen Raghavan, Satyakiran Munaga, Estela Rey Ramos, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest. arcs 2007: 57-68 [doi]

Very wide register: an asymmetric register file organization for low power embedded processorsPraveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest, Henk Corporaal. date 2007: 1066-1071 [doi]

2006

Instruction Transfer And Storage Exploration for Low Energy VLIWsTom Vander Aa, Murali Jayapala, Henk Corporaal, Francky Catthoor, Geert Deconinck. sips 2006: 292-297 [doi]

Distributed loop controller architecture for multi-threading in uni-threaded VLIW processorsPraveen Raghavan, Andy Lambrechts, Murali Jayapala, Francky Catthoor, Diederik Verkest. date 2006: 339-344 [doi]

2005

Instruction buffering exploration for low energy embedded processorsTom Vander Aa, Murali Jayapala, Francisco Barat, Geert Deconinck, Rudy Lauwereins, Henk Corporaal, Francky Catthoor. jec, 1(3):341-351, 2005. [doi]

Clustered Loop Buffer Organization for Low Energy VLIW Embedded ProcessorsMurali Jayapala, Francisco Barat, Tom Vander Aa, Francky Catthoor, Henk Corporaal, Geert Deconinck. TC, 54(6):672-683, 2005. [doi]

Operation Shuffling for Low Energy L0 Cluster Generation on Heterogeneous VLIW ProcessorsYuki Kobayashi, Murali Jayapala, Praveen Raghavan, Francky Catthoor, Masaharu Imai. estimedia 2005: 81-86 [doi]

Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video ApplicationAndy Lambrechts, Praveen Raghavan, Anthony Leroy, Guillermo Talavera, Tom Vander Aa, Murali Jayapala, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frédéric Robert, Jordi Carrabina. asap 2005: 179-184 [doi]

2004

Instruction buffering exploration for low energy VLIWs with instruction clustersTom Vander Aa, Murali Jayapala, Francisco Barat, Geert Deconinck, Rudy Lauwereins, Francky Catthoor, Henk Corporaal. aspdac 2004: 824-829 [doi]

L0 buffer energy optimization through scheduling and explorationMurali Jayapala, Tom Vander Aa, Francisco Barat, Geert Deconinck, Francky Catthoor, Henk Corporaal. SAC 2004: 905-906 [doi]

L0 Cluster Synthesis and Operation ShufflingMurali Jayapala, Tom Vander Aa, Francisco Barat, Francky Catthoor, Henk Corporaal, Geert Deconinck. patmos 2004: 311-321 [doi]

Design Style Case Study for Embedded Multi Media Compute NodesAndy Lambrechts, Tom Vander Aa, Murali Jayapala, Guillermo Talavera, Anthony Leroy, Adelina Shickova, Francisco Barat, Bingfeng Mei, Francky Catthoor, Diederik Verkest, Geert Deconinck, Henk Corporaal, Frédéric Robert, Jordi Carrabina Bordoll. rtss 2004: 104-113 [doi]

2003

Instruction Buffering Exploration for Low Energy Embedded ProcessorsTom Vander Aa, Murali Jayapala, Francisco Barat, Geert Deconinck, Rudy Lauwereins, Henk Corporaal, Francky Catthoor. patmos 2003: 409-419 [doi]

Low Power Coarse-Grained Reconfigurable Instruction Set ProcessorFrancisco Barat, Murali Jayapala, Tom Vander Aa, Rudy Lauwereins, Geert Deconinck, Henk Corporaal. fpl 2003: 230-239 [doi]

2002

2001

CRISP: A Template for Reconfigurable Instruction Set ProcessorsPieter Op de Beeck, Francisco Barat, Murali Jayapala, Rudy Lauwereins. fpl 2001: 296-305 [doi]

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