Ravi R. Iyer - researchr alias

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Viewing Publication 1 - 52 from 52

2022

DPM-NFV: Dynamic Power Management Framework for 5G User Plane Function using Bayesian OptimizationJaroslaw Sydir, Bin Li 0018, Pietro Mercati, Charlie Tai, Ravi R. Iyer, Michael Kishinevsky, Boris Serafimov. globecom 2022: 4099-4105 [doi]

2021

2020

RLDRM: Closed Loop Dynamic Cache Allocation with Deep Reinforcement Learning for Network Function VirtualizationBin Li 0018, Yipeng Wang 0002, Ren Wang 0001, Charlie Tai, Ravi R. Iyer, Zhu Zhou, Andrew Herdrich, Tong Zhang, Ameer Haj Ali, Ion Stoica, Krste Asanovic. netsoft 2020: 335-343 [doi]

2019

Neural Cache: Bit-Serial In-Cache Acceleration of Deep Neural NetworksCharles Eckert, Xiaowei Wang, Jingcheng Wang, Arun Subramaniyan 0001, Dennis Sylvester, David T. Blaauw, Reetuparna Das, Ravi R. Iyer. micro, 39(3):11-19, 2019. [doi]

Bit Prudent In-Cache Acceleration of Deep Convolutional Neural NetworksXiaowei Wang, Jiecao Yu, Charles Augustine, Ravi R. Iyer, Reetuparna Das. hpca 2019: 81-93 [doi]

2018

2011

Low-Power, Resilient Interconnection with Orthogonal Latin SquaresSeung Eun Lee, Yoon Seok Yang, G. S. Choi, Wei Wu, Ravi R. Iyer. dt, 28(2):30-39, 2011. [doi]

RAFT: A router architecture with frequency tuning for on-chip networksAsit K. Mishra, Aditya Yanamandra, Reetuparna Das, Soumya Eachempati, Ravi R. Iyer, Narayanan Vijaykrishnan, Chita R. Das. jpdc, 71(5):625-640, 2011. [doi]

2009

2008

2007

I/O processing in a virtualized platform: a simulation-driven approachVineet Chadha, Ramesh Illikkal, Ravi R. Iyer, Jaideep Moses, Donald Newell, Renato J. O. Figueiredo. vee 2007: 116-125 [doi]

QoS policies and architecture for cache/memory in CMP platformsRavi R. Iyer, Li Zhao, Fei Guo, Ramesh Illikkal, Srihari Makineni, Donald Newell, Yan Solihin, Lisa R. Hsu, Steven K. Reinhardt. sigmetrics 2007: 25-36 [doi]

Accelerating Full-System Simulation through Characterizing and Predicting Operating System PerformanceSeongbeom Kim, Fang Liu, Yan Solihin, Ravi R. Iyer, Li Zhao, W. Cohen. ispass 2007: 1-11 [doi]

Understanding the Memory Performance of Data-Mining Workloads on Small, Medium, and Large-Scale CMPs Using Hardware-Software Co-simulationWenlong Li, Eric Li, Aamer Jaleel, Jiulong Shan, Yurong Chen, Qigang Wang, Ravi R. Iyer, Ramesh Illikkal, Yimin Zhang, Dong Liu, M. Liao, Wei Wei, Jinhua Du. ispass 2007: 35-43 [doi]

qTLB: Looking Inside the Look-Aside BufferOmesh Tickoo, Hari Kannan, Vineet Chadha, Ramesh Illikkal, Ravi R. Iyer, Donald Newell. hipc 2007: 107-118 [doi]

Hardware Support for Accelerating Data Movement in Server PlatformLi Zhao, Laxmi N. Bhuyan, Ravi R. Iyer, Srihari Makineni, Donald Newell. TC, 56(6):740-753, 2007. [doi]

Exploring Large-Scale CMP Architectures Using ManySimLi Zhao, Ravi R. Iyer, Jaideep Moses, Ramesh Illikkal, Srihari Makineni, Donald Newell. micro, 27(4):21-33, 2007. [doi]

Constraint-Aware Large-Scale CMP Cache DesignLi Zhao, Ravi R. Iyer, Srihari Makineni, Ramesh Illikkal, Jaideep Moses, Donald Newell. hipc 2007: 161-171 [doi]

Exploring DRAM cache architectures for CMP server platformsLi Zhao, Ravi R. Iyer, Ramesh Illikkal, Donald Newell. iccd 2007: 55-62 [doi]

CacheScouts: Fine-Grain Monitoring of Shared Caches in CMP PlatformsLi Zhao, Ravi R. Iyer, Ramesh Illikkal, Jaideep Moses, Srihari Makineni, Donald Newell. IEEEpact 2007: 339-352 [doi]

2006

2005

2004

Architectural Characterization of an XML-Centric Commercial Server WorkloadPadma Apparao, Ravi R. Iyer, Ricardo Morin, Naren Nayak, Mahesh Bhat, David Halliwell, William Steinberg. icpp 2004: 292-300 [doi]

CQoS: a framework for enabling QoS in shared caches of CMP platformsRavi R. Iyer. ics 2004: 257-266 [doi]

Characterization and Evaluation of Cache Hierarchies for Web ServersRavi R. Iyer. www, 7(3):259-280, 2004. [doi]

Architectural Characterization of TCP/IP Packet Processing on the Pentium M MicroprocessorSrihari Makineni, Ravi R. Iyer. hpca 2004: 152-163 [doi]

ASPEN: Towards Effective Simulation of Threads and Engines in Evolving PlatformsJaideep Moses, Ramesh Illikkal, Ravi R. Iyer, Ram Huggahalli, Donald Newell. mascots 2004: 51-58 [doi]

TCP Onloading for Data Center ServersGreg J. Regnier, Srihari Makineni, Ramesh Illikkal, Ravi R. Iyer, Dave B. Minturn, Ram Huggahalli, Donald Newell, Linda S. Cline, Annie Foong. Computer, 37(11):48-58, 2004. [doi]

2003

On Modeling and Analyzing Cache Hierarchies using CASPERRavi R. Iyer. mascots 2003: 182-187 [doi]

2002

Comparing the Memory System Performance of DSS Workloads on the HP V-Class and SGI Origin 2000Rong Yu, Laxmi N. Bhuyan, Ravi R. Iyer. ipps 2002: [doi]

2001

Exploring the Cache Design Space for Web ServersRavi R. Iyer. ipps 2001: 67

2000

Impact of CC-NUMA Memory Management Policies on the Application Performance of Multistage Switching NetworksLaxmi N. Bhuyan, Ravi R. Iyer, Hu-Jun Wang, Akhilesh Kumar. tpds, 11(3):230-246, 2000. [doi]

Using Switch Directories to Speed Up Cache-to-Cache Transfers in CC-NUMA MultiprocessorsRavi R. Iyer, Laxmi N. Bhuyan, Ashwini K. Nanda. ipps 2000: 721-728 [doi]

Design and Evaluation of a Switch Cache Architecture for CC-NUMA MultiprocessorsRavi R. Iyer, Laxmi N. Bhuyan. TC, 49(8):779-797, 2000. [doi]

1999

Switch Cache: A Framework for Improving the Remote Memory Access Latency of CC-NUMA MultiprocessorsRavi R. Iyer, Laxmi N. Bhuyan. hpca 1999: 152-160 [doi]

Comparing the memory system performance of the HP V-class and SGI Origin 2000 multiprocessors using microbenchmarks and scientific applicationsRavi R. Iyer, Nancy M. Amato, Lawrence Rauchwerger, Laxmi N. Bhuyan. ics 1999: 339-347 [doi]

1998

Impact of Switch Design on the Application Performance of Cache-Coherent MultiprocessorsLaxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhilesh Kumar. ipps 1998: 466-474 [doi]

1997

Performance of Multistage Bus Networks for a Distributed Shared Memory MultiprocessorLaxmi N. Bhuyan, Ravi R. Iyer, Tahsin Askar, Ashwini K. Nanda, Mohan Kumar. tpds, 8(1):82-95, 1997. [doi]

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