Vinod Menezes - researchr alias

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Viewing Publication 1 - 16 from 16

2022

A Multibit MAC Scheme using Switched Capacitor based 3C Multiplier for Analog Compute In-Memory ArchitectureNeha Gupta, Ashish Joshi, Dinesh Kushwaha, Vinod Menezes, Rashmi Sachan, Sudeb Dasgupta, Anand Bulusu. icecsys 2022: 1-4 [doi]

2021

150nA IQ, Quad Input - Quad Output, Intelligent Integrated Power Management for IoT ApplicationsVipul Singhal 0001, Rajat Chauhan, Vinod Menezes, R. R. Manikandan, Raveesh Magod, Mahesh Mehendale, Anantha Chandrakasan. vlsid 2021: 169-174 [doi]

2019

Analysis and Design of Cyclic Switched-Capacitor DC-DC ConvertersKishalay Datta, Vinod Menezes, Shanthi Pavan. tcas, 66(8):3227-3237, 2019. [doi]

Analysis and Design of a Multi-Step Bias-Flip Rectifier for Piezoelectric Energy HarvestingSundeep Javvaji, Vipul Singhal 0001, Vinod Menezes, Rajat Chauhan, Shanthi Pavan. jssc, 54(9):2590-2600, 2019. [doi]

2018

Multi-Step Bias-Flip Rectification for Piezoelectric Energy HarvestingSundeep Javvaji, Vipul Singhal, Vinod Menezes, Rajat Chauhan, Shanthi Pavan. esscirc 2018: 42-45 [doi]

A 1.2 pJ/cycle KHz Timer Circuit for Heavily Duty-Cycled SystemsManikandan R. R., Vipul Kumar Singhal, Rajat Chauhan, Vinod Menezes, Mahesh Mehendale. vlsid 2018: 171-176 [doi]

2015

8.3 A 10.5μA/MHz at 16MHz single-cycle non-volatile memory access microcontroller with full state retention at 108nA in a 90nm processVipul Kumar Singhal, Vinod Menezes, Srinivasa Chakravarthy, Mahesh Mehendale. isscc 2015: 1-3 [doi]

2013

A 40nm 650Mhz 0.5fJ/Bit/Search TCAM Compiler Using Complementary Bit-cell ArchitectureRashmi Sachan, Shahid Ali, Chandan Bist, Sunil Misra, Vinod Menezes, Sharad Gupta, Pat Bosshart. vlsid 2013: 55-59 [doi]

2011

Design and technology interaction beyond 32nmMichael Clinton, Clive Bittlestone, G. Girishankar, Viet Le, Vinod Menezes. cicc 2011: 1-9 [doi]

2009

An enhanced topology for reliability of a high performance 3.3V I/O buffer in a single-well bulk CMOS 1.8v-oxide low voltage processKarthik Rajagopal, Aatmesh, Vinod Menezes. isqed 2009: 103-106 [doi]

2008

A Robust Level-Shifter Design for Adaptive Voltage ScalingAnkur Gupta, Rajat Chauhan, Vinod Menezes, Vikas Narang, H. M. Roopashree. vlsid 2008: 383-388 [doi]

2007

A low-power 333Mbps mobile-double data rate output driver with adaptive feedback to minimize overshoots and undershootsRachit Kumar Gupta, Vikas Narang, H. M. Roopashree, Vinod Menezes. glvlsi 2007: 477-480 [doi]

2005

A high performance, high voltage output buffer in a low voltage CMOS processRajat Chauhan, Karthik Rajagopal, Vinod Menezes, H. M. Roopashree, Sanish Koshy Jacob. cicc 2005: 227-230 [doi]

2003

Optimization of 1.8V I/O circuits for performance, reliability at the 100nm technology nodeVinod Menezes, C. B. Keshav, Sushil Gupta, M. Roopashree, S. Krishnan, A. Amerasekera, G. Palau. vlsid 2003: 122-127 [doi]

1997

Signal compression through spatial frequency-based motion estimationVinod Menezes, S. K. Nandy, Biswadip Mitra. integration, 22(1-2):115-135, 1997. [doi]

1996

Spatial frequency based motion estimation for image sequence compressionVinod Menezes, Soumitra Kumar Nandy, Biswadip Mitra. hipc 1996: 257-262 [doi]

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