Guy G. Lemieux - researchr alias

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Viewing Publication 1 - 27 from 27

2011

2010

The impact of interconnect architecture on via-programmed structured ASICs (VPSAs)Usman Ahmed, Guy G. Lemieux, Steven J. E. Wilton. fpga 2010: 263-272 [doi]

2009

2008

Extreme parallel architectures for the massesTarek A. El-Ghazawi, Guy G. Lemieux. fpga 2008: 127-128 [doi]

GlitchLess: Dynamic Power Minimization in FPGAs Through Edge Alignment and Glitch FilteringJulien Lamoureux, Guy G. Lemieux, Steven J. E. Wilton. tvlsi, 16(11):1521-1534, 2008. [doi]

Designing with extreme parallelismGuy G. Lemieux, Tarek A. El-Ghazawi. fpga 2008: 1-2 [doi]

2007

GlitchLess: an active glitch minimization technique for FPGAsJulien Lamoureux, Guy G. Lemieux, Steven J. E. Wilton. fpga 2007: 156-165 [doi]

Congestion estimation and localization in FPGAS: a visual tool for interconnect predictionDavid Yeager, Darius Chiu, Guy G. Lemieux. slip 2007: 33-40 [doi]

2006

Semi-Synthetic Circuit Generation Using Graph Monomorphism for Testing Incremental Placement and Incremental Routing ToolsDavid Grant, Scott Chin, Guy G. Lemieux. fpl 2006: 1-4 [doi]

Un/DoPack: re-clustering of large system-on-chip designs with interconnect variation for low-cost FPGAsMarvin Tom, David Leong, Guy G. Lemieux. iccad 2006: 680-687 [doi]

2005

Logic block clustering of large designs for channel-width constrained FPGAsMarvin Tom, Guy G. Lemieux. dac 2005: 726-731 [doi]

FPGA Defect Tolerance: Impact of GranularityAnthony J. Yu, Guy G. Lemieux. fpt 2005: 189-196

Defect-Tolerant FPGA Switch Block and Connection Block with Fine-Grain Redundancy for Yield EnhancementAnthony J. Yu, Guy G. Lemieux. fpl 2005: 255-262

2002

Analytical Framework for Switch Block DesignGuy G. Lemieux, David M. Lewis. fpl 2002: 122-131 [doi]

Circuit design of routing switchesGuy G. Lemieux, David M. Lewis. fpga 2002: 19-28 [doi]

2001

Using sparse crossbars within LUTGuy G. Lemieux, David M. Lewis. fpga 2001: 59-68 [doi]

2000

1998

Design and Implementation of the NUMAchine MultiprocessorA. Grbic, Stephen Dean Brown, S. Caranci, R. Grindley, M. Gusat, Guy G. Lemieux, K. Loveless, Naraig Manjikian, Sinisa Srbljic, Michael Stumm, Zvonko G. Vranesic, Zeljko Zilic. dac 1998: 66-69 [doi]

1997

On two-step routing for FPGASGuy G. Lemieux, Stephen Dean Brown, Daniel Vranesic. ispd 1997: 60-66 [doi]

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