Samy Makar - researchr alias

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Viewing Publication 1 - 12 from 12

2013

Self-repair of uncore components in robust system-on-chips: An OpenSPARC T2 case studyYanjing Li, Eric Cheng, Samy Makar, Subhasish Mitra. itc 2013: 1-10 [doi]

2008

CASP: Concurrent Autonomous Chip Self-Test Using Stored Test PatternsYanjing Li, Samy Makar, Subhasish Mitra. date 2008: 885-890 [doi]

2007

Testing of Vega2, a chip multi-processor with spare processorsSamy Makar, Tony Altinis, Niteen Patkar, Janet Wu. itc 2007: 1-10 [doi]

2002

Design for Testability and Testing of IEEE 1149.1 Tap ControllerSubhasish Mitra, Edward J. McCluskey, Samy Makar. vts 2002: 247-252 [doi]

1998

A layout-based approach for ordering scan chain flip-flopsSamy Makar. itc 1998: 341-347 [doi]

1997

ATPG for scan chain latches and flip-flopsSamy Makar, Edward J. McCluskey. vts 1997: 364-369 [doi]

1995

Floating Point Fault Tolerance with Backward Error AssertionsDaniel Boley, Gene H. Golub, Samy Makar, Nirmal R. Saxena, Edward J. McCluskey. TC, 44(2):302-311, 1995.

Functional Tests for Scan Chain LatchesSamy Makar, Edward J. McCluskey. itc 1995: 606-615

Checking experiments to test latchesSamy Makar, Edward J. McCluskey. vts 1995: 196-201 [doi]

1989

The critical path for multiple faultsSamy Makar, Edward J. McCluskey. iccad 1989: 162-165 [doi]

1988

On the Testing of MultiplexersSamy Makar, Edward J. McCluskey. itc 1988: 669-679

Probability models for pseudorandom test sequencesEdward J. McCluskey, Samy Makar, Samiha Mourad, Kenneth D. Wagner. tcad, 7(1):68-74, 1988. [doi]

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