Abstract is missing.
- Maintaing Quality, Poductivity and Profit in a Changing Bell SystemLuis T. Burke Jr.. 4-5
- Higher Yields, Lower CostsMelissa E. Broussard. 6-11
- Closing the Loop: An Expanding Role for ATE in Semiconductor ManufacturingMatthew V. Mahoney. 12-23
- Fault Modeling and Test Effectiveness Evaluation for VLSI CircuitsPete S. Bottorff. 24
- A New Fault Model and Testing Technique for CMOS DevicesChi-Chang Liaw, Stephen Y. H. Su. 25-34
- Do Stuck Fault Models Reflect Manufacturing Defects?C. C. Beh, K. H. Arya, Charles E. Radke, E. Kofi Vida-Torku. 35-42
- Fault Modelling for Functional PrimitivesAlexander Miczo. 43-51
- Universal Tests Detecting Input/Output Faults in Almost All DevicesMark G. Karpovsky. 52-57
- Testing and Structured DesignErik DeBenedictis, Charles L. Seitz. 58-62
- A Variation of LSSD and Its Implications on Design and Test Pattern Generation in VLSISumit Dasgupta, Prabhakar Goel, Ron G. Walther, Tom W. Williams. 63-66
- A Design for Complete Testability of Programmable Logic ArraysK. S. Ramanatha, Nripendra N. Biswas. 67-74
- Signature Testing with Guaranteed Bounds for Fault CoverageWilliam C. Carter. 75-82
- Electronic Chip-In-Place TestPrabhakar Goel, M. T. McMahon. 83-91
- Test Equipment and Methods IJoel M. Schoen. 92
- Filtering Methods for Fast Ultra-Low Distortion MeasurementsWilliam J. Bowhers. 93-104
- A Pursuit of Superior Cost-Per-Performance in General-Purpose Linear IC Test SystemYasutoshi Otani, Eiji Ishiwa, Nobuo Arai, Yoshio Yamanaka. 105-110
- Test Considerations for Components with Redundant ElementsDavid C. Cheng, Alexander A. Grillo. 111-118
- Automated Test Instrumentation for Low-Current TestingKennteth F. Coop. 119-125
- Using Analog Signature Analysis in Speech Synthesis Device TestingBradford Robbins, David K. Oka. 126-131
- Signature Analysis: Yet Another PerspectiveK. S. Bhaskar. 132-139
- Professional Aspects of Test EngineeringJohn Turino. 140-141
- Increasing Test Engineering EffectivnessDouglas Greenwood. 142
- Professional Aspects of Test EngineeringJames L. Kroening. 143-145
- ATPG and Simulation Systems : The State of the ArtHarold Levin. 146
- Design Goals and Implementation Techniques for Time-Based Digital Simulation and Hazard DetectionKenneth R. Bowden. 147-152
- Integrated Functional/Structural Timing for Digital SimulationDavid Giles, Charles Berking, Kenneth Wacks. 153-160
- Automatic Behavioral Test GenerationKyuhik Son, James Y. O. Fong. 161-165
- A New Software Tool for Detecting Problems Caused by Inductively-Generated Switching NoiseJohn P. Barlow. 166-169
- On Functional Controllability and Observability AnalysisJames Y. O. Fong. 170-175
- Simplified Microprocessor Test GenerationCharles Hinchcliff. 176-181
- Self-Test Chip to System Level ApproachesRichard M. Sedmak. 182
- Built-In Verification TestEdward J. McCluskey. 183-190
- Concurrent Checking of Program Flow in VLSI ProcessorsThirumalai Sridhar, Satish M. Thatte. 191-199
- Self-Testing of Multichip Logic ModulesPaul H. Bardell, William H. McAnney. 200-204
- Run-Time Program for Self-Checking Single Board ComputerJ. Abadir, Yves Deswarte. 205-213
- A Fault Detection and Isolation Technique for MicrocomputersPatrick P. Fasang. 214-222
- Memory Test : An International ArtD. J. Graham. 223-224
- An Evaluation of the 2816 EEPROMEugene R. Hnatek, Beau R. Wilson Jr.. 225-235
- Simple and Efficient Algorithms for Functional RAM TestingMarian Marinescu. 236-239
- Testing System for Redundant MemoryY. Hayasaka, K. Shimotori, K. Okada. 240-244
- Testing of Sense Amplifier in Dynamic MemoryT. Tada, T. Kobayashi, K. Okada, Y. Kuramitsu. 245-251
- An Interactive Descrambler Program for RAMs with RedundancyNik Kirschner. 252-257
- Testing during Burn-In: Economical Alternative for Testing MemoriesCharles E. Shalvoy. 258-261
- Quality and ReliabilityBill Hedrick. 262
- An STL Gate Array Reliability Test BarJoel P. LeBlanc Jr.. 263-268
- The Effects of Backdriving Digital Integrated Circuits during In-Circuit TestingLouis J. Sobotka. 269-286
- An Accelerated Testing Technique for Plastic Package Devices Using a Sequential Combination of Pressure Cooker and 85/85 (PCTH)G. Eugene Gottlieb. 287-298
- Microelectronic Device Electrical Test Implementation Problems on Automated Test EquipmentWillis J. Horth, Frederick G. Hall, Robert G. Hillman. 299-307
- Quality Control for Production TestingF. G. Cockerill. 308-314
- To Measure Quality in the Manufacturing of Printed Circuit BoardsKemon P. Taschioglou. 315-325
- MCM Data Analysis Tracking SystemR. Burgess, E. Pignetti, J. Pitti. 326-330
- Benefits of ATE and Host Computer NetworkingWayne Bryant, Charles Furry, Jim Hahn. 331-338
- Manufacturing Productivity: Automated vs. Manual Test-Data-Management SystemsBruce G. MacAloney, Paul Littlejohn. 339-345
- Test Data Automation: An ATE Distributed Processing Application in a Multi-Vendor EnvironmentDavid W. Malas, Stephen C. Hagan. 346-349
- An Automatic Test Equipment Database System Used in the Generation and Analysis of Fault Statistics at the Printed Circuit Board LevelW. L. Goldie, P. F. Macready. 350-361
- COMET: A Testability Analysis and Design Modification PackageWilliam C. Berg, Robert D. Hess. 364-378
- Analysis of the Switching Behavior of Combinatorial Logic NetworksEugen I. Muehldorf, Thomas W. Williams. 379-390
- Testability Measures : What Do They Tell Us ?Vishwani D. Agrawal, M. Ray Mercer. 391-399
- VICTOR : A Fast VLSI Testability Analysis ProgramIon M. Ratiu, Alberto L. Sangiovanni-Vincentelli, Donald O. Pederson. 397-403
- System TestRichard A. Albright. 404
- A Technique for Testing Large Distributed SystemsJohn A. Masciola, Mark S. Lucas. 405-408
- 9826A Computer Burn-In ProgramKen Fedraw. 409-413
- LSI Self-Test Using Level Sensitive Scan Design and Signature AnalysisDonald Komonytsky. 414-424
- Systems Testing Why ?Kenneth R. Willey. 425-427
- A Precision Measurement Technique for High Frequency Repetitive SignalsDavid C. Cheng. 428-434
- Testing the Dynamic Performance of High-Speed A/D ConvertersK. Uchida. 435-440
- Testing an Audio Spectrum Analyzer for Speech Recognition SystemsStephen W. Bryson. 441-446
- Digital Signal Processing for Production Testing of Analog LSI DevicesTim Higgins. 447-457
- Soft Failure Detection and Correction in Microprocessor CharacterizationBell Liu. 458-460
- Techniques for Concurrent Testing of VLSI Processor OperationMasood Namjoo. 461-468
- Concurrent Testing of Flow of Control in Simple Microprogrammed Control UnitsVijay S. Iyengar, Larry L. Kinney. 469-479
- Design of Easily Testable Microprocessors : A Case StudySunil Nanda, Sudhakar M. Reddy. 480-483
- An Architecture for Testable VLSI ProcessorsSatish M. Thatte, D.-S. Ho, H.-T. Yuan, Thirumalai Sridhar, Theo J. Powell. 484-493
- Test SoftwareRoger Simpson. 494
- Structured Programming and the I.C. Test EngineerAntony K. Stevens. 495-4
- ICTEST : A Unified System for Functional Testing and Simulation of Digital ICsI. M. Watson, John A. Newkirk, Robert G. Mathews, D. B. Boyle. 499-502
- A Coherent and Efficient Approach to LSI Modeling and Testing for Integrated Circuit UsersJaques Couesnon, Michel Parot. 503-508
- A Common Pascal Test Language: Reality or PipedreamRichard C. Mahoney. 509-513
- Automated Generation of Device Test SoftwareIqbal Syed, Nicole Rose. 514-521
- Automated Analysis of Static RAM FailuresMike Schell, Mike Sigler. 522-527
- Board TestingReymon Oberly. 528
- Board Test Session IEric H. Millham. 529
- Faults Which Challenge the In-Circuit Tester: Some Examples and Some SolutionsMatthew L. Fichtenbaum. 530-536
- A New Approach to On-Board Microprocessor-Based Self-TestT. Jackson, P. Vais, K. Schwerbrock. 537-540
- Design of a New Test Generation System for Performance Testing of LSI Digital Printed Circuit BoardsHerold Levine, Charles Berking, Alan Blair, Kenneth R. Bowden, Peter deBruyn Kops, David Giles, David Ruhoff, Kenneth Wacks. 541-547
- Implications of the Technique for Dynamic High Speed Functional TestingDennis Hebert, Jack H. Arabian. 548-557
- Test System Remote Program ManagementGregory Illes. 558-564
- Improving the Effectiveness of Board Test ProgrammersDonald Stewart. 565-568
- Managing Your Test Cost for the 80 sWilliam K. Jones. 569-573
- A Closer Look at Testing CostsG. A. Perone, R. S. Maljatt, J. P. Kain, W. I. Goodheim. 574-579
- Applying Test Theory to VLSI TestingMing-Guan Lin, Kenneth Rose. 580-586
- Test Pattern Portability for MicroprocessorsWilliam S. Richardson. 587-589
- An Algorithmic Approach to the Testing of a Wafer Scale Integrated (WSI) CircuitNeal H. MacDonald, Gordon B. Neish. 590-600
- , An Efficient Test Vector Generation and Reduction Method for an LSI Digital Filter Circuit Using an Adaptive Search TechniqueRoderick H. Macmillan, M. R. Bentley. 601-607
- Test Equipment and Methods IIRichard B. Craven. 608
- ECL Board Testing: An In-Circuit Point of ViewBrian C. Crosby. 609-614
- Calculating VOH for LSI 10K ECLThomas A. Senna. 615-619
- Designing a High-Speed Vector Bust to Meet the Requirements of Analog LSI TestingJames Seaton, Jeffrey Axelbank. 620-627
- Testing VLSI Microprocessor with New Functional CapabilityJunji Nishiura, Toshio Maruyama, Hiromi Maruyama, Shinpei Kamata. 628-633
- Automated Contactless Digital Test System for VLSIK. Thangamuthu, M. Macari, S. Cohen. 634-639
- Board Testing IIR. Oberly. 640
- Methods of Assignment of Nodes to Pins for Multiplexed TestersJames J. Faran Jr.. 641-647
- A Tester-Independent Automated Test Preparation Process for Loaded BoardsHookuong Wong, David Florcik. 648-655
- Analysis and Simulation of Parallel Signature AnalyzersThirumalai Sridhar, D.-S. Ho, Theo J. Powell, Satish M. Thatte. 656-661
- Board Diagnosis: A Current Assessment and Direction for Future ImprovementPeter Solecky, Frank C. Hsu. 662-670