Sachin B. Patkar - researchr alias

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Viewing Publication 1 - 45 from 45

2023

IMBUE: In-Memory Boolean-to-CUrrent Inference ArchitecturE for Tsetlin MachinesOmar Ghazal, Simranjeet Singh, Tousif Rahman, Shengqi Yu, Yujin Zheng, Domenico Balsamo, Sachin B. Patkar, Farhad Merchant, Fei Xia, Alex Yakovlev, Rishad A. Shafik. islped 2023: 1-6 [doi]

CLARINET: A quire-enabled RISC-V-based framework for posit arithmetic empiricismNiraj N. Sharma, Riya Jain, Mohana Madhumita Pokkuluri, Sachin B. Patkar, Rainer Leupers, Rishiyur S. Nikhil, Farhad Merchant. jsa, 135:102801, February 2023. [doi]

Finite State Automata Design using 1T1R ReRAM CrossbarSimranjeet Singh, Omar Ghazal, Chandan Kumar Jha 0001, Vikas Rana, Rolf Drechsler, Rishad A. Shafik, Alex Yakovlev, Sachin B. Patkar, Farhad Merchant. newcas 2023: 1-5 [doi]

Should We Even Optimize for Execution Energy? Rethinking Mapping for MAGIC Design StyleSimranjeet Singh, Chandan Kumar Jha 0001, Ankit Bende, Phrangboklang Lyngton Thangkhiew, Vikas Rana, Sachin B. Patkar, Rolf Drechsler, Farhad Merchant. esl, 15(4):230-233, December 2023. [doi]

Exploring Multi-Valued Logic and its Application in Emerging Post-CMOS TechnologiesSimranjeet Singh, Elmira Moussavi, Christopher Bengel, Sachin B. Patkar, Rainer Waser, Rainer Leupers, Vikas Rana, Vivek Pachauri, Stephan Menzel, Farhad Merchant. NANOARCH 2023: [doi]

Integrated Architecture for Neural Networks and Security Primitives using RRAM CrossbarSimranjeet Singh, Furqan Zahoor, Gokulnath Rajendran, Vikas Rana, Sachin B. Patkar, Anupam Chattopadhyay, Farhad Merchant. newcas 2023: 1-5 [doi]

2020

2019

Computational Issues in Construction of 4-D Projective Spaces with Perfect Access Patterns for Higher PrimesShreeniwas N. Sapre, Sachin B. Patkar, Supratim Biswas. pact 2019: 245-259 [doi]

2018

Lightweight Forth Programmable NoCsVinay B. Y. Kumar, Deval Shah, Mandar Datar, Sachin B. Patkar. vlsid 2018: 368-373 [doi]

2016

Relaxation Based Circuit Simulation Acceleration over CPU-FPGAVinay B. Y. Kumar, Kulshreshth Dhiman, Mandar Datar, Akash Pacharne, H. Narayanan, Sachin B. Patkar. vlsid 2016: 409-414 [doi]

2015

Parallel two step random walk algorithm to analyze VLSI power grid networksSatyabrata Dash, Vivek Bangera, Vinay B. Y. Kumar, Gaurav Trivedi, Sachin B. Patkar. vdat 2015: 1-2 [doi]

2014

Storage-allocation to sequential structures in High-Level Synthesis-assisted prototypingVinay B. Y. Kumar, Shovan Maity, Sachin B. Patkar. iccd 2014: 464-469 [doi]

FPGA-based implementation of M4RM for matrix multiplication over GF(2)Vivek Kumar, Vinay B. Y. Kumar, Sachin B. Patkar. vdat 2014: 1-2 [doi]

Projective Geometry and precedence constraint based application mapping on multicore network-on-chip systemsJanak Porwal, Sanket Diwale, Vinay B. Y. Kumar, Sachin B. Patkar. vlsi-dat 2014: 1-4 [doi]

2013

Memory Efficient Implementation of Two Graph Based Circuit Simulator for PDE-Electrical AnalogyYogesh Dilip Save, H. Narayanan, Sachin B. Patkar. vlsid 2013: 356-361 [doi]

Solution of PDEs-electrically coupled systems with electrical analogyYogesh Dilip Save, H. Narayanan, Sachin B. Patkar. integration, 46(4):427-440, 2013. [doi]

Hardware-software Scalable Architectures for Gaussian Elimination over GF(2) and Higher Galois FieldsPrateek Saxena, Vinay B. Y. Kumar, Dilawar Singh, H. Narayanan, Sachin B. Patkar. peccs 2013: 195-201

2012

FPGA Implementation of Particle Filter Based Object Tracking in VideoSumeet Agrawal, Pinal Engineer, Rajbabu Velmurugan, Sachin B. Patkar. ised 2012: 82-86 [doi]

Two Graph Based Circuit Simulator for PDE-Electrical AnalogyYogesh Dilip Save, H. Narayanan, Sachin B. Patkar. vlsid 2012: 400-405 [doi]

2011

Double Precision Sparse Matrix Vector Multiplication Accelerator on FPGASumedh Attarde, Siddharth Joshi, Yash Deshpande, Sunil Puranik, Sachin B. Patkar. peccs 2011: 476-484

Solution of Partial Differential Equations by electrical analogyYogesh Dilip Save, H. Narayanan, Sachin B. Patkar. jocs, 2(1):18-30, 2011. [doi]

2010

FPGA Based High Performance Double-Precision Matrix MultiplicationVinay B. Y. Kumar, Siddharth Joshi, Sachin B. Patkar, H. Narayanan. ijpp, 38(3-4):322-338, 2010. [doi]

Large Scale VLSI Circuit Simulation Using Point RelaxationSubhendu Roy, Yogesh Save, H. Narayanan, Sachin B. Patkar. csc 2010: 343-347

2009

2003

2001

Realization of set functions as cut functions of graphs and hypergraphsSatoru Fujishige, Sachin B. Patkar. DM, 226(1-3):199-210, 2001. [doi]

A note on optimal covering augmentation for graphic polymatroidsSachin B. Patkar, H. Narayanan. ipl, 79(6):285-290, 2001. [doi]

2000

Fast On-Line/Off-Line Algorithms for Optimal Reinforcement of a Network and Its Connections with Principal PartitionSachin B. Patkar, H. Narayanan. fsttcs 2000: 94-105 [doi]

1999

Priority Scheduling in Parallel I/O SystemsC. R. Venugopal, S. S. S. P. Rao, Sachin B. Patkar. pdpta 1999: 2554-2560

1997

A New Partitioning Strategy Based on Supermodular FunctionsSachin B. Patkar, Shabbir H. Batterywala, M. Chandramouli, H. Narayanan. vlsid 1997: 32-37 [doi]

1996

Approximation Algorithms for Min-k-Overlap Problems Using the Principal Lattice of Partitions ApproachH. Narayanan, Subir Roy, Sachin B. Patkar. jal, 21(2):306-330, 1996.

1994

Approximation Algorithms for Min-k-overlap Problems Using the Principal Lattice of Partitions ApproachH. Narayanan, Subir Roy, Sachin B. Patkar. mfcs 1994: 525-535

Abstract and Generic Rigidity in the PlaneSachin B. Patkar, Brigitte Servatius, K. V. Subrahmanyam. JCT, 62(1):107-113, 1994. [doi]

1992

Fast Sequential and Randomised Parallel Algorithms for Rigidity and approximate Min k-cutSachin B. Patkar, H. Narayanan. fsttcs 1992: 265-278

Principal Lattice of Partition of submodular functions on Graphs: Fast algorithms for Principal Partition and Generic RigiditySachin B. Patkar, H. Narayanan. isaac 1992: 41-50

1991

A Fast Algorithm for the Principle Partition of a GraphSachin B. Patkar, H. Narayanan. fsttcs 1991: 288-306

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