Vincent John Mooney III - researchr alias

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Viewing Publication 1 - 41 from 41

2018

Hardware-Based Run-Time Code Integrity in Embedded DevicesTaimour Wehbe, Vincent John Mooney III, David C. Keezer. cryptography, 2(3):20, 2018. [doi]

2013

Introductions to special issue on ESWEEK 2011Reinaldo A. Bergamaschi, Sanjoy K. Baruah, Sebastian Fischmeister, Robert P. Dick, Jan Madsen, Rajesh Gupta, Vincent John Mooney III. dafes, 17(2):215-219, 2013. [doi]

Models for characterizing noise based PCMOS circuitsAnshul Singh, Arindam Basu, Keck Voon Ling, Vincent John Mooney III. tecs, 13(1s):39, 2013. [doi]

2010

A More Precise Model of Noise Based PCMOS ErrorsArun Bhanu, Mark S. K. Lau, Keck Voon Ling, Vincent John Mooney III, Anshul Singh. delta 2010: 99-102 [doi]

2008

Task Scheduling for Control Oriented Requirements for Cyber-Physical SystemsFumin Zhang, Klementyna Szwaykowska, Wayne Wolf, Vincent John Mooney III. rtss 2008: 47-56 [doi]

2007

Timing analysis for preemptive multitasking real-time systems with cachesYudong Tan, Vincent John Mooney III. tecs, 6(1):7, 2007. [doi]

2006

Sleepy Stack Leakage ReductionJun-Cheol Park, Vincent John Mooney III. tvlsi, 14(11):1250-1263, 2006. [doi]

2005

2004

Assembly instruction level reverse execution for debuggingTankut Akgul, Vincent John Mooney III. TOSEM, 13(2):149-198, 2004. [doi]

A Fast Assembly Level Reverse Execution Method via Dynamic SlicingTankut Akgul, Vincent John Mooney III, Santosh Pande. ICSE 2004: 522-531 [doi]

Golay and wavelet error control codes in VLSIArunkumar Balasundaram, Angelo Pereira, Jun-Cheol Park, Vincent John Mooney III. aspdac 2004: 563-564 [doi]

Energy estimation of peripheral devices in embedded systemsOzgur Celebican, Tajana Simunic Rosing, Vincent John Mooney III. glvlsi 2004: 430-435 [doi]

A novel deadlock avoidance algorithm and its hardware implementationJaehwan Lee, Vincent John Mooney III. codes 2004: 200-205 [doi]

Sleepy Stack Reduction of Leakage PowerJun-Cheol Park, Vincent John Mooney III, Philipp Pfeiffenberger. patmos 2004: 148-158 [doi]

Automated bus generation for multiprocessor SoC designKyeong Keol Ryu, Vincent John Mooney III. tcad, 23(11):1531-1549, 2004. [doi]

Timing Analysis for Preemptive Multi-Tasking Real-Time Systems with CachesYudong Tan, Vincent John Mooney III. date 2004: 1034-1039 [doi]

2003

PARLAK: Parametrized Lock Cache GeneratorBilge Saglam Akgul, Vincent John Mooney III. date 2003: 11138-11139 [doi]

Hardware/Software Partitioning of Operating SystemsVincent John Mooney III. In Ahmed Amine Jerraya, Sungjoo Yoo, Diederik Verkest, Norbert Wehn, editors, Embedded Software for SoC. pages 187-206, Kluwer / Springer, 2003. [doi]

Software Streaming via Block StreamingPramote Kuacharoen, Vincent John Mooney III, Vijay K. Madisetti. In Ahmed Amine Jerraya, Sungjoo Yoo, Diederik Verkest, Norbert Wehn, editors, Embedded Software for SoC. pages 435-448, Kluwer / Springer, 2003. [doi]

A comparison of the RTU hardware RTOS with a hardware/software RTOSJaehwan Lee, Vincent John Mooney III, Anders Daleby, Karl Ingström, Tommy Klevin, Lennart Lindh. aspdac 2003: 683-688 [doi]

Combining data remapping and voltage/frequency scaling of second level memory for energy reduction in embedded systemsJun-Cheol Park, Vincent John Mooney III, Sudarshan K. Srinivasan. mj, 34(11):1019-1024, 2003. [doi]

2002

2001

System-on-a-chip processor synchronization support in hardwareBilge Saglam Akgul, Vincent John Mooney III. date 2001: 633-641 [doi]

A Debugger RTOS for Embedded SystemsTankut Akgul, Pramote Kuacharoen, Vincent John Mooney III, Vijay K. Madisetti. euromicro 2001: 264 [doi]

A system-on-a-chip lock cache with task preemption supportBilge Saglam Akgul, Jaehwan Lee, Vincent John Mooney III. cases 2001: 149-157 [doi]

The emerging power crisis in embedded processors: what can a poor compiler do?Lakshmi N. Chakrapani, Pinar Korkmaz, Vincent John Mooney III, Krishna V. Palem, Kiran Puttaswamy, Weng-Fai Wong. cases 2001: 176-180 [doi]

A Comparison of Five Different Multiprocessor SoC Bus ArchitecturesKyeong Keol Ryu, Eung S. Shin, Vincent John Mooney III. dsdm 2001: 202-211 [doi]

A novel parallel deadlock detection algorithm and architecturePun H. Shiu, Yudong Tan, Vincent John Mooney III. codes 2001: 73-78 [doi]

2000

Hardware/Software Co-Design of Run-Time Schedulers for Real-Time SystemsVincent John Mooney III, Giovanni De Micheli. dafes, 6(1):89-144, 2000. [doi]

A dynamic memory management unit for embedded real-time system-on-a-chipMohamed Shalan, Vincent John Mooney III. cases 2000: 180-186 [doi]

1999

Path-based Edge Activation for Dynamic Run-Time SchedulingVincent John Mooney III. isss 1999: 30-37 [doi]

1998

System Level Design for System on a ChipW. Shields Neely, Vincent John Mooney III. dafes, 3(4):291-309, 1998. [doi]

1997

Real time analysis and priority scheduler generation for hardware-software systems with a synthesized run-time systemVincent John Mooney III, Giovanni De Micheli. iccad 1997: 605-612 [doi]

1994

Redesigning hardware-software systemsClaudionor José Nunes Coelho Jr., Jerry Chih-Yuan Yang, Vincent John Mooney III, Giovanni De Micheli. codes 1994: 116-123 [doi]

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1994

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