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Al Crouch
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Donald Labrecque
Fanchen Zhang
Janusz Rajski
Jennifer Dworak
John Suarez
Konstantinos Poulos
Kundan Nepal
Mark Kassab
Michael S. Shur
Muralidharan Venkatasubramanian
Ping Gui
Prakash Krishnamoorthy
Ramesh C. Tekumalla
Ryan Jurasek
Sandip Kundu
Spencer K. Millican
Vishwani D. Agrawal
Yu Huang
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Viewing Publication 1 - 68 from 68
2020
29th IEEE North Atlantic Test Workshop, NATW 2020, Albany, NY, USA, June 17-24, 2020
IEEE,
2020.
[doi]
AI Powered THz VLSI Testing Technology
Naznin Akter
,
Mustafa Karabiyik
,
Michael S. Shur
,
John Suarez
,
Nezih Pala
.
natw 2020
:
1-5
[doi]
Verification and Testing Considerations of an In-Memory AI Chip
Marcia Golmohamadi
,
Ryan Jurasek
,
Wolfgang Hokenmaier
,
Donald Labrecque
,
Ruoyu Zhi
,
Bret Dale
,
Nibir Islam
,
Dave Kinney
,
Angela Johnson
.
natw 2020
:
1-6
[doi]
Calculating Signal Controllability using Neural Networks: Improvements to Testability Analysis and Test Point Insertion
Joshua Immanuel
,
Spencer K. Millican
.
natw 2020
:
1-6
[doi]
Passive Intermodulation (PIM) Test and Measurement
Stephen Moss
,
Elanchezhian Veeramani
,
Joris Angelo Sundaram Jerome
.
natw 2020
:
1-3
[doi]
Self-heating characterization and its applications in technology development
Peter C. Paliwoda
,
Maria Toledano-Luque
,
Tanya Nigam
,
F. Guarin
,
M. Nour
,
S. Cimino
,
L. Pantisano
,
A. Gupta
,
O. H. Gonzalez
,
M. Hauser
,
W. Liu
,
A. Vayshenker
,
D. Ioannou
,
D. Lee
,
L. Jiang
,
P. Yee
,
S. Rauch
,
B. Min
.
natw 2020
:
1-7
[doi]
A Built In Test circuit for waveform classification at high frequencies
Konstantinos Poulos
,
Themistoklis Haniotakis
.
natw 2020
:
1-5
[doi]
Characterization of Thermal Runaway in a Ge Photodiode for Si Photonics
Stewart Rauch
,
Dongho Lee
,
Alexey Vert
,
Roy Gupta
.
natw 2020
:
1-4
[doi]
2019
28th IEEE North Atlantic Test Workshop, NATW 2019, Burlington, VT, USA, May 13-15, 2019
IEEE,
2019.
[doi]
Matlab JTAG AXI Master opens new dimensions for development and testability
Mark Fosberry
,
Ben McMahon
.
natw 2019
:
1-2
[doi]
Behavioral Modeling of a Charge Trap Transistor One Time Programmable Memory
Eric Hunt-Schroeder
,
Darren Anand
,
Edward Hwang
,
Aaron Cummings
,
Matthew Deming
,
Michael Roberge
,
Michael Ziegerhofer
.
natw 2019
:
1-6
[doi]
Improved Random Pattern Delay Fault Coverage Using Inversion Test Points
Soham Roy
,
Brandon Stiene
,
Spencer K. Millican
,
Vishwani D. Agrawal
.
natw 2019
:
1-6
[doi]
Case Study of Advanced Diagnostic Techniques for Multi Port Register File
Uma Srinivasan
,
William V. Huott
,
Chad Adams
,
Pete Freiburger
,
Franco Stellari
,
Peilin Song
,
Phong Tran
,
Dave Albert
.
natw 2019
:
1-9
[doi]
Convolutional Neural Networks (CNNs)-Assisted Voltage Regulation: A New Power Delivery Scheme
Yiming Wen
,
Weize Yu
.
natw 2019
:
1-6
[doi]
Malicious Attacks on Physical Unclonable Function Sensors of Internet of Things
Weize Yu
,
Yiming Wen
.
natw 2019
:
1-6
[doi]
2018
A simplified on-chip calibration method for branch-line coupler
Wei Jiang 0017
,
Guoan Wang
.
natw 2018
:
1-3
[doi]
27th IEEE North Atlantic Test Workshop, NATW 2018, Essex, VT, USA, May 7-9, 2018
IEEE,
2018.
[doi]
Case study on low pin count testing of industry transceiver chip
Imtiaz Ahmed
,
Subhash Baraiya
,
Rahul Singhal
.
natw 2018
:
1-5
[doi]
New testing approach using near electromagnetic field probing intending to upgrade in-circuit testing of high density PCBAs
Nabil El Belghiti Alaoui
,
Patrick Tounsi
,
Alexandre Boyer
,
Arnaud Viard
.
natw 2018
:
1-8
[doi]
Enabling fast process variation and fault simulation through macromodelling of analog components
Mehmet Ince
,
Ender Yilmaz
,
Sule Ozev
.
natw 2018
:
1-6
[doi]
One more time! Increasing fault detection with scan shift capture
Hui Jiang
,
Fanchen Zhang
,
Yi Sun
,
Jennifer Dworak
.
natw 2018
:
1-7
[doi]
An analysis of an inexpensive memory test solution
Ryan Pennucci
,
Ryan Jurasek
,
Wolfgang Hokenmaier
,
Lester Patrick
,
Jacob Bucci
,
Donald Labrecque
,
David Kinney
.
natw 2018
:
1-6
[doi]
Reducing test time with FPGA accelerators using OpenCL
Timothy M. Platt
,
Chen Liu
.
natw 2018
:
1-9
[doi]
Nanoscale silicon mosfet response to THz radiation for testing VLSI
Michael S. Shur
,
John Suarez
.
natw 2018
:
1-6
[doi]
2017
2017 IEEE North Atlantic Test Workshop, NATW 2017, Providence, RI, USA, May 8-10, 2017
IEEE,
2017.
[doi]
Detecting a trojan die in 3D stacked integrated circuits
Soha Alhelaly
,
Jennifer Dworak
,
Theodore W. Manikas
,
Ping Gui
,
Kundan Nepal
,
Alfred L. Crouch
.
natw 2017
:
1-6
[doi]
Mitigating simple power analysis attacks on LSIB key logic
Saurabh Gupta
,
Jennifer Dworak
,
Daniel Engels
,
Al Crouch
.
natw 2017
:
1-6
[doi]
Case study of bandwidth management in SoC testing
Yu Huang
.
natw 2017
:
1-6
[doi]
An enhanced approach to reduce test application time through limited shift operations in scan chains
Konstantinos Poulos
,
Jayasurya Kuchi
,
Themistoklis Haniotakis
.
natw 2017
:
1-4
[doi]
Peer pressure on identity: On requirements for disambiguating PUFs in noisy environment
Pavithra Ramesh
,
Vinay C. Patil
,
Sandip Kundu
.
natw 2017
:
1-4
[doi]
2016
25th IEEE North Atlantic Test Workshop, NATW 2016, Providence, RI, USA, May 9-11, 2016
IEEE,
2016.
[doi]
A Tuning Technique for Temperature and Process Variation Compensation of Power Amplifiers with Digital Predistortion
Hari Chauhan
,
Vladimir Kvartenko
,
Marvin Onabajo
.
natw 2016
:
38-45
[doi]
A 100MS/s 10-bit Split-SAR ADC with Capacitor Mismatch Compensation Using Built-In Calibration
Yongsuk Choi
,
Yong-Bin Kim
,
In-Seok Jung
.
natw 2016
:
1-5
[doi]
Automated and Reusable IP Functional Test Rule Development across Multiple IP Instances within and across Asic Designs
Malinky Ghosh
,
Kelly A. Ockunzzi
.
natw 2016
:
34-37
[doi]
Modeling Residual Life of an IC Considering Multiple Aging Mechanisms
Md. Nazmul Islam
,
Sandip Kundu
.
natw 2016
:
24-27
[doi]
Case Study of Testing a SoC Design with Mixed EDT Channel Sharing and Channel Broadcasting
Xiao Liu
,
Changkai Yu
,
Yu Qi
,
Yu Huang
,
James Fu
.
natw 2016
:
12-17
[doi]
RAPIDO Testing and Modeling of Assisted Write and Read Operations for SRAMs
Joseph Nguyen
,
David Turgis
,
David Bonciani
,
Brice Lhomme
,
Yann Carminati
,
Olivier Callen
,
Guillaume Guirleo
,
Lorenzo Ciampolini
,
Gérard Ghibaudo
.
natw 2016
:
28-33
[doi]
Enabling Debug in IoT Wireless Development and Deployment with Security Considerations
Amirhossein Shahshahani
,
Andrey Tolstikhin
,
Zeljko Zilic
.
natw 2016
:
53-58
[doi]
Failures Guide Probabilistic Search for a Hard-to-Find Test
Muralidharan Venkatasubramanian
,
Vishwani D. Agrawal
.
natw 2016
:
18-23
[doi]
Using Existing Reconfigurable Logic in 3D Die Stacks for Test
Fanchen Zhang
,
Yi Sun
,
Xi Shen
,
Kundan Nepal
,
Jennifer Dworak
,
Theodore W. Manikas
,
Ping Gui
,
R. Iris Bahar
,
Al Crouch
,
John C. Potter
.
natw 2016
:
46-52
[doi]
An Area Efficient 4Gb/s Half-Rate 3-Tap DFE with Current-Integrating Summer for Data Correction
Chen Zhang
,
Gyunam Jeon
,
Yongsuk Choi
,
Yong-Bin Kim
,
Kyung Ki Kim
.
natw 2016
:
6-11
[doi]
2015
24th IEEE North Atlantic Test Workshop, NATW 2015, Johnson City, NY, USA, May 11-13, 2015
IEEE,
2015.
[doi]
Adaptive Mitigation of Radiation-Induced Errors and TDDB in Reconfigurable Logic Fabrics
Rawad N. Al-Haddad
,
Rashad S. Oreifej
,
Ramtin Zand
,
Abdel Ejnioui
,
Ronald F. DeMara
.
natw 2015
:
23-32
[doi]
At-Speed Path Delay Test
Swati Chakraborty
,
Duncan M. Hank Walker
.
natw 2015
:
39-42
[doi]
A Novel Failure Diagnosis Approach for Low Pin Count and Low Power Compression Architectures
S. Chillarige
,
S. Virdi
,
A. Malik
,
Krishna Chakravadhanula
,
Vivek Chickermane
,
J. Swenton
,
G. Vandling
.
natw 2015
:
43-48
[doi]
An Industrial Case Study: PaRent (Parallel & Concurrent) Testing for Complex Mixed-Signal Devices
Jennifer Dworak
,
Ping Gui
,
Qutaiba Khasawneh
.
natw 2015
:
33-38
[doi]
Complete Properties Extraction from Simulation Traces for Assertions Auto-generation
Mohamed Hanafy
,
Hazem Said
,
Ayman M. Wahba
.
natw 2015
:
1-6
[doi]
Multivalued Logic for Reduced Pin Count and Multi-site SoC Testing
Baohu Li
,
Vishwani D. Agrawal
.
natw 2015
:
49-54
[doi]
Hybrid Hierarchical and Modular Tests for SoC Designs
Guoliang Li
,
Jun Qian
,
Qinfu Yang
,
Yuan Zuo
,
Rui Li
,
Yu Huang
,
Mark Kassab
,
Janusz Rajski
.
natw 2015
:
11-16
[doi]
Clock Domain Imbalances and Their Impact on Test Architecture
Ramesh C. Tekumalla
.
natw 2015
:
7-10
[doi]
Satisfiability-Based Analysis of Failing Traces during Post-silicon Debug
Amin Vali
,
Nicola Nicolici
.
natw 2015
:
17-22
[doi]
SoC TAM Design to Minimize Test Application Time
Huiting Zhang
,
Vishwani D. Agrawal
.
natw 2015
:
55-60
[doi]
2014
IEEE 23rd North Atlantic Test Workshop, NATW 2014, Johnson City, NY, USA, May 14-16, 2014
IEEE,
2014.
[doi]
On Handling Memory Scan Chains
Surbhi Bansal
,
Aviansh Mendhalkar
,
Ramesh C. Tekumalla
.
natw 2014
:
6-10
[doi]
Delay Test of Embedded Memories
Yukun Gao
,
Tengteng Zhang
,
Swati Chakraborty
,
D. M. H. Walker
.
natw 2014
:
65-68
[doi]
Optimal Selection of ATE Frequencies for Test Time Reduction Using Aperiodic Clock
Sindhu Gunasekar
,
Vishwani D. Agrawal
.
natw 2014
:
52-56
[doi]
Test Compression Improvement with EDT Channel Sharing in SoC Designs
Yu Huang
,
Mark Kassab
,
Jay Jahangiri
,
Janusz Rajski
,
Wu-Tung Cheng
,
Dongkwan Han
,
Jihye Kim
,
Kun Young Chung
.
natw 2014
:
22-31
[doi]
Innovative Antenna Chamber Characterization
Tommy Lam
.
natw 2014
:
15-21
[doi]
Design and Test of Adaptive Computing Fabrics for Scalable and High-Efficiency Cognitive SoC Applications
Pascal Nsame
,
Guy Bois
,
Yvon Savaria
.
natw 2014
:
48-51
[doi]
CSST: An Efficient Secure Split-Test for Preventing IC Piracy
Md. Tauhidur Rahman
,
Domenic Forte
,
Quihang Shi
,
Gustavo K. Contreras
,
Mohammad Tehranipoor
.
natw 2014
:
43-47
[doi]
Asynchronous Fault Detection in IEEE P1687 Instrument Network
Konstantin Shibin
,
Sergei Devadze
,
Artur Jutman
.
natw 2014
:
73-78
[doi]
Power System Fault Modeling/Simulation Protective Relay Testing and Simulation
Grace Tang
.
natw 2014
:
40-42
[doi]
On-chip Clock Testing and Frequency Measurement
Ramesh C. Tekumalla
,
Prakash Krishnamoorthy
.
natw 2014
:
11-14
[doi]
Local Repair Signature Handling for Repairable Memories
Ramesh C. Tekumalla
,
Prakash Krishnamoorthy
.
natw 2014
:
1-5
[doi]
A Comprehensive Evaluation of Functional Programs for Power-Aware Test
A. Touati
,
Alberto Bosio
,
Luigi Dilillo
,
Patrick Girard
,
Aida Todri-Sanial
,
Arnaud Virazel
,
Paolo Bernardi
.
natw 2014
:
69-72
[doi]
A New Test Vector Search Algorithm for a Single Stuck-at Fault Using Probabilistic Correlation
Muralidharan Venkatasubramanian
,
Vishwani D. Agrawal
.
natw 2014
:
57-60
[doi]
Pattern Generation for Post-Silicon Timing Validation Considering Power Supply Noise
Tengteng Zhang
,
Yukun Gao
,
D. M. H. Walker
.
natw 2014
:
61-64
[doi]
When Optimized N-Detect Test Sets are Biased: An Investigation of Cell-Aware-Type Faults and N-Detect Stuck-At ATPG
Fanchen Zhang
,
Micah Thornton
,
Jennifer Dworak
.
natw 2014
:
32-39
[doi]
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