Table of Contents

• Flexible scan interface architecture for complex SoCsMilind Sonawane, Sailendra Chadalavada, Shantanu Sarangi, Amit Sanghani, Mahmut Yilmaz, Pavan Kumar Datla Jagannadha, Jonathon E. Colburn. 1-6 [doi]
• Infant mortality tests for analog and mixed-signal circuitsSuvadeep Banerjee, Suriyaprakash Natarajan. 1-6 [doi]
• Cache- and register-aware system reliability evaluation based on data lifetime analysisMaha Kooli, Firas Kaddachi, Giorgio Di Natale, Alberto Bosio. 1-6 [doi]
• Thwarting timing attacks on NEMS relay based designsBodhisatwa Mazumdar, Samah Mohamed Saeed, Sk Subidh Ali, Ozgur Sinanoglu. 1-4 [doi]
• A novel technique for interdependent trim code optimizationPankaj Bongale, Vinothkumar Sundaresan, Partha Ghosh, Rubin A. Parekhji. 1-6 [doi]
• WeSPer: A flexible small delay defect quality metricOmar Al-Terkawi Hasib, Yvon Savaria, Claude Thibeault. 1-6 [doi]
• Process independent gain measurement with low overhead via BIST/DUT co-designJae-woong Jeong, Jennifer Kitchen, Sule Ozev. 1-6 [doi]
• Accurate spectral testing with non-coherent sampling for large distortion to noise ratiosYuming Zhuang, Degang Chen. 1-6 [doi]
• Test implications and challenges in near threshold computing special sessionMehdi Baradaran Tahoori, Rob Aitken, Sriram R. Vangal, Bal Sandhu. 1 [doi]
• Online soft-error vulnerability estimation for memory arraysArunkumar Vijayan, Abhishek Koneru, Mojtaba Ebrahimi, Krishnendu Chakrabarty, Mehdi Baradaran Tahoori. 1-6 [doi]
• Optimization of the IEEE 1687 access network for hybrid access schedulesSrinivasa Shashank Nuthakki, Rajit Karmakar, Santanu Chattopadhyay, Krishnendu Chakrabarty. 1-6 [doi]
• Effective generation and evaluation of diagnostic SBST programsAndreas Riefert, Riccardo Cantoro, Matthias Sauer, Matteo Sonza Reorda, Bernd Becker. 1-6 [doi]
• Scalable parallel fault simulation for shared-memory multiprocessor systemsStavros Hadjitheophanous, Stelios N. Neophytou, Maria K. Michael. 1-6 [doi]
• Short burst software transparent on-line MBISTAlan Becker. 1-6 [doi]
• Process variation oriented delay testing of SRAMsXuan Zuo, Sandeep K. Gupta. 1-6 [doi]
• Accurate linearity testing with impure sinusoidal stimulus robust against flicker noiseYuming Zhuang, Tao Chen, Shravan Chaganti, Degang Chen. 1-6 [doi]
• Yield improvement of an EEPROM for automotive applications while maintaining high reliabilityGregor Schatzberger, Friedrich Peter Leisenberger, Peter Sarson. 1-6 [doi]
• Security validation in IoT spaceSandip Ray, Swarup Bhunia, Yier Jin, Mark Tehranipoor. 1 [doi]
• A programmable method for low-power scan shift in SoC integrated circuitsRan Wang, Bonita Bhaskaran, Karthikeyan Natarajan, Ayub Abdollahian, Kaushik Narayanun, Krishnendu Chakrabarty, Amit Sanghani. 1-6 [doi]
• Predicting Vt mean and variance from parallel Id measurement with model-fitting techniqueChih-Ying Tsai, Kao-Chi Lee, Chien-Hsueh Lin, Sung-Chu Yu, Wen-Rong Liau, Alex Chun-Liang Hou, Ying-Yen Chen, Chun-Yi Kuo, Jih-Nung Lee, Mango C.-T. Chao. 1-6 [doi]
• Dynamic docking architecture for concurrent testing and peak power reductionMilind Sonawane, Pavan Kumar Datla Jagannadha, Sailendra Chadalavada, Shantanu Sarangi, Mahmut Yilmaz, Amit Sanghani, Karthikeyan Natarajan, Jonathon E. Colburn, Anubhav Sinha. 1-6 [doi]
• A convergent procedure for partially-reachable statesIrith Pomeranz. 1-6 [doi]
• Special panel session IIB: "System validation and silicon debug - Is standardization possible?"Mike Ricchetti, Eric Rentschler, Amit Majumdar, Mike Lowe, Mark LaVine, Skip Lindsey, Sharad Kumar. 1 [doi]
• Adaptive testing of analog/RF circuits using hardware extracted FSM modelsSabyasachi Deyati, Barry John Muldrey, Abhijit Chatterjee. 1-6 [doi]
• Using hardware testing approaches to improve software testing: Undetectable mutant identificationJianwei Zhang, Sandeep K. Gupta. 1-6 [doi]
• Test-point insertion efficiency analysis for LBIST applicationsMiao Tony He, Gustavo K. Contreras, Mark Tehranipoor, Dat Tran, LeRoy Winemberg. 1-6 [doi]
• Early system failure prediction by using aging in situ monitors: Methodology of implementation and application resultsLorena Anghel, A. Benhassain, Ajith Sivadasan, Florian Cacho, Vincent Huard. 1 [doi]
• Test method and scheme for low-power validation in modern SOC integrated circuitsBonita Bhaskaran, Amit Sanghani, Kaushik Narayanun, Ayub Abdollahian, Amit Laknaur. 1-6 [doi]
• Impact of crosstalk and process variation on capture power reduction for at-speed testSurya Piplani, G. S. Visweswaran, Anshul Kumar. 1-6 [doi]
• Runtime resource management for lifetime extension in multi-core systemsCristiana Boichini. 1 [doi]
• Wafer-level process variation-driven probe-test flow selection for test cost reduction in analog/RF ICsAli Ahmadi, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris. 1-6 [doi]
• Real-time DC motor error detection and control compensation using linear checksumsMd Imran Momtaz, Suvadeep Banerjee, Abhijit Chatterjee. 1-6 [doi]
• Revealing SRAM memory content using spontaneous photon emissionFranco Stellari, Peilin Song, Manuel Villalobos, John Sylvestri. 1-6 [doi]
• Session 4B - Panel data analytics in semiconductor manufacturingSuriyaprakash Natarajan, Li-C. Wang. 1 [doi]
• Post fabrication tuning of GaN based RF power amplifiers for pico-cell applicationsMuhammad Ruhul Hasin, Jennifer Kitchen. 1-4 [doi]
• SRAM yield-per-area optimization under spatially-correlated process variationJizhe Zhang, Sandeep K. Gupta. 1-6 [doi]
• Reduction of diagnostic fail data volume and tester time using a dynamic N-cover algorithmShraddha Bodhe, M. Enamul Amyeen, Clariza Galendez, Houston Mooers, Irith Pomeranz, Srikanth Venkataraman. 1-6 [doi]
• Fault modeling and testing of resistive nonvolatile-8T SRAMsYu-Ting Li, Yong-Xiao Chen, Jin-Fu Li. 1-6 [doi]
• Security of emerging non-volatile memories: Attacks and defensesKaveh Shamsi, Yier Jin. 1-4 [doi]
• Performance enhancement techniques and verification methods for radio frequency circuits and systemsHari Chauhan, Marvin Onabajo. 1-4 [doi]
• Fault tolerance of approximate compute algorithmsHans-Joachim Wunderlich, Claus Braun, Alexander Scholl. 1 [doi]
• ECC-ASPIRIN: An ECC-assisted post-package repair scheme for aging errors in DRAMsDae-Hyun Kim, Linda S. Milor. 1-6 [doi]
• Introduction to approximate computingJie Han. 1 [doi]
• Faults in data prefetchers: Performance degradation and variabilityNikos Foutris, Athanasios Chatzidimitriou, Dimitris Gizopoulos, John Kalamatianos, Vilas Sridharan. 1-6 [doi]
• Consistency in wafer based outlier screeningSebastian Siatkowski, Chuanhe Jay Shan, Li-C. Wang, Nikolas Sumikawat, W. Robert Daasch, John M. Carulli. 1-6 [doi]
• Test and diagnosis of paper-based microfluidic biochipsJain-De Li, Sying-Jyan Wang, Katherine Shu-Min Li, Tsung-Yi Ho. 1-6 [doi]
• Thermal issues in test: An overview of the significant aspects and industrial practiceJ. Alt, Paolo Bernardi, Alberto Bosio, Riccardo Cantoro, Hans G. Kerkhoff, Andreas Leininger, Wolfgang Molzer, A. Motta, Christian Pacha, A. Pagani, Alireza Rohani, R. Strasser. 1-4 [doi]
• Active polymers for bio medical microdevices and microfluidic systemsBonnie Lynne Gray. 1 [doi]
• Code-modulated embedded test for phased arraysKevin Greene, Vikas Chauhan, Brian Floyd. 1-4 [doi]
• Security primitives (PUF and TRNG) with STT-MRAMElena Ioana Vatajelu, Giorgio Di Natale, Paolo Prinetto. 1-4 [doi]
• Building trust in 3PIP using asset-based security property verificationJuan Portillo, Eugene John, Seetharam Narasimhan. 1-6 [doi]
• Microprocessor reliability-performance tradeoffs assessment at the microarchitecture levelSotiris Tselonis, Manolis Kaliorakis, Nikos Foutris, George Papadimitriou, Dimitris Gizopoulos. 1-6 [doi]
• On-die learning-based self-calibration of analog/RF ICsGeorgios Volanis, Dzmitry Maliuk, Yichuan Lu, Kiruba S. Subramani, Angelos Antonopoulos, Yiorgos Makris. 1-6 [doi]
• Lateral coupling faults in multi-ported register files and methods for their testingDilip Bhavsar, Michael Lohmiller, Pankaj Pant. 1-6 [doi]
• Keynote address: Challenges and opportunities in electrical characterization and test for 14nm and belowAndrzej J. Strojwas, Jacob A. Abraham, Hong Hao, Max M. Shulaker. 1-2 [doi]
• Lifetime reliability modeling and estimation in multi-core systemsAntonio Miele. 1 [doi]
• Fault tolerant approximate computing using emerging non-volatile spintronic memoriesFabian Oboril, Azadeh Shirvanian, Mehdi Baradaran Tahoori. 1 [doi]
• Path constraint solving based test generation for observability-enhanced branch coverageYanhong Zhou, Huawei Li, Tiancheng Wang, Bo Liu, Yingke Gao, Xiaowei Li. 1-6 [doi]