Hannah Honghua Yang - researchr alias

researchr

You are not signed in
Sign in
Sign up

2007

MB:::ast:::-Tree: A Multilevel Floorplanner for Large-Scale Building-Module DesignHsun-Cheng Lee, Yao-Wen Chang, Hannah Honghua Yang. tcad, 26(8):1430-1444, 2007. [doi]

Efficient Thermal via Planning Approach and Its Application in 3-D FloorplanningZhuoyuan Li, Xianlong Hong, Qiang Zhou, Shan Zeng, Jinian Bian, Wenjian Yu, Hannah Honghua Yang, Vijay Pitchumani, Chung-Kuan Cheng. tcad, 26(4):645-658, 2007. [doi]

2006

2005

Microarchitecture evaluation with floorplanning and interconnect pipeliningAshok Jagannathan, Hannah Honghua Yang, Kris Konigsfeld, Dan Milliron, Mosur Mohan, Michail Romesis, Glenn Reinman, Jason Cong. aspdac 2005: 8-15 [doi]

A Theoretical Upper Bound for IP-Based FloorplanningGuowu Yang, Xiaoyu Song, Hannah Honghua Yang, Fei Xie. cocoon 2005: 411-419 [doi]

2004

Constrained floorplanning using network flowsYan Feng, Dinesh P. Mehta, Hannah Honghua Yang. tcad, 23(4):572-580, 2004. [doi]

Recursively combine floorplan and Q-place in mixed mode placement based on circuit s variety of block configurationChangqi Yang, Xianlong Hong, Hannah Honghua Yang, Qiang Zhou, Yici Cai, Yongqiang Lu. iscas 2004: 81-84

2003

2002

Integrated floorplanning with buffer/channel insertion for bus-based microprocessor designsFaran Rafiq, Malgorzata Chrzanowska-Jeske, Hannah Honghua Yang, Naveed A. Sherwani. ispd 2002: 56-61 [doi]

2001

Faster and more accurate wiring evaluation in interconnect-centric floorplanningHung-Ming Chen, D. F. Wong, Wai-Kei Mak, Hannah Honghua Yang. glvlsi 2001: 62-67 [doi]

On extending slicing floorplan to handle L/T-shaped modules andabutment constraintsEvangeline F. Y. Young, Martin D. F. Wong, Hannah Honghua Yang. tcad, 20(6):800-807, 2001. [doi]

2000

Slicing floorplans with range constraintEvangeline F. Y. Young, Martin D. F. Wong, Hannah Honghua Yang. tcad, 19(2):272-278, 2000. [doi]

1999

1998

Optimal min-area min-cut replication in partitioned circuitsHannah Honghua Yang, Martin D. F. Wong. tcad, 17(11):1175-1183, 1998. [doi]

1997

Circuit clustering for delay minimization under area and pin constraintsHannah Honghua Yang, Martin D. F. Wong. tcad, 16(9):976-986, 1997. [doi]

1996

Balanced partitioningHannah Honghua Yang, Martin D. F. Wong. tcad, 15(12):1533-1540, 1996. [doi]

1995

New algorithms for min-cut replication in partitioned circuitsHannah Honghua Yang, D. F. Wong. iccad 1995: 216-222 [doi]

1994

Edge-map: optimal performance driven technology mapping for iterative LUT based FPGA designsHannah Honghua Yang, D. F. Wong. iccad 1994: 150-155 [doi]