Jörg Henkel - researchr alias

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2011

Run-Time Resource Allocation for Simultaneous Multi-tasking in Multi-core Reconfigurable ProcessorsWaheed Ahmed, Muhammad Shafique, Lars Bauer, Manuel Hammerich, Jörg Henkel, Jürgen Becker. fccm 2011: 29-32 [doi]

Run-time Adaptation for Reconfigurable Embedded ProcessorsLars Bauer, Jörg Henkel. Springer, 2011. [doi]

2010

Huffman-based code compression techniques for embedded processorsTalal Bonny, Jörg Henkel. todaes, 15(4), 2010. [doi]

Guest Editorial: Current Trends in Low-Power DesignNaehyuck Chang, Jörg Henkel. todaes, 16(1):1, 2010. [doi]

NeuroNoC: neural network inspired runtime adaptation for an on-chip communication architectureThomas Ebi, Mohammad Abdullah Al Faruque, Jörg Henkel. codes 2010: 223-230 [doi]

DAGS: Distribution agnostic sequential Monte Carlo scheme for task execution time estimationNabeel Iqbal, M. A. Siddique, Jörg Henkel. date 2010: 1645-1648 [doi]

RMOT: Recursion in model order for task execution time estimation in a software pipelineNabeel Iqbal, M. A. Siddique, Jörg Henkel. date 2010: 953-956 [doi]

SETS: Stochastic execution time scheduling for multicore systems by joint state space and Monte CarloNabeel Iqbal, Jörg Henkel. iccad 2010: 123-130 [doi]

KAHRISMA: A novel Hypermorphic Reconfigurable-Instruction-Set Multi-grained-Array architectureRalf König, Lars Bauer, Timo Stripf, Muhammad Shafique, Waheed Ahmed, Jürgen Becker, Jörg Henkel. date 2010: 819-824 [doi]

Optimizing the H.264/AVC Video Encoder Application Structure for Reconfigurable and Application-Specific PlatformsMuhammad Shafique, Lars Bauer, Jörg Henkel. vlsisp, 60(2):183-210, 2010. [doi]

Selective instruction set muting for energy-aware adaptive processorsMuhammad Shafique, Lars Bauer, Jörg Henkel. iccad 2010: 353-360 [doi]

enBudget: A Run-Time Adaptive Predictive Energy-Budgeting scheme for energy-aware Motion Estimation in H.264/MPEG-4 AVC video encoderMuhammad Shafique, Lars Bauer, Jörg Henkel. date 2010: 1725-1730 [doi]

An HVS-based Adaptive Computational Complexity Reduction Scheme for H.264/AVC video encoder using Prognostic Early Mode ExclusionMuhammad Shafique, Bastian Molkenthin, Jörg Henkel. date 2010: 1713-1718 [doi]

2009

RISPP: A run-time adaptive reconfigurable embedded processorLars Bauer, Muhammad Shafique, Jörg Henkel. fpl 2009: 725-726 [doi]

TAPE: Thermal-aware agent-based power econom multi/many-core architecturesThomas Ebi, Mohammad Abdullah Al Faruque, Jörg Henkel. iccad 2009: 302-309 [doi]

Security and Dependability of Embedded Systems: A Computer Architects PerspectiveJörg Henkel, Vijaykrishnan Narayanan, Sri Parameswaran, Roshan G. Ragel. vlsid 2009: 30-32 [doi]

REMiS: Run-time energy minimization scheme in a reconfigurable processor with dynamic power-gated instruction setMuhammad Shafique, Lars Bauer, Jörg Henkel. iccad 2009: 55-62 [doi]

Non-linear rate control for H.264/AVC video encoder with multiple picture types using image-statistics and motion-based Macroblock PrioritizationMuhammad Shafique, Bastian Molkenthin, Jörg Henkel. icip 2009: 3429-3432 [doi]

2008

Run-time instruction set selection in a transmutable embedded processorLars Bauer, Muhammad Shafique, Jörg Henkel. dac 2008: 56-61 [doi]

Run-time System for an Extensible Embedded Processor with Dynamic Instruction SetLars Bauer, Muhammad Shafique, Stephanie Kreutz, Jörg Henkel. date 2008: 752-757 [doi]

A computation- and communication- infrastructure for modular special instructions in a dynamically reconfigurable processorLars Bauer, Muhammad Shafique, Jörg Henkel. fpl 2008: 203-208 [doi]

Efficient Resource Utilization for an Extensible Processor Through Dynamic Instruction Set AdaptationLars Bauer, Muhammad Shafique, Jörg Henkel. tvlsi, 16(10):1295-1308, 2008. [doi]

FBT: filled buffer technique to reduce code size for VLIW processorsTalal Bonny, Jörg Henkel. iccad 2008: 549-554 [doi]

Efficient Code Compression for Embedded ProcessorsTalal Bonny, Jörg Henkel. tvlsi, 16(12):1696-1707, 2008. [doi]

Instruction Re-encoding Facilitating Dense Embedded CodeTalal Bonny, Jörg Henkel. date 2008: 770-775 [doi]

QoS-supported On-chip Communication for Multi-processorsMohammad Abdullah Al Faruque, Jörg Henkel. ijpp, 36(1):114-139, 2008. [doi]

ROAdNoC: runtime observability for an adaptive network on chip architectureMohammad Abdullah Al Faruque, Thomas Ebi, Jörg Henkel. iccad 2008: 543-548 [doi]

Minimizing Virtual Channel Buffer for Routers in On-chip Communication ArchitecturesMohammad Abdullah Al Faruque, Jörg Henkel. date 2008: 1238-1243 [doi]

ADAM: run-time agent-based distributed application mapping for on-chip communicationMohammad Abdullah Al Faruque, Rudolf Krist, Jörg Henkel. dac 2008: 760-765 [doi]

Block cache for embedded systemsDominic Hillenbrand, Jörg Henkel. aspdac 2008: 322-327 [doi]

A Flexible Framework for Communication Evaluation in SoC DesignPraveen Kalla, Xiaobo Sharon Hu, Jörg Henkel. ijpp, 36(5):457-477, 2008. [doi]

Guest Editorial Special Section on Low-Power Electronics and DesignDiana Marculescu, Jörg Henkel. tvlsi, 16(6):609-610, 2008. [doi]

Proceedings of the 2008 International Symposium on Low Power Electronics and Design, 2008, Bangalore, India, August 11-13, 2008Vijaykrishnan Narayanan, C. P. Ravikumar, Jörg Henkel, Ali Keshavarzi, Vojin G. Oklobdzija, Barry M. Pangrle, editors, ACM, 2008.

Dependability and Security Will Change Embedded ComputingDimitrios N. Serpanos, Jörg Henkel. Computer, 41(1):103-105, 2008. [doi]

3-tier dynamically adaptive power-aware motion estimator for h.264/AVC video encodingMuhammad Shafique, Lars Bauer, Jörg Henkel. islped 2008: 147-152 [doi]

2007

RISPP: Rotating Instruction Set Processing PlatformLars Bauer, Muhammad Shafique, Simon Kramer 0002, Jörg Henkel. dac 2007: 791-796 [doi]

A Self-Adaptive Extensible Embedded ProcessorLars Bauer, Muhammad Shafique, Dirk Teufel, Jörg Henkel. saso 2007: 344-350 [doi]

Efficient code density through look-up table compressionTalal Bonny, Jörg Henkel. date 2007: 809-814 [doi]

Instruction Splitting for Efficient Code CompressionTalal Bonny, Jörg Henkel. dac 2007: 646-651 [doi]

Transaction Specific Virtual Channel Allocation in QoS Supported On-chip CommunicationMohammad Abdullah Al Faruque, Jörg Henkel. asap 2007: 48-53 [doi]

Run-time adaptive on-chip communication schemeMohammad Abdullah Al Faruque, Thomas Ebi, Jörg Henkel. iccad 2007: 26-31 [doi]

Instruction trace compression for rapid instruction cache simulationAndhi Janapsatya, Aleksandar Ignjatovic, Sri Parameswaran, Jörg Henkel. date 2007: 803-808 [doi]

An Optimized Application Architecture of the H.264 Video Encoder for Application Specific PlatformsMuhammad Shafique, Lars Bauer, Jörg Henkel. estimedia 2007: 119-124 [doi]

2006

Digital On-Demand Computing Organism for Real-Time SystemsJürgen Becker, Kurt Brändle, Uwe Brinkschulte, Jörg Henkel, Wolfgang Karl, Thorsten Köster, Michael Wenz, Heinz Wörn. arcs 2006: 230-245

Using Lin-Kernighan algorithm for look-up table compression to improve code densityTalal Bonny, Jörg Henkel. glvlsi 2006: 259-265 [doi]

Bounded arbitration algorithm for QoS-supported on-chip communicationMohammad Abdullah Al Faruque, Gereon Weiss, Jörg Henkel. codes 2006: 76-81 [doi]

Distance-based recent use (DRU): an enhancement to instruction cache replacement policies for transition energy reductionPraveen Kalla, Xiaobo Sharon Hu, Jörg Henkel. tvlsi, 14(1):69-80, 2006. [doi]

Using Shiftable Content Addressable Memories to Double Memory Capacity on Embedded SystemsHaris Lekatsas, Jörg Henkel, Venkata Jakkula, Srimat T. Chakradhar. vlsid 2006: 639-644 [doi]

Proceedings of the 2006 International Symposium on Low Power Electronics and Design, 2006, Tegernsee, Bavaria, Germany, October 4-6, 2006Wolfgang Nebel, Mircea R. Stan, Anand Raghunathan, Jörg Henkel, Diana Marculescu, editors, ACM, 2006.

A design methodology for application-specific networks-on-chipJiang Xu, Wayne Wolf, Jörg Henkel, Srimat T. Chakradhar. tecs, 5(2):263-280, 2006. [doi]

2005

Battery-aware instruction generation for embedded processorsNewton Cheung, Sri Parameswaran, Jörg Henkel. aspdac 2005: 553-556 [doi]

A flexible framework for communication evaluation in SoC designPraveen Kalla, Xiaobo Sharon Hu, Jörg Henkel. aspdac 2005: 956-959 [doi]

Approximate arithmetic coding for bus transition reduction in low power designsHaris Lekatsas, Jörg Henkel, Wayne Wolf. tvlsi, 13(6):696-707, 2005. [doi]

A Unified Architecture for Adaptive Compression of Data and Code on Embedded SystemsHaris Lekatsas, Jörg Henkel, Venkata Jakkula, Srimat T. Chakradhar. vlsid 2005: 117-123 [doi]

A Methodology for Architectural Design of Multimedia Multiprocessor SoCsTiehan Lv, Jiang Xu, Wayne Wolf, Burak Ozer, Jörg Henkel, Srimat T. Chakradhar. dt, 22(1):18-26, 2005. [doi]

Instruction code mapping for performance increase and energy reduction in embedded computer systemsSri Parameswaran, Jörg Henkel. tvlsi, 13(4):498-502, 2005. [doi]

H.264 HDTV Decoder Using Application-Specific Networks-On-ChipJiang Xu, Wayne Wolf, Jörg Henkel, Srimat T. Chakradhar. icmcs 2005: 1508-1511 [doi]

A methodology for design, modeling, and analysis of networks-on-chipJiang Xu, Wayne Wolf, Jörg Henkel, Srimat T. Chakradhar. iscas 2005: 1778-1781 [doi]

2004

MINCE: Matching INstructions Using Combinational Equivalence for Extensible ProcessorNewton Cheung, Sri Parameswaran, Jörg Henkel, Jeremy Chan. date 2004: 1020-1027 [doi]

A quantitative study and estimation models for extensible instructions in embedded processorsNewton Cheung, Sri Parameswaran, Jörg Henkel. iccad 2004: 183-189 [doi]

On-chip networks: A scalable, communication-centric embedded system design paradigmJörg Henkel, Wayne Wolf, Srimat T. Chakradhar. vlsid 2004: 845 [doi]

Cypress: Compression and Encryption of Data and Code for Embedded Multimedia SystemsHaris Lekatsas, Jörg Henkel, Srimat T. Chakradhar, Venkata Jakkula. dt, 21(5):406-415, 2004. [doi]

Distributed Multimedia System Design: A Holistic PerspectiveRadu Marculescu, Massoud Pedram, Jörg Henkel. date 2004: 1342-1349 [doi]

A Case Study in Networks-on-Chip Design for Embedded VideoJiang Xu, Wayne Wolf, Jörg Henkel, Srimat T. Chakradhar, Tiehan Lv. date 2004: 770-777 [doi]

2003

Specification and Design of Multi-Million Gate SOCsRamesh Chandra, Preeti Ranjan Panda, Jörg Henkel, Sri Parameswaran, Loganath Ramachandran. vlsid 2003: 18-19 [doi]

Rapid Configuration and Instruction Selection for an ASIP: A Case StudyNewton Cheung, Jörg Henkel, Sri Parameswaran. date 2003: 10802-10809 [doi]

INSIDE: INstruction Selection/Identification & Design Exploration for Extensible ProcessorsNewton Cheung, Sri Parameswaran, Jörg Henkel. iccad 2003: 291-298 [doi]

Closing the SoC Design GapJörg Henkel. Computer, 36(9):119-121, 2003. [doi]

Guest Editors Introduction: Taking on the Embedded System Design ChallengeJörg Henkel, Xiaobo Hu, Shuvra S. Bhattacharyya. Computer, 36(4):35-37, 2003. [doi]

LRU-SEQ: A Novel Replacement Policy for Transition Energy Reduction in Instruction CachesPraveen Kalla, Xiaobo Sharon Hu, Jörg Henkel. iccad 2003: 518-522 [doi]

CoCo: a hardware/software platform for rapid prototyping of code compression technologiesHaris Lekatsas, Jörg Henkel, Srimat T. Chakradhar, Venkata Jakkula, Murugan Sankaradass. dac 2003: 306-311 [doi]

Enhancing Signal Integrity through a Low-Overhead Encoding Scheme on Address BusesTiehan Lv, Jörg Henkel, Haris Lekatsas, Wayne Wolf. date 2003: 10542-10549 [doi]

A dictionary-based en/decoding scheme for low-power data busesTiehan Lv, Jörg Henkel, Haris Lekatsas, Wayne Wolf. tvlsi, 11(5):943-951, 2003. [doi]

2002

System-level exploration for Pareto-optimal configurations in parameterized system-on-a-chipTony Givargis, Frank Vahid, Jörg Henkel. tvlsi, 10(4):416-422, 2002. [doi]

Instruction-based system-level power evaluation of system-on-a-chip peripheral coresTony Givargis, Frank Vahid, Jörg Henkel. tvlsi, 10(6):856-863, 2002. [doi]

Proceedings of the Tenth International Symposium on Hardware/Software Codesign, CODES 2002, Estes Park, Colorado, USA, May 6-8, 2002Jörg Henkel, Xiaobo Sharon Hu, Rajesh Gupta, Sri Parameswaran, editors, ACM, 2002.

Avalanche: an environment for design space exploration and optimization of low-power embedded systemsJörg Henkel, Yanbing Li. tvlsi, 10(4):454-468, 2002. [doi]

Dynamic Runtime Re-Scheduling Allowing Multiple Implementations of a Task for Platform-Based DesignsTin-Man Lee, Wayne Wolf, Jörg Henkel. date 2002: 296-301 [doi]

ETAM++: Extended Transition Activity Measure for Low Power Address Bus DesignsHaris Lekatsas, Jörg Henkel. vlsid 2002: 113-120 [doi]

Design of an one-cycle decompression hardware for performance increase in embedded systemsHaris Lekatsas, Jörg Henkel, Venkata Jakkula. dac 2002: 34-39 [doi]

An Adaptive Dictionary Encoding Scheme for SOC Data BusesTiehan Lv, Wayne Wolf, Jörg Henkel, Haris Lekatsas. date 2002: 1059 [doi]

2001

Trace-driven system-level power evaluation of system-on-a-chip peripheral coresTony Givargis, Frank Vahid, Jörg Henkel. aspdac 2001: 306-312 [doi]

System-Level Exploration for Pareto-Optimal Configurations in Parameterized Systems-on-a-ChipTony Givargis, Frank Vahid, Jörg Henkel. iccad 2001: 25-30 [doi]

Evaluating power consumption of parameterized cache and bus architectures in system-on-a-chip designsT. D. Givargis, Frank Vahid, Jörg Henkel. tvlsi, 9(4):500-508, 2001. [doi]

A:::2:::BC: Adaptive Address Bus Coding for Low Power Deep Sub-Micron DesignsJörg Henkel, Haris Lekatsas. dac 2001: 744-749 [doi]

Design and simulation of a pipelined decompression architecture for embedded systemsHaris Lekatsas, Jörg Henkel, Wayne Wolf. isss 2001: 63-68

Proceedings of the Ninth International Symposium on Hardware/Software Codesign, CODES 2001, Copenhagen, Denmark, 2001Jan Madsen, Jörg Henkel, Xiaobo Sharon Hu, editors, ACM, 2001.

I-CoPES: Fast Instruction Code Placement for Embedded Systems to Improve Performance and Energy EfficiencySri Parameswaran, Jörg Henkel. iccad 2001: 635 [doi]

2000

A hybrid approach for core-based system-level power modelingTony Givargis, Frank Vahid, Jörg Henkel. aspdac 2000: 141-146 [doi]

Instruction-based System-level Power Evaluation of System-On-A-Chip Peripheral CoresTony Givargis, Frank Vahid, Jörg Henkel. isss 2000: 163-171 [doi]

Fast Cache and Bus Power Estimation for Parameterized System-on-a-Chip DesignJörg Henkel, Tony Givargis, Frank Vahid. date 2000: 333 [doi]

A Decompression Architecture for Low Power Embedded SystemsHaris Lekatsas, Jörg Henkel, Wayne Wolf. iccd 2000: 571-574 [doi]

Arithmetic Coding for Low Power Embedded System DesignHaris Lekatsas, Wayne Wolf, Jörg Henkel. dcc 2000: 430-439 [doi]

Code compression for low power embedded system designHaris Lekatsas, Jörg Henkel, Wayne Wolf. dac 2000: 294-299 [doi]

Code compression as a variable in hardware/software co-designHaris Lekatsas, Jörg Henkel, Wayne Wolf. codes 2000: 120-124 [doi]

1999

Interface and cache power exploration for core-based embedded system designTony Givargis, Jörg Henkel, Frank Vahid. iccad 1999: 270-273 [doi]

A Methodology for Minimizing Power Dissipation of Embedded Systems through Hardware/Software PartitioningJörg Henkel. glvlsi 1999: 86 [doi]

A Low Power Hardware/Software Partitioning Approach for Core-Based Embedded SystemsJörg Henkel. dac 1999: 122-127 [doi]

1998

Energy-conscious HW/SW-partitioning of embedded systems: a case study on an MPEG-2 encoderJörg Henkel, Yanbing Li. codes 1998: 23-27 [doi]

A Framework for Estimation and Minimizing Energy Dissipation of Embedded HW/SW SystemsYanbing Li, Jörg Henkel. dac 1998: 188-193 [doi]

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