David Esseni - researchr profile publications

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Publications with a 'David Esseni' as author, editor, or advisor:

Design of UWB LNA in 45nm CMOS technology: Planar bulk vs. FinFETDavide Ponton, Pierpaolo Palestri, David Esseni, Luca Selmi, Marc Tiebout, Bertrand Parvais, Gerhard Knoblinger. iscas 2008: 2701-2704 [doi]
Tunnel FETs for Ultralow Voltage Digital VLSI Circuits: Part I - Device-Circuit Interaction and Evaluation at Device LevelDavid Esseni, Manuel Guglielmini, Bernard Kapidani, Tommaso Rollo, Massimo Alioto. tvlsi, 22(12):2488-2498, 2014. [doi]
Operation and Design of Ferroelectric FETs for a BEOL Compatible Device ImplementationDaniel Lizzit, David Esseni. essderc 2021: 215-218 [doi]
Performance and Impact of Process Variations in Tunnel-FET Ultra-Low Voltage Digital CircuitsMassimo Alioto, David Esseni. sbcci 2014: 32 [doi]
Device-circuit co-design and comparison of ultra-low voltage Tunnel-FET and CMOS digital circuitsDavid Esseni, Massimo Alioto. newcas 2014: 321-324 [doi]
Leakage-Delay Tradeoff in FinFET Logic Circuits: A Comparative Analysis With Bulk TechnologyMatteo Agostinelli, Massimo Alioto, David Esseni, Luca Selmi. tvlsi, 18(2):232-245, 2010. [doi]
A numerical model for the oscillation frequency, the amplitude and the phase-noise of MOS-current-mode-logic ring oscillatorsMichele Nocente, Donald Fontanelli, Pierpaolo Palestri, Roberto Nonis, David Esseni, Luca Selmi. ijcta, 38(6):607-629, 2010. [doi]
Strain engineering of single-layer MoS2Manouchehr Hosseini, Mohammad Elahi, Ebrahim Asl Soleimani, Mahdi Pourfath, David Esseni. essderc 2015: 314-317 [doi]
The Monte Carlo approach to transport modeling in deca-nanometer MOSFETsEnrico Sangiorgi, Pierpaolo Palestri, David Esseni, Claudio Fiegna, Luca Selmi. esscirc 2007: 48-57 [doi]
Improved surface roughness modeling and mobility projections in thin film MOSFETsO. Badami, E. Caruso, Daniel Lizzit, David Esseni, Pierpaolo Palestri, Luca Selmi. essderc 2015: 306-309 [doi]
Reducing the tunneling barrier thickness of bilayer ferroelectric tunnel junctions with metallic electrodesSuzanne Lancaster, Mattia Segatto, Cláudia Silva, Benjamin Max, Thomas Mikolajick, David Esseni, Francesco Driussi, Stefan Slesazeck. drc 2023: 1-2 [doi]
Reducing the Spike Rate in Deep Spiking Neural NetworksRiccardo Fontanini, David Esseni, Mirko Loghi. icons2 2022: [doi]
Supersteep retrograde doping in ferroelectric MOSFETs for sub-60mV/dec subthreshold swingTommaso Rollo, David Esseni. essderc 2016: 360-363 [doi]
Polarization switching and interface charges in BEOL compatible Ferroelectric Tunnel JunctionsRiccardo Fontanini, Justine Barbot, M. Segatto, Suzanne Lancaster, Quang T. Duong, Francesco Driussi, Laurent Grenouillet, Francois Triozon, Jean Coignus, Thomas Mikolajick, Stefan Slesazeck, David Esseni. essderc 2021: 255-258 [doi]
Adiabatic Spiking Neurons and Synapses for Ultra-Low Energy Neuromorphic ComputingMarco Massarotto, S. Saggini, Mirko Loghi, David Esseni. icecsys 2023: 1-4 [doi]
A novel back-biasing low-leakage technique for FinFET forced stacksDavide Baccarin, David Esseni, Massimo Alioto. iscas 2011: 2079-2082 [doi]
Optimized programming of multilevel flash EEPROMsRoberto Versari, David Esseni, Gianluca Falavigna, Massimo Lanzoni, Bruno Riccò. icecsys 2001: 945-948 [doi]
A Multi-Subband Monte Carlo study of electron transport in strained SiGe n-type FinFETsDaniel Lizzit, Pierpaolo Palestri, David Esseni, Francesco Conzatti, Luca Selmi. essderc 2012: 322-325 [doi]
Polarization switching and AC small-signal capacitance in Ferroelectric Tunnel JunctionsMattia Segatto, Marco Massarotto, Suzanne Lancaster, Quang T. Duong, A. Affanni, Riccardo Fontanini, Francesco Driussi, Daniel Lizzit, Thomas Mikolajick, Stefan Slesazeck, David Esseni. essderc 2022: 340-343 [doi]
Mixed FBB/RBB: A Novel Low-Leakage Technique for FinFET Forced StacksDavide Baccarin, David Esseni, Massimo Alioto. tvlsi, 20(8):1467-1472, 2012. [doi]
Tunnel FETs for Ultra-Low Voltage Digital VLSI Circuits: Part II-Evaluation at Circuit Level and Design PerspectivesMassimo Alioto, David Esseni. tvlsi, 22(12):2499-2512, 2014. [doi]
Multi-level Operation of FeFETs Memristors: the Crucial Role of Three Dimensional EffectsDaniel Lizzit, Thomas Bernardi, David Esseni. essderc 2022: 344-347 [doi]
State-of-the-art semi-classical Monte Carlo method for carrier transport in nanoscale transistorsPierpaolo Palestri, E. Caruso, Francesco Driussi, David Esseni, Daniel Lizzit, Patrik Osgnach, Stefano Venica, Luca Selmi. miproBIS 2015: 1-8 [doi]
Design of Ultra-Wideband Low-Noise Amplifiers in 45-nm CMOS Technology: Comparison Between Planar Bulk and SOI FinFET DevicesDavide Ponton, Pierpaolo Palestri, David Esseni, Luca Selmi, Marc Tiebout, Bertrand Parvais, Domagoj Siprak, Gerhard Knoblinger. tcas, 56-I(5):920-932, 2009. [doi]
Analysis of TFET based 6T SRAM cells implemented with state of the art silicon nanowiresSebastiano Strangio, Pierpaolo Palestri, David Esseni, Luca Selmi, Felice Crupi. essderc 2014: 282-285 [doi]
Performance study of strained III-V materials for ultra-thin body transistor applicationsMartin Rau, Troels Markussen, Enrico Caruso, David Esseni, Elena Gnani, Antonio Gnudi, Petr A. Khomyakov, Mathieu Luisier, Patrik Osgnach, Pierpaolo Palestri, Susanna Reggiani, Andreas Schenk, Luca Selmi, Kurt Stokbro. essderc 2016: 184-187 [doi]

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