Journal: IEEE Trans. on CAD of Integrated Circuits and Systems

Volume 41, Issue 9

2768 -- 2779Kangkang Xu, Yang Yu 0015, Xu Fang. The Detection of Open and Leakage Faults for Prebond TSV Test Based on Weak Current Source
2780 -- 2793Konstantinos Touloupas, Paul P. Sotiriadis. LoCoMOBO: A Local Constrained Multiobjective Bayesian Optimization for Analog Circuit Sizing
2794 -- 2807Keertana Settaluri, Zhaokai Liu, Rishubh Khurana, Arash Mirhaj, Rajeev Jain, Borivoje Nikolic. Automated Design of Analog Circuits Using Reinforcement Learning
2808 -- 2820Yongchen Wang, Ying Wang 0001, Huawei Li, Xiaowei Li 0001. An Efficient Deep Learning Accelerator Architecture for Compressed Video Analysis
2821 -- 2834Honghui Tang, Qiang Liu 0011. MPFA: An Efficient Multiple Faults-Based Persistent Fault Analysis Method for Low-Cost FIA
2835 -- 2848Chun-Feng Wu, Martin Kuo, Ming-Chang Yang, Yuan-Hao Chang 0001. Performance Enhancement of SMR-Based Deduplication Systems
2849 -- 2862Weiguang Pang, Xu Jiang 0004, Mingsong Lv, Teng Gao, Di Liu, Wang Yi 0001. Toward the Predictability of Dynamic Real-Time DNN Inference
2863 -- 2876David Kuang-Hui Yu, Jen-Wei Hsieh. Differential Evolution Algorithm With Asymmetric Coding for Solving the Reliability Problem of 3D-TLC CT Flash-Memory Storage Systems
2877 -- 2890Yang Wang 0082, Xu Jiang 0004, Nan Guan, Yue Tang, Weichen Liu. Locking Protocols for Parallel Real-Time Tasks With Semaphores Under Federated Scheduling
2891 -- 2900Yiwen Zhang 0002. Energy-Aware Nonpreemptive Scheduling of Mixed-Criticality Real-Time Task Systems
2901 -- 2914Saravanan Sethuraman, Venkata Kalyan Tavva, M. B. Srinivas. Techniques to Improve Write and Retention Reliability of STT-MRAM Memory Subsystem
2915 -- 2928Mark Wijtvliet, Akash Kumar 0001, Henk Corporaal. Blocks: Challenging SIMDs and VLIWs With a Reconfigurable Architecture
2929 -- 2942Baofen Yuan, Jianfeng Zhu 0001, Xingchen Man, Zijiao Ma, Shouyi Yin, Shaojun Wei, Leibo Liu. Dynamic-II Pipeline: Compiling Loops With Irregular Branches on Static-Scheduling CGRA
2943 -- 2956Khouloud Bouaziz, Sonda Chtourou, Zied Marrakchi, Abdulfattah Mohammad Obeid, Mohamed Abid. Mesh of Trees FPGA Architecture: Exploration and Optimization
2957 -- 2969Tao Luo, Liwei Yang, Huaipeng Zhang, Chuping Qu, Xuan Wang, Yingnan Cui, Weng-Fai Wong, Rick Siow Mong Goh. NC-Net: Efficient Neuromorphic Computing Using Aggregated Subnets on a Crossbar-Based Architecture With Nonvolatile Memory
2970 -- 2983Sanjai Narain, Emily Mak, Dana Chee, Brendan J. Englot, Kishore Pochiraju, Niraj K. Jha, Karthik S. Narayan. Fast Design Space Exploration of Nonlinear Systems: Part I
2984 -- 2999Prerit Terway, Kenza Hamidouche, Niraj K. Jha. Fast Design Space Exploration of Nonlinear Systems: Part II
3000 -- 3011Renao Yan, Qinghui Hong, Chunhua Wang, Jingru Sun, Ya Li. Multilayer Memristive Neural Network Circuit Based on Online Learning for License Plate Detection
3012 -- 3025Shayan Hassantabar, Zeyu Wang 0004, Niraj K. Jha. SCANN: Synthesis of Compact and Accurate Neural Networks
3026 -- 3039Myeonggu Kang, Hyein Shin, Lee-Sup Kim. A Framework for Accelerating Transformer-Based Language Model on ReRAM-Based Architecture
3040 -- 3051Abdelrahman Hosny, Sherief Reda. Characterizing and Optimizing EDA Flows for the Cloud
3052 -- 3065Cong Xu, Chunhua Wang, Jinguang Jiang, Jingru Sun, Hairong Lin. Memristive Circuit Implementation of Context-Dependent Emotional Learning Network and Its Application in Multitask
3066 -- 3077Liang Chen, Sheriff Sadiqbatcha, Hussam Amrouch, Sheldon X.-D. Tan. Electrothermal Simulation and Optimal Design of Thermoelectric Cooler Using Analytical Approach
3078 -- 3091Rui Zhang 0048, Taizhi Liu, Kexin Yang 0001, Linda Milor. CacheEM: For Reliability Analysis on Cache Memory Aging Due to Electromigration
3092 -- 3103Zhifeng Lin, Yanyue Xie, Peng Zou, Sifei Wang, Jun Yu 0010, Jianli Chen. An Incremental Placement Flow for Advanced FPGAs With Timing Awareness
3104 -- 3117Yi-Chen Lu, Jeehyun Lee, Anthony Agnesina, Kambiz Samadi, Sung Kyu Lim. A Clock Tree Prediction and Optimization Framework Using Generative Adversarial Learning
3118 -- 3131Guojin Chen, Wanli Chen, Qi Sun, Yuzhe Ma, Haoyu Yang, Bei Yu 0001. DAMO: Deep Agile Mask Optimization for Full-Chip Scale
3132 -- 3142Yibo Lin, Tong Qu, Zongqing Lu, Yajuan Su, Yayi Wei. Asynchronous Reinforcement Learning Framework and Knowledge Transfer for Net-Order Exploration in Detailed Routing
3143 -- 3156Qisheng Wang, Riling Li, Mingsheng Ying. Equivalence Checking of Sequential Quantum Circuits
3157 -- 3161Adrian Tatulian, Ronald F. DeMara. Nonuniform Compressive Sensing via Ohmic Voltage Attenuation: A Memristive Crossbar Design Approach Leveraging Intrinsic Computation

Volume 41, Issue 8

2372 -- 2379Xiaopeng Wu, Mingpeng Cao, Guangbao Shan, Yintang Yang. A Fast Analysis Method of Multiphysics Coupling for 3-D Microsystem
2380 -- 2392Satyajit Mohapatra, Nihar Ranjan Mohapatra. Dispersion in Placement: Quantification and Insights
2393 -- 2406Zahra Ramezani, Koen Claessen, Nicholas Smallbone, Martin Fabian, Knut Åkesson. Testing Cyber-Physical Systems Using a Line-Search Falsification Method
2407 -- 2420Yangguang Cui, Kun Cao, Guitao Cao, Meikang Qiu, Tongquan Wei. Client Scheduling and Resource Management for Efficient Training in Heterogeneous IoT-Edge Federated Learning
2421 -- 2434Jiaji He, Haocheng Ma, Max Panoff, Hanning Wang, Yiqiang Zhao, Leibo Liu, Xiaolong Guo, Yier Jin. Security Oriented Design Framework for EM Side-Channel Protection in RTL Implementations
2435 -- 2448Lilas Alrahis, Abhrajit Sengupta, Johann Knechtel, Satwik Patnaik, Hani H. Saleh, Baker Mohammad, Mahmoud Al-Qutayri, Ozgur Sinanoglu. GNN-RE: Graph Neural Networks for Reverse Engineering of Gate-Level Netlists
2449 -- 2462Julian Leonhard, Nimisha Limaye, Shadi Turk, Alhassan Sayed, Alán Rodrigo Díaz Rizo, Hassan Aboushady, Ozgur Sinanoglu, Haralampos-G. Stratigopoulos. Digitally Assisted Mixed-Signal Circuit Security
2463 -- 2476Shuo-Han Chen, Chun-Feng Wu, Ming-Chang Yang, Yuan-Hao Chang 0001. A File-Oriented Fast Secure Deletion Strategy for Shingled Magnetic Recording Drives
2477 -- 2489Yubiao Pan, Hao Chen, Jianing Zhao, Yinlong Xu. HCFTL: A Locality-Aware Flash Translation Layer for Efficient Address Translation
2490 -- 2503Mohamed Ibrahim 0002, Zhanwei Zhong, Bhargab B. Bhattacharya, Krishnendu Chakrabarty. Efficient Regulation of Synthetic Biocircuits Using Droplet-Aliquot Operations on MEDA Biochips
2504 -- 2517Mahmoud Elfar, Tung-Che Liang, Krishnendu Chakrabarty, Miroslav Pajic. Formal Synthesis of Adaptive Droplet Routing for MEDA Biochips
2518 -- 2531Matthias Függer, Attila Kinali, Christoph Lenzen 0001, Ben Wiederhake. Fast All-Digital Clock Frequency Adaptation Circuit for Voltage Droop Tolerance
2532 -- 2545Mohamed A. Elgammal, Kevin E. Murray, Vaughn Betz. RLPlace: Using Reinforcement Learning and Smart Perturbations to Optimize FPGA Placement
2546 -- 2559Yun Liang 0001, Qingcheng Xiao, Liqiang Lu, JiaMing Xie. FCNNLib: A Flexible Convolution Algorithm Library for Deep Learning on FPGAs
2560 -- 2572Xin Fan 0002, Niklas Meyer, Tobias Gemmeke. Compiling All-Digital-Embedded Content Addressable Memories on Chip for Edge Application
2573 -- 2586Siang-Yun Lee, Heinz Riener, Alan Mishchenko, Robert K. Brayton, Giovanni De Micheli. A Simulation-Guided Paradigm for Logic Synthesis and Verification
2587 -- 2597Pengcheng Zhu, Shiguang Feng, Zhijin Guan. An Iterated Local Search Methodology for the Qubit Mapping Problem
2598 -- 2610Yifan Chang, Yifan Wang, Jian Peng, Ziyi Dong, Haifeng Li 0007, Wenbo Li. MFS: A Brain-Inspired Memory Formation System for GAN
2611 -- 2624Wei Jiang 0016, Xiangyu Wen, Jinyu Zhan, Xupeng Wang, Ziwei Song. Interpretability-Guided Defense Against Backdoor Attacks to Deep Neural Networks
2625 -- 2637Abhiroop Bhattacharjee, Lakshya Bhatnagar, Youngeun Kim, Priyadarshini Panda. NEAT: Nonlinearity Aware Training for Accurate, Energy-Efficient, and Robust Implementation of Neural Networks on 1T-1R Crossbars
2638 -- 2651Paolo Manfredi, Riccardo Trinchero. A Probabilistic Machine Learning Approach for the Uncertainty Quantification of Electronic Circuits Based on Gaussian Process Regression
2652 -- 2656Luigi Colalongo, Anna Richelli. A Second-Order Surface Potential Core Model for Submicron MOSFETs
2657 -- 2670Hao Geng, Yuzhe Ma, Qi Xu, Jin Miao, Subhendu Roy, Bei Yu 0001. High-Speed Adder Design Space Exploration via Graph Neural Processes
2671 -- 2684Bentian Jiang, Lixin Liu, Yuzhe Ma, Bei Yu 0001, Evangeline F. Y. Young. Neural-ILT 2.0: Migrating ILT to Domain-Specific and Multitask-Enabled Neural Network
2685 -- 2698Hao Geng, Haoyu Yang, Lu Zhang, Fan Yang 0001, Xuan Zeng 0001, Bei Yu 0001. Hotspot Detection via Attention-Based Deep Layout Metric Learning
2699 -- 2713Jin-Tai Yan. Bus Assignment Considering Flexible Escape Routing for Layer Minimization in PCB Designs
2714 -- 2727Mahmut Burak Karadeniz, Mustafa Altun. TALIPOT: Energy-Efficient DNN Booster Employing Hybrid Bit Parallel-Serial Processing in MSB-First Fashion
2728 -- 2738Muhammad Ibtesam, Umair Saeed Solangi, Jinuk Kim, Muhammad Adil Ansari, Sungju Park. Highly Efficient Test Architecture for Low-Power AI Accelerators
2739 -- 2752Hogyeong Kim, Hayoung Lee, Donghyun Han, Sungho Kang. Multibank Optimized Redundancy Analysis Using Efficient Fault Collection
2753 -- 2757Jen-Wei Hsieh, Yueh-Ting Hou, Tai-Chieh Chang. Alternative Encoding: A Two-Step Transition Reduction Scheme for MLC STT-RAM Cache
2758 -- 2762Md Rubel Ahmed, Hao Zheng, Parijat Mukherjee, Mahesh C. Ketkar, Jin Yang 0006. Mining Patterns From Concurrent Execution Traces
2763 -- 2767Pragnan Chakravorty. A Modified General Diode Equation

Volume 41, Issue 7

1976 -- 1989Inga Abel, Maximilian Neuner, Helmut E. Graeb. A Hierarchical Performance Equation Library for Basic Op-Amp Design
1990 -- 2003Tinghuan Chen, Qi Sun, Canhui Zhan, Changze Liu, Huatao Yu, Bei Yu 0001. Deep H-GCN: Fast Analog IC Aging-Induced Degradation Estimation
2004 -- 2009Michael Zuzak, Ankit Mondal, Ankur Srivastava 0001. Evaluating the Security of Logic-Locked Probabilistic Circuits
2010 -- 2023Dimitris Mouris, Charles Gouert, Nektarios Georgios Tsoutsos. Privacy-Preserving IP Verification
2024 -- 2037Zongsheng Hou, Neng Zhang, Bohan Yang 0004, Hanning Wang, Min Zhu 0001, Shouyi Yin, Shaojun Wei, Leibo Liu. Efficient FHE Radix-2 Arithmetic Operations Based on Redundant Encoding
2038 -- 2051Donghyun Min, Yungwoo Ko, Ryan Walker, JungHee Lee, Youngjae Kim 0001. A Content-Based Ransomware Detection and Backup Solid-State Drive for Ransomware Defense
2052 -- 2065Rana Elnaggar, Siyuan Chen, Peilin Song, Krishnendu Chakrabarty. Securing SoCs With FPGAs Against Rowhammer Attacks
2066 -- 2079Rana Elnaggar, Lorenzo Servadei, Shubham Mathur, Robert Wille, Wolfgang Ecker, Krishnendu Chakrabarty. Accurate and Robust Malware Detection: Running XGBoost on Runtime Data From Performance Counters
2080 -- 2093Hengshan Yue, Xiaohui Wei, Jingweijia Tan, Nan Jiang, Meikang Qiu. Eff-ECC: Protecting GPGPUs Register File With a Unified Energy-Efficient ECC Mechanism
2094 -- 2106Zihan Zhang, Jianfei Jiang 0001, Yongxin Zhu 0001, Qin Wang 0009, Zhigang Mao, Naifeng Jing. A Universal RRAM-Based DNN Accelerator With Programmable Crossbars Beyond MVM Operator
2107 -- 2114Dinesh Rajasekharan, Amol D. Gaidhane, Amit Ranjan Trivedi, Yogesh Singh Chauhan. Ferroelectric FET-Based Implementation of FitzHugh-Nagumo Neuron Model
2115 -- 2127Yintao He, Ying Wang 0001, Huawei Li, Xiaowei Li 0001. Saving Energy of RRAM-Based Neural Accelerator Through State-Aware Computing
2128 -- 2141Jinyu Zhan, Wei Jiang 0016, Ying Li, Junting Wu, Jianping Zhu, Jinghuan Yu. Accelerating Queries of Big Data Systems by Storage-Side CPU-FPGA Co-Design
2142 -- 2155Lana Josipovic, Andrea Guerrieri, Paolo Ienne. From C/C++ Code to High-Performance Dataflow Circuits
2156 -- 2169Bosheng Liu, Xiaoming Chen 0003, Yinhe Han, Jigang Wu, Liang Chang 0003, Peng Liu 0045, Haobo Xu. Search-Free Inference Acceleration for Sparse Convolutional Neural Networks
2170 -- 2184Renjian Pan, Zhaobo Zhang, Xin Li 0001, Krishnendu Chakrabarty, Xinli Gu. Unsupervised Two-Stage Root-Cause Analysis for Integrated Systems
2185 -- 2198Xing Huang, Youlin Pan, Grace Li Zhang, Bing Li 0005, Wenzhong Guo, Tsung-Yi Ho, Ulf Schlichtmann. PathDriver+: Enhanced Path-Driven Architecture Design for Flow-Based Microfluidic Biochips
2199 -- 2212Shenglan Ni, Houpeng Chen, Xi Li, Yu Lei 0003, Qian Wang, Yi Lv, Guangming Zhang, Sannian Song, Zhitang Song. Silicon Modeling of Spiking Neurons With Diverse Dynamic Behaviors
2213 -- 2222Jiahua Li, Ron Rohrer. Efficient Static-Driven Integration for Step-Function Transient Simulation
2223 -- 2236Steven Herbst, Gabriel Rutsch, Wolfgang Ecker, Mark Horowitz. An Open-Source Framework for FPGA Emulation of Analog/Mixed-Signal Integrated Circuit Designs
2237 -- 2249Yu-Sheng Lu, Yan-Lin Chen, Sheng-Jung Yu, Yao-Wen Chang. Topological Structure and Physical Layout Co-Design for Wavelength-Routed Optical Networks-on-Chip
2250 -- 2262Mengting Lu, Fang Wang 0001, Zongwei Li, Wenpeng He. EDC: An Elastic Data Cache to Optimizing the I/O Performance in Deduplicated SSDs
2263 -- 2275Rassul Bairamkulov, Abinash Roy, Mahalingam Nagarajan, Vaishnav Srinivas, Eby G. Friedman. SPROUT - Smart Power Routing Tool for Board-Level Exploration and Prototyping
2276 -- 2289Romain Mercier, Cédric Killian, Angeliki Kritikakou, Youri Helen, Daniel Chillet. BiSuT: A NoC-Based Bit-Shuffling Technique for Multiple Permanent Faults Mitigation
2290 -- 2300Bartosz Kaczmarek, Grzegorz Mrugalski, Nilanjan Mukherjee 0001, Artur Pogiel, Janusz Rajski, Lukasz Rybak 0001, Jerzy Tyszer. LBIST for Automotive ICs With Enhanced Test Generation
2301 -- 2314Ching-Yuan Chen, Krishnendu Chakrabarty. Efficient Identification of Critical Faults in Memristor-Based Inferencing Accelerators
2315 -- 2322Irith Pomeranz. GEPDFs: Path Delay Faults Based on Two-Cycle Gate-Exhaustive Faults
2323 -- 2336Chong-Siao Ye, Shi-Xuan Zheng, Fong-Jyun Tsai, Chen Wang 0014, Kuen-Jong Lee, Wu-Tung Cheng, Sudhakar M. Reddy, Justyna Zawada, Mark Kassab, Janusz Rajski. Efficient Test Compression Configuration Selection
2337 -- 2347Jun-Yu Yang, Shi-Yu Huang. Tiny Phase-Error Monitor for Fault and Soft-Error-Tolerant DLL to Support Graceful Degradation and Module-Level Testing
2348 -- 2361Arjun Chaudhuri, Chunsheng Liu, Xiaoxin Fan, Krishnendu Chakrabarty. C-Testing and Efficient Fault Localization for AI Accelerators
2362 -- 2371Sudipa Mandal, Pallab Dasgupta. Migrating Assertions From Dense to Discrete Time

Volume 41, Issue 6

1592 -- 1605Andres Goens, Timo Nicolai, Jerónimo Castrillón. mpsym: Improving Design-Space Exploration of Clustered Manycores With Arbitrary Topologies
1606 -- 1619Xiaofan Zhang, Yuan Ma, Jinjun Xiong, Wen-mei W. Hwu, Volodymyr V. Kindratenko, Deming Chen. Exploring HW/SW Co-Design for Video Analysis on CPU-FPGA Heterogeneous Systems
1620 -- 1635Lin Cheng, Peitian Pan, Zhongyuan Zhao, Krithik Ranjan, Jack Weber, Bandhav Veluri, Seyed Borna Ehsani, Max Ruttenberg, Dai Cheol Jung, Preslav Ivanov, Dustin Richmond, Michael B. Taylor, Zhiru Zhang, Christopher Batten. A Tensor Processing Framework for CPU-Manycore Heterogeneous Systems
1636 -- 1648Emanuele Parisi, Francesco Barchi, Andrea Bartolini, Andrea Acquaviva. Making the Most of Scarce Input Data in Deep Learning-Based Source Code Classification for Heterogeneous Device Mapping
1649 -- 1662Nicola Capodieci, Roberto Cavicchioli, Andrea Marongiu. A Taxonomy of Modern GPGPU Programming Methods: On the Benefits of a Unified Specification
1663 -- 1673Ismail Emir Yüksel, Behzad Salami 0001, Oguz Ergin, Osman Sabri Unsal, Adrián Cristal Kestelman. MoRS: An Approximate Fault Modeling Framework for Reduced-Voltage SRAMs
1674 -- 1686Adam Siemieniuk, Lorenzo Chelini, Asif Ali Khan, Jerónimo Castrillón, Andi Drebes, Henk Corporaal, Tobias Grosser, Martin Kong. OCC: An Automated End-to-End Machine Learning Optimizing Compiler for Computing-In-Memory
1687 -- 1692Gowrish Basavarajappa, Raafat R. Mansour. An Efficient EM-Based Synthesis Technique for Single-Band and Dual-Band Waveguide Filters
1693 -- 1703Quan Chen. EI-NK: A Robust Exponential Integrator Method With Singularity Removal and Newton-Raphson Iterations for Transient Nonlinear Circuit Simulation
1704 -- 1715Pritam Bhattacharjee, Prerna Rana, Bidyut K. Bhattacharyya, Alak Majumder. Clock-Gated Variable Frequency Signaling to Alleviate Power Supply Noise in a Packaged IC
1716 -- 1729Dominik Sisejkovic, Farhad Merchant, Lennart M. Reimann, Rainer Leupers. Deceptive Logic Locking for Hardware Integrity Protection Against Machine Learning Attacks
1730 -- 1743Nidish Vashistha, Hangwei Lu, Qihang Shi, Damon L. Woodard, Navid Asadizanjani, Mark M. Tehranipoor. Detecting Hardware Trojans Using Combined Self-Testing and Imaging
1744 -- 1756Morteza Soltani, Mehdi Kamal, Ali Afzali-Kusha, Massoud Pedram. An Adaptive Memory-Side Encryption Method for Improving Security and Lifetime of PCM-Based Main Memory
1757 -- 1770Che-Wei Chang, Chun-Feng Wu, Yuan-Hao Chang 0001, Ming-Chang Yang, Chieh-Fu Chang. Leveraging Write Heterogeneity of Phase Change Memory on Supporting Self-Balancing Binary Tree
1771 -- 1784Jinhua Cui, Weiguang Liu, Jianhang Huang, Laurence T. Yang. ADS: Leveraging Approximate Data for Efficient Data Sanitization in SSDs
1785 -- 1798Jinhua Cui, Cheng Liu, Junwei Liu, Jianhang Huang, Laurence T. Yang. Exploiting Uncorrectable Data Reuse for Performance Improvement of Flash Memory
1799 -- 1812Xiangzhong Luo, Di Liu, Shuo Huai, Hao Kong, Hui Chen, Weichen Liu. Designing Efficient DNNs via Hardware-Aware Neural Architecture Search and Beyond
1813 -- 1826Di Liu, Shi-Gui Yang, Zhenli He, Mingxiong Zhao, Weichen Liu. CARTAD: Compiler-Assisted Reinforcement Learning for Thermal-Aware Task Scheduling and DVFS on Multicores
1827 -- 1841Necati Uysal, Baogang Zhang, Sumit Kumar Jha 0001, Rickard Ewetz. XMAP: Programming Memristor Crossbars for Analog Matrix-Vector Multiplication: Toward High Precision Using Representable Matrices
1842 -- 1854Taozhong Li, Naifeng Jing, Zhigang Mao, Yiran Chen. A Hybrid-Grained Remapping Defense Scheme Against Hard Failures for Row-Column-NVM
1855 -- 1867Ankit Wagle, Sarma B. K. Vrudhula. Heterogeneous FPGA Architecture Using Threshold Logic Gates for Improved Area, Power, and Performance
1868 -- 1877Zi Wang, Benjamin Carrion Schafer. SSSL: Secure Search Space Locking of Behavioral IPs
1878 -- 1887Georgios Tziantzioulis, Ting-Jung Chang, Jonathan Balkind, Jinzheng Tu, Fei Gao 0016, David Wentzlaff. OPDB: A Scalable and Modular Design Benchmark
1888 -- 1901Bentian Jiang, Jingsong Chen, Jinwei Liu, Lixin Liu, Fangzhou Wang, Xiaopeng Zhang 0007, Evangeline F. Y. Young. CU.POKer: Placing DNNs on WSE With Optimal Kernel Sizing and Efficient Protocol Optimization
1902 -- 1915Kai Huang 0002, Siang Chen, Bowen Li, Luc Claesen, Hao Yao, Junjian Chen, Xiaowen Jiang, Zhili Liu, Dongliang Xiong. Acceleration-Aware Fine-Grained Channel Pruning for Deep Neural Networks via Residual Gating
1916 -- 1928Shiyu Xu, Qi Wang, Xingbo Wang, Shihang Wang, Terry Tao Ye. Multiplication Through a Single Look-Up-Table (LUT) in CNN Inference Computation
1929 -- 1942Jeongwoo Heo, Kwangok Jeong, Jungyun Choi, Taewhan Kim, Kyumyung Choi. Hardware Performance Monitoring Methodology at Near-Threshold Computing and Advanced Technology Nodes: From Design to Postsilicon
1943 -- 1956Supriyo Maji, Cheng-Kok Koh. A Scalable, Memory-Efficient Algorithm for Minimum Cycle Mean Calculation in Directed Graphs
1957 -- 1970Genggeng Liu, Xinghai Zhang, Wenzhong Guo, Xing Huang, Wen-Hao Liu, Kai-Yuan Chao, Ting-Chi Wang. Timing-Aware Layer Assignment for Advanced Process Technologies Considering via Pillars
1971 -- 1975Lanlan Cui, Xiaojian Liu, Fei Wu 0005, Zhonghai Lu, Changsheng Xie. A Low Bit-Width LDPC Min-Sum Decoding Scheme for NAND Flash

Volume 41, Issue 5

1196 -- 1208Qi Xu, Wenhao Sun, Song Chen 0001, Yi Kang, Xiaoqing Wen. Cellular Structure-Based Fault-Tolerance TSV Configuration in 3D-IC
1209 -- 1221Ahmet Faruk Budak, Miguel Gandara, Wei Shi, David Z. Pan, Nan Sun, Bo Liu 0003. An Efficient Analog Circuit Sizing Method Based on Machine Learning Assisted Global Optimization
1222 -- 1235Zhengqi Gao, Ron Rohrer. Efficient Non-Monte-Carlo Yield Estimation
1236 -- 1248Ying Wang 0001, Yintao He, Long Cheng 0003, Huawei Li, Xiaowei Li 0001. A Fast Precision Tuning Solution for Always-On DNN Accelerators
1249 -- 1263Davide Zoni, Luca Cremona, William Fornaciari. Design of Side-Channel-Resistant Power Monitors
1264 -- 1275Davide Poggi, Thomas Ordas, Alexandre Sarafianos, Philippe Maurine. Checking Robustness Against EM Side-Channel Attacks Prior to Manufacturing
1276 -- 1289Farzad Niknia, Jean-Luc Danger, Sylvain Guilley, Naghmeh Karimi. Aging Effects on Template Attacks Launched on Dual-Rail Protected Chips
1290 -- 1301Yufei Cui, Qiao Li 0001, Tei-Wei Kuo, Chun Jason Xue. Online Rare Category Identification and Data Diversification for Edge Computing
1302 -- 1315Yi Wang 0003, Jiangfan Huang, Jing Chen, Rui Mao 0001. PVSensing: A Process-Variation-Aware Space Allocation Strategy for 3D NAND Flash Memory
1316 -- 1329Hui Chen, Peng Chen 0027, Jun Zhou, Luan H. K. Duong, Weichen Liu. ArSMART: An Improved SMART NoC Design Supporting Arbitrary-Turn Transmission
1330 -- 1343Jeongbin Kim, Yongwoon Song, Kyungseon Cho, Hyukjun Lee, Hongil Yoon, Eui-Young Chung. STT-MRAM-Based Multicontext FPGA for Multithreading Computing Environment
1344 -- 1357Yunhui Qiu, Wenbo Yin, Lingli Wang. A High-Performance and Scalable NVMe Controller Featuring Hardware Acceleration
1358 -- 1370Yuke Wang, Boyuan Feng, Gushu Li, Lei Deng 0003, Yuan Xie 0001, Yufei Ding. STPAcc: Structural TI-Based Pruning for Accelerating Distance-Related Algorithms on CPU-FPGA Platforms
1371 -- 1385Mohammed Abderehman, Jayprakash Patidar, Jay H. Oza, Yom Nigam, T. M. Abdul Khader, Chandan Karfa. FastSim: A Fast Simulation Framework for High-Level Synthesis
1386 -- 1399Xiaotong Cui, Xing Zhang, Hao Yan, Liang Zhang, Kefei Cheng, Yu Wu, Kaijie Wu 0001. Toward Building and Optimizing Trustworthy Systems Using Untrusted Components: A Graph-Theoretic Perspective
1400 -- 1411Alexander A. Barkalov, Larysa Titarenko, Kamil Mielcarek. Reducing LUT Count for Mealy FSMs With Transformation of States
1412 -- 1422Chia-Chun Lin, Ciao-Syun Lin, You-Hsuen Tsai, Yung-Chih Chen, Chun-Yao Wang. Don't Care Computation and De Morgan Transformation for Threshold Logic Network Optimization
1423 -- 1435Rachel Sterneck, Abhishek Moitra, Priyadarshini Panda. Noise Sensitivity-Based Energy Efficient and Robust Adversary Detection in Neural Networks
1436 -- 1447Gang Li 0015, Zejian Liu, Fanrong Li, Jian Cheng 0001. Block Convolution: Toward Memory-Efficient Inference of Large-Scale CNNs on FPGA
1448 -- 1452Tsung-Wei Huang, Dian-Lun Lin, Yibo Lin, Chun-Xun Lin. Taskflow: A General-Purpose Parallel and Heterogeneous Task Programming System
1453 -- 1466Jinwei Zhang, Sheriff Sadiqbatcha, Michael O'Dea, Hussam Amrouch, Sheldon X.-D. Tan. Full-Chip Power Density and Thermal Map Characterization for Commercial Microprocessors Under Heat Sink Cooling
1467 -- 1480Ming Yang, Wenjian Yu, Mingye Song, Ning Xu 0006. Volume Reduction and Fast Generation of the Precharacterization Data for Floating Random Walk-Based Capacitance Extraction
1481 -- 1494Renan Netto, Sheiny Fabre, Tiago Augusto Fontana, Vinicius S. Livramento, Laércio Lima Pilla, Laleh Behjat, José Luís Güntzel. Algorithm Selection Framework for Legalization Using Deep Convolutional Neural Networks and Transfer Learning
1495 -- 1508Chung-Kuan Cheng, Andrew B. Kahng, Hayoung Kim, Minsoo Kim, Daeyeal Lee, Dongwon Park, Mingyu Woo. PROBE2.0: A Systematic Framework for Routability Assessment From Technology to Design in Advanced Nodes
1509 -- 1522Behnaz Ranjbar, Ali Hosseinghorban, Mohammad Salehi, Alireza Ejlali, Akash Kumar 0001. Toward the Design of Fault-Tolerance-Aware and Peak-Power-Aware Multicore Mixed-Criticality Systems
1523 -- 1536Boqian Wang, Zhonghai Lu. Flexible and Efficient QoS Provisioning in AXI4-Based Network-on-Chip Architecture
1537 -- 1549Biresh Kumar Joardar, Aryan Deshwal, Janardhan Rao Doppa, Partha Pratim Pande, Krishnendu Chakrabarty. High-Throughput Training of Deep CNNs on ReRAM-Based Heterogeneous Architectures via Optimized Normalization Layers
1550 -- 1562Syuan-Hao Sie, Jye-Luen Lee, Yi Ren Chen, Zuo-Wei Yeh, Zhaofang Li, Chih-Cheng Lu, Chih-Cheng Hsieh, Meng-Fan Chang, Kea-Tiong Tang. MARS: Multimacro Architecture SRAM CIM-Based Accelerator With Co-Designed Compressed Neural Networks
1563 -- 1572Jun-Yu Yang, Shi-Yu Huang. Process-Resilient Fault-Tolerant Delay-Locked Loop Using TMR With Dynamic Timing Correction
1573 -- 1586Alireza Mahzoon, Daniel Große, Rolf Drechsler. RevSCA-2.0: SCA-Based Formal Verification of Nontrivial Multipliers Using Reverse Engineering and Local Vanishing Removal
1587 -- 1591Irith Pomeranz. Multicycle Tests With Fault Detection Test Data for Improved Logic Diagnosis

Volume 41, Issue 4

799 -- 812Khanh N. Dang, Akram Ben Ahmed, Abderazek Ben Abdallah, Xuan-Tu Tran. HotCluster: A Thermal-Aware Defect Recovery Method for Through-Silicon-Vias Toward Reliable 3-D ICs Systems
813 -- 826Jun Tao 0001, Handi Yu, Yangfeng Su, Dian Zhou, Xuan Zeng 0001, Xin Li 0001. Correlated Rare Failure Analysis via Asymptotic Probability Evaluation
827 -- 839Dongning Ma, Xinqiao Zhang, Ke Huang, Yu Jiang 0001, Wanli Chang 0001, Xun Jiao. DEVoT: Dynamic Delay Modeling of Functional Units Under Voltage and Temperature Variations
840 -- 853Ilaria Scarabottolo, Giovanni Ansaloni, George A. Constantinides, Laura Pozzi. A Formal Framework for Maximum Error Estimation in Approximate Logic Synthesis
854 -- 867Abdulrahman Alaql, Saranyu Chattopadhyay, Prabuddha Chakraborty, Tamzidul Hoque, Swarup Bhunia. LeGO: A Learning-Guided Obfuscation Framework for Hardware IP Protection
868 -- 881Abhijitt Dhavlle, Setareh Rafatirad, Khaled N. Khasawneh, Houman Homayoun, Sai Manoj Pudukotai Dinakarrao. Imitating Functional Operations for Mitigating Side-Channel Leakage
882 -- 896Zhaoyan Shen, Feng Chen 0005, Gala Yadgar, Zhiping Jia, Zili Shao. Prism-SSD: A Flexible Storage Interface for SSDs
897 -- 907Justin Morris, Roshan Fernando, Yilun Hao, Mohsen Imani, Baris Aksanli, Tajana Rosing. Locality-Based Encoder and Model Quantization for Efficient Hyper-Dimensional Computing
908 -- 921Zhifei Wang, Jun Feng 0008, Jiang Xu 0001, Xuanqi Chen, Jiaxu Zhang, Shixi Chen, Yinyi Liu. HERO: Pbit High-Radix Optical Switch Based on Integrated Silicon Photonics for Data Center
922 -- 935Yuhao Zhang, Zhiping Jia, Hongchao Du, Runzhen Xue, Zhaoyan Shen, Zili Shao. A Practical Highly Paralleled ReRAM-Based DNN Accelerator by Reusing Weight Pattern Repetitions
936 -- 949Xiaobing Chen, Yuke Wang, Xinfeng Xie, Xing Hu 0001, Abanti Basak, Ling Liang, Mingyu Yan, Lei Deng 0003, Yufei Ding, Zidong Du, Yuan Xie 0001. Rubik: A Hierarchical Architecture for Efficient Graph Neural Network Training
950 -- 963Muhammad Imran 0010, TaeHyun Kwon, Joon-Sung Yang. ADAPT: A Write Disturbance-Aware Programming Technique for Scaled Phase Change Memory
964 -- 978Jincheng Yu, Zhilin Xu, Shulin Zeng, Chao Yu, Jiantao Qiu, Zhaoyang Shen, Yuanfan Xu, Guohao Dai, Yu Wang 0002, Huazhong Yang. INCAME: Interruptible CNN Accelerator for Multirobot Exploration
979 -- 992Huimei Cheng, Xi Li, Yichen Gu, Peter A. Beerel. Converting Flip-Flop to Clock-Gated 3-Phase Latch-Based Designs Using Graph-Based Retiming
993 -- 1005Chia-Chih Chi, Jie-Hong R. Jiang. Logic Synthesis of Binarized Neural Networks for Efficient Circuit Implementation
1006 -- 1019Saurabh Dash, Yandong Luo, Anni Lu, Shimeng Yu, Saibal Mukhopadhyay. Robust Processing-In-Memory With Multibit ReRAM Using Hessian-Driven Mixed-Precision Computation
1020 -- 1033Moritz Scherer, Georg Rutishauser, Lukas Cavigelli, Luca Benini. CUTIE: Beyond PetaOp/s/W Ternary DNN Inference Acceleration With Better-Than-Binary Energy Efficiency
1034 -- 1047Arman Iranfar, Marina Zapater, David Atienza. Multiagent Reinforcement Learning for Hyperparameter Optimization of Convolutional Neural Networks
1048 -- 1061Zihao Yuan, Prachi Shukla, Sofiane Chetoui, Sean S. Nemtzow, Sherief Reda, Ayse K. Coskun. PACT: An Extensible Parallel Thermal Simulator for Emerging Integration and Cooling Technologies
1062 -- 1075Federico Terraneo, Alberto Leva, William Fornaciari, Marina Zapater, David Atienza. 3D-ICE 3.0: Efficient Nonlinear MPSoC Thermal Simulation With Pluggable Heat Sink Models
1076 -- 1089Andrew B. Kahng, Lutong Wang, Bangqi Xu. TritonRoute-WXL: The Open-Source Router With Integrated DRC Engine
1090 -- 1102Jin-Tai Yan. Tree-Based Clock Distribution of Multiple-Stage Pipelined Architecture in Rapid Single-Flux-Quantum Circuits
1103 -- 1115Jianli Chen, Ziran Zhu, Longkun Guo, Yu-Wei Tseng, Yao-Wen Chang. Mixed-Cell-Height Placement With Drain-to-Drain Abutment and Region Constraints
1116 -- 1129Zhe Jiang 0004, Shuai Zhao 0004, Ran Wei, Dawei Yang, Richard Paterson, Nan Guan, Yan Zhuang, Neil C. Audsley. Bridging the Pragmatic Gaps for Mixed-Criticality Systems in the Automotive Industry
1130 -- 1141Irith Pomeranz. Static Test Compaction Using Independent Suffixes of a Transparent-Scan Sequence
1142 -- 1153Sangmin Park, Minho Cheong, Donghyun Han, Sungho Kang. Herringbone-Based TSV Architecture for Clustered Fault Repair and Aging Recovery
1154 -- 1166Sreeja Rajendran, Mary Lourde Regeena. A Novel Algorithm for Hardware Trojan Detection Through Reverse Engineering
1167 -- 1180Faiq Khalid, Imran Hafeez Abbassi, Semeen Rehman, Awais Mehmood Kamboh, Osman Hasan, Muhammad Shafique 0001. ForASec: Formal Analysis of Hardware Trojan-Based Security Vulnerabilities in Sequential Circuits
1181 -- 1185Mehran Goli, Rolf Drechsler. Through the Looking Glass: Automated Design Understanding of SystemC-Based VPs at the ESL
1186 -- 1190Junnan Shan, Mihai T. Lazarescu, Jordi Cortadella, Luciano Lavagno, Mario R. Casu. Fast Energy-Optimal Multikernel DNN-Like Application Allocation on Multi-FPGA Platforms
1191 -- 1195Theresa Kahale, Dani Tannir. Memristor Modeling Using the Modified Nodal Analysis Approach

Volume 41, Issue 3

400 -- 409Hongyu An, Mohammad Shah Al-Mamun, Marius K. Orlowski, Lingjia Liu 0001, Yang Yi 0002. Three-Dimensional Neuromorphic Computing System With Two-Layer and Low-Variation Memristive Synapses
410 -- 423Kyungwook Chang, Saurabh Sinha, Brian Cline, Greg Yeric, Sung Kyu Lim. Design-Aware Partitioning-Based 3-D IC Design Flow With 2-D Commercial Tools
424 -- 437Amin Monfared, Mostafa M. I. Taha, Arash Reyhani-Masoleh. Secure and Efficient Exponentiation Architectures Using Gaussian Normal Basis
438 -- 451Jim Plusquellic, Donald E. Owen, Tom J. Mannos, Brian Dziki. Information Leakage Analysis Using a Co-Design-Based Fault Injection Technique on a RISC-V Microprocessor
452 -- 465Huanyu Wang, Henian Li, Fahim Rahman, Mark M. Tehranipoor, Farimah Farahmandi. SoFI: Security Property-Driven Vulnerability Assessments of ICs Against Fault-Injection Attacks
466 -- 477Xingyu Meng, Shamik Kundu, Arun K. Kanuparthi, Kanad Basu. RTL-ConTest: Concolic Testing on RTL for Detecting Security Vulnerabilities
478 -- 491Guoqi Xie, Wei Wu, Renfa Li. Carry-Out Interference Optimization in WCRT Analysis for Global Fixed-Priority Multiprocessor Scheduling
492 -- 501Jie Zhan, Geoff V. Merrett, Alex S. Weddell. Exploring the Effect of Energy Storage Sizing on Intermittent Computing System Performance
502 -- 515Linwei Niu, Dakai Zhu 0001. Fixed-Priority Scheduling for Reliable and Energy-Aware (m, k)-Deadlines Enforcement With Standby-Sparing
516 -- 529Junlong Zhou, Kun Cao, Xiumin Zhou, Mingsong Chen, Tongquan Wei, Shiyan Hu. Throughput-Conscious Energy Allocation and Reliability-Aware Task Assignment for Renewable Powered In-Situ Server Systems
530 -- 543Zhuwei Qin, Fuxun Yu, Zirui Xu, Chenchen Liu, Xiang Chen 0010. CaptorX: A Class-Adaptive Convolutional Neural Network Reconfiguration Framework
544 -- 557Yina Lv, Liang Shi, Longfei Luo, Changlong Li, Chun Jason Xue, Edwin H.-M. Sha. Tail Latency Optimization for LDPC-Based High-Density and Low-Cost Flash Memory Devices
558 -- 570Debraj Kundu, Sudip Roy 0001, Sukanta Bhattacharjee, Sohini Saha, Krishnendu Chakrabarty, Partha Pratim Chakrabarti, Bhargab B. Bhattacharya. Mixing Models as Integer Factorization: A Key to Sample Preparation With Microfluidic Biochips
571 -- 582Mackenzie J. Wibbels, Kenneth S. Stevens. Causal Path Identification for Timed and Sequential Circuits
583 -- 596Bing Li 0017, Songyun Qu, Ying Wang 0001. An Automated Quantization Framework for High-Utilization RRAM-Based PIM
597 -- 613Yun Liang 0001, Liqiang Lu, Yicheng Jin, JiaMing Xie, Ruirui Huang, Jiansong Zhang, Wei Lin. An Efficient Hardware Design for Accelerating Sparse CNNs With NAS-Based Models
614 -- 627Patrick Sittel, Nicolai Fiege, John Wickerson, Peter Zipf. Optimal and Heuristic Approaches to Modulo Scheduling With Rational Initiation Intervals in Hardware Synthesis
628 -- 641Jianyi Cheng, Lana Josipovic, George A. Constantinides, Paolo Ienne, John Wickerson. DASS: Combining Dynamic & Static Scheduling in High-Level Synthesis
642 -- 655Chang-Cheng Ko, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang. Majority Logic Circuit Minimization Using Node Addition and Removal
656 -- 668Byungmin Ahn, Taewhan Kim. Deeper Weight Pruning Without Accuracy Loss in Deep Neural Networks: Signed-Digit Representation-Based Approach
669 -- 680Ran Chen, Wei Zhong, Haoyu Yang, Hao Geng, Fan Yang 0001, Xuan Zeng 0001, Bei Yu 0001. Faster Region-Based Hotspot Detection
681 -- 694Zhiqiang Liu, Wenjian Yu, Zhuo Feng. feGRASS: Fast and Effective Graph Spectral Sparsification for Scalable Power Grid Analysis
695 -- 708Dennis D. Weller, Michael Hefenbrock, Michael Beigl, Mehdi B. Tahoori. Fast and Efficient High-Sigma Yield Analysis and Optimization Using Kernel Density Estimation on a Bayesian Optimized Failure Rate Model
709 -- 722Wei Zhong, Shuxiang Hu, Yuzhe Ma, Haoyu Yang, Xiuyuan Ma, Bei Yu 0001. Deep Learning-Driven Simultaneous Layout Decomposition and Mask Optimization
723 -- 736Bin Zhou, Hong Jiang 0001, Qiang Cao, Shenggang Wan, Changsheng Xie. A-Cache: Asymmetric Buffer Cache for RAID-10 Systems Under a Single-Disk Failure to Significantly Boost Availability
737 -- 749Kuen-Jong Lee, Cheng-Hung Wu, Tsung-Yu Hou. An Efficient Procedure to Generate Highly Compact Diagnosis Patterns for Transition Faults
750 -- 761Youngkwang Lee, Young-Woo Lee, Sungyoul Seo, Sungho Kang. Reduced-Pin-Count BOST for Test-Cost Reduction
762 -- 775Mengyun Liu, Xin Li 0001, Krishnendu Chakrabarty, Xinli Gu. Knowledge Transfer in Board-Level Functional Fault Diagnosis Enabled by Domain Adaptation
776 -- 783Irith Pomeranz. Efficient Identification of Undetectable Two-Cycle Gate-Exhaustive Faults
784 -- 788Andrew B. Kahng, Jian Kuang, Wen-Hao Liu, Bangqi Xu. In-Route Pin Access-Driven Placement Refinement for Improved Detailed Routing Convergence
789 -- 793Zhengqi Gao, Jun Tao 0001, Yangfeng Su, Dian Zhou, Xuan Zeng 0001, Xin Li 0001. Fast Statistical Analysis of Rare Failure Events With Truncated Normal Distribution in High-Dimensional Variation Space
794 -- 798Akira Ito, Rei Ueno, Naofumi Homma. Efficient Formal Verification of Galois-Field Arithmetic Circuits Using ZDD Representation of Boolean Polynomials

Volume 41, Issue 2

201 -- 210Maryam Shafiee, Sule Ozev. An In-Field Programmable Adaptive CMOS LNA for Intelligent IoT Sensor Node Applications
211 -- 224Salim Ullah, Semeen Rehman, Muhammad Shafique 0001, Akash Kumar 0001. High-Performance Accurate and Approximate Multipliers for FPGA-Based Hardware Accelerators
225 -- 237Junick Ahn, Daeyong Kim, Rhan Ha, Hojung Cha. State-of-Charge Estimation of Supercapacitors in Transiently-Powered Sensor Nodes
238 -- 251Jiawan Wang, Lei Bu, Shaopeng Xing, Xuandong Li. PDF: Path-Oriented, Derivative-Free Approach for Safety Falsification of Nonlinear and Nondeterministic CPS
252 -- 265Hengli Huang, Xiaohang Wang, Yingtao Jiang, Amit Kumar Singh 0002, Mei Yang, Letian Huang. Detection of and Countermeasure Against Thermal Covert Channel in Many-Core Systems
266 -- 280Satwik Patnaik, Mohammed Ashraf, Haocheng Li, Johann Knechtel, Ozgur Sinanoglu. Concerted Wire Lifting: Enabling Secure and Cost-Effective Split Manufacturing
281 -- 293Sanjit Kumar Roy, Rajesh Devaraj, Arnab Sarkar. Contention Cognizant Scheduling of Task Graphs on Shared Bus-Based Heterogeneous Platforms
294 -- 305Renping Liu, Duo Liu, Xianzhang Chen, Yujuan Tan, Runyu Zhang, Liang Liang 0002. Self-Adapting Channel Allocation for Multiple Tenants Sharing SSD Devices
306 -- 319Zhaoying Li, Dhananjaya Wijerathne, Xianzhang Chen, Anuj Pathania, Tulika Mitra. ChordMap: Automated Mapping of Streaming Applications Onto CGRA
320 -- 333Zhe Jiang 0004, Xiaotian Dai 0001, Pan Dong, Ran Wei, Dawei Yang, Neil C. Audsley, Nan Guan. Toward an Analysable, Scalable, Energy-Efficient I/O Virtualization for Mixed-Criticality Systems
334 -- 345Yufei Ni, Yangdong Deng, Zonghui Li. Agglomerative Memory and Thread Scheduling for High-Performance Ray-Tracing on GPUs
346 -- 358Weifan Sun, Wei Fan, Mengying Zhao, Weining Song, Xiaojun Cai, Tiantian Liu 0001, Zhiping Jia. Deep Reinforcement-Learning-Guided Backup for Energy Harvesting Powered Systems
359 -- 371Lingling Lao, Hans van Someren, Imran Ashraf, Carmen G. Almudéver. Timing and Resource-Aware Mapping of Quantum Circuits to Superconducting Processors
372 -- 385Zheng Qu, Lei Deng 0003, Bangyan Wang, Hengnu Chen, Jilan Lin, Ling Liang, Guoqi Li, Zheng Zhang 0005, Yuan Xie 0001. Hardware-Enabled Efficient Data Processing With Tensor-Train Decomposition
386 -- 399Darong Huang, Ali Pahlevan, Marina Zapater, David Atienza. COCKTAIL: Multicore Co-Optimization Framework With Proactive Reliability Management

Volume 41, Issue 12

5138 -- 5151Zhenxin Zhao, Lihong Zhang. Analog Integrated Circuit Topology Synthesis With Deep Reinforcement Learning
5152 -- 5168Baidyanath Ray, Debanjana Datta, Mousumi Bhanja, Ayan Banerjee. Cell-Based Synthesis of Multiple Analog Filter and Oscillator Topologies Employing Graph
5169 -- 5181Jiwoo Hong, Sunghoon Kim, Dongsuk Jeon. An Automatic Circuit Design Framework for Level Shifter Circuits
5182 -- 5192Ranran Zhou, Peter Poechmueller, Yong Wang 0006. An Analog Circuit Design and Optimization System With Rule-Guided Genetic Algorithm
5193 -- 5206Qi Sun, Xufeng Yao, Arjun Ashok Rao, Bei Yu 0001, Shiyan Hu. Counteracting Adversarial Attacks in Autonomous Driving
5207 -- 5219Sarah Amir, Domenic Forte. EigenCircuit: Divergent Synthetic Benchmark Generation for Hardware Security Using PCA and Linear Programming
5220 -- 5231Jooyeon Choi, Hyeonuk Sim, Sangyun Oh, Sugil Lee, Jongeun Lee. MLogNet: A Logarithmic Quantization-Based Accelerator for Depthwise Separable Convolution
5232 -- 5245Hui Chen, Peng Chen 0027, Xiangzhong Luo, Shuo Huai, Weichen Liu. LAMP: Load-Balanced Multipath Parallel Transmission in Point-to-Point NoCs
5246 -- 5260Sangeet Saha, Shounak Chakraborty 0001, Xiaojun Zhai, Shoaib Ehsan, Klaus D. McDonald-Maier. ACCURATE: Accuracy Maximization for Real-Time Multicore Systems With Energy-Efficient Way-Sharing Caches
5261 -- 5274Xiao Moyuan, Tsun-Ming Tseng, Ulf Schlichtmann. Crosstalk-Aware Automatic Topology Customization and Optimization for Wavelength-Routed Optical NoCs
5275 -- 5287Zhengyu Mei, Yuxuan Wang, Hongbing Pan. TEA-Z: A Tiny and Efficient Architecture Based on Z Channel for Image Watermarking and Its Versatile Hardware Implementation
5288 -- 5298Fazal Hameed, Jerónimo Castrillón. BlendCache: An Energy and Area Efficient Racetrack Last-Level-Cache Architecture
5299 -- 5312Debao Wei, Zhelong Piao, Hua Feng, Liyan Qiao, Cong Hu, Xiyuan Peng. TCSE: A Target Cell States Elimination Coding Strategy for Highly Reliable Data Storage Based on 3-D nand Flash Memory
5313 -- 5326Fangxin Liu, Wenbo Zhao, Zongwu Wang, Yilong Zhao, Tao Yang, Yiran Chen 0001, Li Jiang 0002. IVQ: In-Memory Acceleration of DNN Inference Exploiting Varied Quantization
5327 -- 5332Mahta Mayahinia, Mehdi B. Tahoori, Manu Perumkunnil Komalan, Houman Zahedmanesh, Kristof Croes, Tommaso Marinelli, José Ignacio Gómez Pérez, Timon Evenblij, Gouri Sankar Kar, Francky Catthoor. Time-Dependent Electromigration Modeling for Workload-Aware Design-Space Exploration in STT-MRAM
5333 -- 5342Xuhang Chen, Xueyan Wang, Xiaotao Jia, Jianlei Yang 0001, Gang Qu 0001, Weisheng Zhao. Accelerating Graph-Connected Component Computation With Emerging Processing-In-Memory Architecture
5343 -- 5356Hongxiang Fan, Martin Ferianc, Zhiqiang Que, Shuanglong Liu, Xinyu Niu, Miguel R. D. Rodrigues, Wayne Luk. FPGA-Based Acceleration for Bayesian Convolutional Neural Networks
5357 -- 5366Yehua Ling, Tao He, Yu Zhang, Haitao Meng, Kai Huang 0001, Gang Chen 0023. Lite-Stereo: A Resource-Efficient Hardware Accelerator for Real-Time High-Quality Stereo Estimation Using Binary Neural Network
5367 -- 5379Yuheng Jiang, Jiajia Chen 0002. A New Algorithm to Derive High Performance and Low Hardware Cost DCT for HEVC
5380 -- 5393Yuhao Zhou, Zhenxue He, Chen Chen, Tao Wang 0035, Limin Xiao, Xiang Wang 0006. An Efficient Power Optimization Approach for Fixed Polarity Reed-Muller Logic Circuits Based on Metaheuristic Optimization Algorithm
5394 -- 5407Zhenge Jia, Yiyu Shi, Jingtong Hu. Personalized Neural Network for Patient-Specific Health Monitoring in IoT: A Metalearning Approach
5408 -- 5420Sourav Sanyal, Kaushik Roy 0001. Neuro-Ising: Accelerating Large-Scale Traveling Salesman Problems via Graph Neural Network Guided Localized Ising Solvers
5421 -- 5434Kai Zhong, Xuefei Ning, Guohao Dai, Zhenhua Zhu, Tianchen Zhao, Shulin Zeng, Yu Wang 0002, Huazhong Yang. Exploring the Potential of Low-Bit Training of Convolutional Neural Networks
5435 -- 5448Morteza Fayazi, Zachary Colter, Zineb Benameur-El Youbi, Javad Bagherzadeh, Tutu Ajayi, Ronald G. Dreslinski. FASCINET: A Fully Automated Single-Board Computer Generator Using Neural Networks
5449 -- 5463Xing Huang, Tsung-Yi Ho, Zepeng Li, Genggeng Liu, Lu Wang, Qingshan Li, Wenzhong Guo, Bing Li 0005, Ulf Schlichtmann. MiniControl 2.0: Co-Synthesis of Flow and Control Layers for Microfluidic Biochips With Strictly Constrained Control Ports
5464 -- 5475Qilin Zheng, Xingchen Li, Yijin Guan, Zongwei Wang, YiMao Cai, Yiran Chen 0001, Guangyu Sun 0003, Ru Huang. PIMulator-NN: An Event-Driven, Cross-Level Simulation Framework for Processing-In-Memory-Based Neural Network Accelerators
5476 -- 5488Haikun Liu, Jiahong Xu, Xiaofei Liao, Hai Jin 0001, Yu Zhang 0027, Fubing Mao. A Simulation Framework for Memristor-Based Heterogeneous Computing Architectures
5489 -- 5500Yuhang Zhang, Guanghui He, Guoxing Wang, Yongfu Li 0002. XBarNet: Computationally Efficient Memristor Crossbar Model Using Convolutional Autoencoder
5501 -- 5514Tianshu Hou, Ngai Wong, Quan Chen, Zhigang Ji, Hai-Bao Chen. A Space-Time Neural Network for Analysis of Stress Evolution Under DC Current Stressing
5515 -- 5525Shumpei Morita, Song Bian 0001, Michihiro Shintani, Takashi Sato. Efficient Analysis for Mitigation of Workload-Dependent Aging Degradation
5526 -- 5540Grace Li Zhang, Bing Li 0005, Xing Huang, Xunzhao Yin, Cheng Zhuo, Masanori Hashimoto, Ulf Schlichtmann. VirtualSync+: Timing Optimization With Virtual Synchronization
5541 -- 5553Jianli Chen, Zhipeng Huang 0009, Ziran Zhu, Zheng Peng 0002, Wenxing Zhu, Yao-Wen Chang. Novel Proximal Group ADMM for Placement Considering Fogging and Proximity Effects
5554 -- 5567Hsiang-Ting Wen, Yu-Jie Cai, Yang Hsu, Yao-Wen Chang. Via-Based Redistribution Layer Routing for InFO Packages With Irregular Pad Structures
5568 -- 5581Yih-Lang Li, Shih-Ting Lin, Shinichi Nishizawa, Hong-Yan Su, Ming-Jie Fong, Oscar Chen, Hidetoshi Onodera. NCTUcell: A DDA- and Delay-Aware Cell Library Generator for FinFET Structure With Implicitly Adjustable Grid Map
5582 -- 5595Wei-Hsiang Tseng, Chen-Hao Hsu, Wan-Hsuan Lin, Yao-Wen Chang. A Bridge-Based Compression Algorithm for Topological Quantum Circuits
5596 -- 5609Darong Huang, Ali Pahlevan, Luis Costero, Marina Zapater, David Atienza. Reinforcement Learning-Based Joint Reliability and Performance Optimization for Hybrid-Cache Computing Servers
5610 -- 5620Aurea Edna Moreno-Mojica, José Ernesto Rayas-Sánchez. Frequency- and Time-Domain Yield Optimization of a Power Delivery Network Subject to Large Decoupling Capacitor Tolerances
5621 -- 5634Ahmed Al-Qallaf, Kamal El-Sankary. Design of Time-Mode PI Controller for Switched-Capacitor DC/DC Converter Using Differential Evolution Algorithm - A Design Methodology
5635 -- 5643Irith Pomeranz. Wrapping Paths of Undetected Transition Faults With Two-Cycle Gate-Exhaustive Faults
5644 -- 5656Natalia Lylina, Chih-Hao Wang, Hans-Joachim Wunderlich. SCAR: Security Compliance Analysis and Resynthesis of Reconfigurable Scan Networks
5657 -- 5670Arjun Chaudhuri, Jonti Talukdar, Fei Su, Krishnendu Chakrabarty. Functional Criticality Analysis of Structural Faults in AI Accelerators
5671 -- 5680Hyeonchan Lim, Hyojoon Yun, Sungho Kang. A Hybrid Test Scheme for Automotive IC in Multisite Testing
5681 -- 5694Mohamed Saleh Abouelyazid, Sherif Hammouda, Yehea Ismail. Accuracy-Based Hybrid Parasitic Capacitance Extraction Using Rule-Based, Neural-Networks, and Field-Solver Methods
5695 -- 5708Sayandeep Sanyal, Pallab Dasgupta, Aritra Hazra, Sourav Das, Scott Morrison, Sudhakar Surendran, Lakshmanan Balasubramanian. The CoveRT Approach for Coverage Management in Analog and Mixed-Signal Integrated Circuits
5709 -- 5721Binod Kumar 0001, V. S. Vineesh, Puneet Nemade, Masahiro Fujita. Aries: A Semiformal Technique for Fine-Grained Bug Localization in Hardware Designs
5722 -- 5726Lama Shaer, Rouwaida Kanj, Rajiv V. Joshi, Ali Chehab. Group LARS-Based Iterative Reweighted Least Squares Methodology for Efficient Statistical Modeling of Memory Designs
5727 -- 5731Hai Wang 0002, Wenjun He, Qinhui Yang, Xizhu Peng, He Tang. DBP: Distributed Power Budgeting for Many-Core Systems in Dark Silicon
5732 -- 5736Qinyu Chen, Chang Gao, Xinyuan Fang, Haitao Luan. Skydiver: A Spiking Neural Network Accelerator Exploiting Spatio-Temporal Workload Balance

Volume 41, Issue 11

3567 -- 3578Yu Huang 0013, Long Zheng 0003, Pengcheng Yao, Qinggang Wang, Haifeng Liu, Xiaofei Liao, Hai Jin 0001, Jingling Xue. ReaDy: A ReRAM-Based Processing-in-Memory Accelerator for Dynamic Graph Convolutional Networks
3579 -- 3590Jiaxian Chen, Yiquan Lin, Kaoyi Sun, Jiexin Chen, Chenlin Ma, Rui Mao 0001, Yi Wang 0003. GCIM: Toward Efficient Processing of Graph Convolutional Networks in 3D-Stacked Memory
3591 -- 3601Huichuan Zheng, Hao Zhang, Shuo Xu, Fanjin Xu, Mengying Zhao. Adaptive Mode Transformation for Wear Leveling in Nonvolatile FPGAs
3602 -- 3613Shailja Pandey, Preeti Ranjan Panda. NeuroMap: Efficient Task Mapping of Deep Neural Networks for Dynamic Thermal Management in High-Bandwidth Memory
3614 -- 3625Rehan Ahmed, Stefan Draskovic, Lothar Thiele. Stochastic Guarantees for Adaptive Energy Harvesting Systems
3626 -- 3637Chukwufumnanya Ogbogu, Aqeeb Iqbal Arka, Biresh Kumar Joardar, Janardhan Rao Doppa, Hai Helen Li, Krishnendu Chakrabarty, Partha Pratim Pande. Accelerating Large-Scale Graph Neural Network Training on Crossbar Diet
3638 -- 3649Ying-Jan Wu, Ching-Yu Kuo, Li-Pin Chang. iNVMFS: An Efficient File System for NVRAM-Based Intermittent Computing Devices
3650 -- 3660Sosei Ikeda, Hiromitsu Awano, Takashi Sato. Hardware-Friendly Delayed-Feedback Reservoir for Multivariate Time-Series Classification
3661 -- 3672Mohammed Abderehman, Rupak Gupta, Theegala Rakesh Reddy, Chandan Karfa. BLAST: Belling the Black-Hat High-Level Synthesis Tool
3673 -- 3684Gaoyang Dai, Morteza Mohaqeqi, Petros Voudouris, Wang Yi 0001. Response-Time Analysis of Limited-Preemptive Sporadic DAG Tasks
3685 -- 3696Junjie Feng, Xianzhang Chen, Duo Liu, Weigong Zhang, Jiapin Wang, Rongwei Zheng, Yujuan Tan. eRDAC: Efficient and Reliable Remote Direct Access and Control for Embedded Systems
3697 -- 3708Rongwei Zheng, Xianzhang Chen, Duo Liu, Junjie Feng, Jiapin Wang, Ao Ren, Chengliang Wang, Yujuan Tan. SENTunnel: Fast Path for Sensor Data Access on Automotive Embedded Systems
3709 -- 3720Chenlin Ma, Zhuokai Zhou, Yingping Wang, Yi Wang, Rui Mao 0001. MAID-Q: Minimizing Tail Latency in Embedded Flash With SMR Disk via -Learning Model
3721 -- 3732Wei-Che Tsai, Wei-Ming Chen, Tei-Wei Kuo, Pi-Cheng Hsiu. Intermittent-Aware Distributed Concurrency Control
3733 -- 3744Arnaud de Grandmaison, Karine Heydemann, Quentin L. Meunier. ARMISTICE: Microarchitectural Leakage Modeling for Masked Software Formal Verification
3745 -- 3756Long Zheng 0003, Haifeng Liu, Yu Huang 0013, Dan Chen, Chaoqiang Liu, Haiheng He, Xiaofei Liao, Hai Jin 0001, Jingling Xue. A Flexible Yet Efficient DNN Pruning Approach for Crossbar-Based Processing-in-Memory Architectures
3757 -- 3766Andrea Fanti, Carlos Chinea Perez, Rémi Denis-Courmont, Gianluca Roascio, Jan-Erik Ekberg. Toward Register Spilling Security Using LLVM and ARM Pointer Authentication
3767 -- 3778Jan Sommer, M. Akif Özkan, Oliver Keszöcze, Jürgen Teich. Efficient Hardware Acceleration of Sparsely Active Convolutional Spiking Neural Networks
3779 -- 3790Weidong Zhu, Kevin R. B. Butler. NASA: NVM-Assisted Secure Deletion for Flash Memory
3791 -- 3802Yin-Chiuan Chen, Chun-Feng Wu, Yuan-Hao Chang 0001, Tei-Wei Kuo. Exploring Synchronous Page Fault Handling
3803 -- 3813Jiali Li, Xianzhang Chen, Duo Liu, Lin Li, Jiapin Wang, Zhaoyang Zeng, Yujuan Tan, Lei Qiao. Horae: A Hybrid I/O Request Scheduling Technique for Near-Data Processing-Based SSD
3814 -- 3825Jin-Wei Chang, Tseng-Yi Chen. When B-Tree Meets Skyrmion Memory: How Skyrmion Memory Affects an Indexing Scheme
3826 -- 3837Lilas Alrahis, Johann Knechtel, Florian Klemme, Hussam Amrouch, Ozgur Sinanoglu. GNN4REL: Graph Neural Networks for Predicting Circuit Reliability Degradation
3838 -- 3849Ourania Spantidi, Georgios Zervakis 0001, Iraklis Anagnostopoulos, Jörg Henkel. Energy-Efficient DNN Inference on Approximate Accelerators Through Formal Property Exploration
3850 -- 3861Jiwon Kim, Sungwoo Baek, Seunghyeok Jeon, Hojung Cha. DynLiB: Maximizing Energy Availability of Hybrid Li-Ion Battery Systems
3862 -- 3873Jinyu Zhan, Zhibei Pu, Wei Jiang 0016, Junting Wu, Yongjia Yang. Detecting Spoofed Speeches via Segment-Based Word CQCC and Average ZCR for Embedded Systems
3874 -- 3885Shuangshuang Chang, Ran Bi, Jinghao Sun, Weichen Liu, Qi Yu, Qingxu Deng, Zonghua Gu 0001. Toward Minimum WCRT Bound for DAG Tasks Under Prioritized List Scheduling Algorithms
3886 -- 3897Jiaming Qiu, Ruiqi Wang, Ayan Chakrabarti, Roch Guérin, Chenyang Lu 0001. Adaptive Edge Offloading for Image Classification Under Rate Limit
3898 -- 3909Banghu Yin, Liqian Chen, Jiangchao Liu, Ji Wang 0001. Efficient Complete Verification of Neural Networks via Layerwised Splitting and Refinement
3910 -- 3921Yue Tang, Yawen Wu, Peipei Zhou 0001, Jingtong Hu. Enabling Weakly Supervised Temporal Action Localization From On-Device Learning of the Video Stream
3922 -- 3933Xiaofeng Ding, Chengliang Wang, Heping Liu, Zhihai Zhang, Xianzhang Chen, Yujuan Tan, Duo Liu, Ao Ren. FRL: Fast and Reconfigurable Accelerator for Distributed Sound Source Localization
3934 -- 3945Elbruz Ozen, Alex Orailoglu. Architecting Decentralization and Customizability in DNN Accelerators for Hardware Defect Adaptation
3946 -- 3956Dharamjeet, Yi-Shen Chen, Tseng-Yi Chen, Yuan-Hung Kuan, Yuan-Hao Chang 0001. LLSM: A Lifetime-Aware Wear-Leveling for LSM-Tree on NAND Flash Memory
3957 -- 3968Paolo Pazzaglia, Martina Maggio. Characterizing the Effect of Deadline Misses on Time-Triggered Task Chains
3969 -- 3980Liren Yang, Hang Zhang, Jean-Baptiste Jeannin, Necmiye Ozay. Efficient Backward Reachability Using the Minkowski Difference of Constrained Zonotopes
3981 -- 3992Chenchen Fu, Xinhang Lu, Xiaoxing Qiu, Sujunjie Sun, Xueyong Xu, Weiwei Wu 0001, Chun Jason Xue, Song Han 0002. Throughput Maximization in Wireless Communication Systems Powered by Hybrid Energy Harvesting
3993 -- 4003Weiwei Chen, Ying Wang 0001, Ying Xu, Chengsi Gao, Yinhe Han, Lei Zhang 0008. Amphis: Managing Reconfigurable Processor Architectures With Generative Adversarial Learning
4004 -- 4015Soumik Sinha, Sayandeep Saha, Manaar Alam, Varun Agarwal, Ayantika Chatterjee, Anoop Mishra, Deepak Khazanchi, Debdeep Mukhopadhyay. Exploring Bitslicing Architectures for Enabling FHE-Assisted Machine Learning
4016 -- 4027Clara Hobbs, Bineet Ghosh, Shengjie Xu, Parasara Sridhar Duggirala, Samarjit Chakraborty. Safety Analysis of Embedded Controllers Under Implementation Platform Timing Uncertainties
4028 -- 4039Bingyao Wang, Margo I. Seltzer. Tinkertoy: Build Your Own Operating Systems for IoT Devices
4040 -- 4051Jiaojiao Wu, Jun Li 0062, Zhibing Sha, Zhigang Cai, Jianwei Liao. Adaptive Switch on Wear Leveling for Enhancing I/O Latency and Lifetime of High-Density SSDs
4052 -- 4063Francesco Restuccia, Ryan Kastner. Cut and Forward: Safe and Secure Communication for FPGA System on Chips
4064 -- 4075Xiaohang Wang 0001, Shengjie Wang, Yingtao Jiang, Amit Kumar Singh 0002, Mei Yang, Letian Huang. Combating Stealthy Thermal Covert Channel Attack With Its Thermal Signal Transmitted in Direct Sequence Spread Spectrum
4076 -- 4087Qiao Li 0001, Min Ye, Yufei Cui, Tianyu Ren, Tei-Wei Kuo, Chun Jason Xue. Resolving the Reliability Issues of Open Blocks for 3-D NAND Flash: Observations and Strategies
4088 -- 4099Teng Wang, Lei Gong, Chao Wang 0003, Yang Yang 0080, Yingxue Gao, Xuehai Zhou, Huaping Chen 0001. ViA: A Novel Vision-Transformer Accelerator Based on FPGA
4100 -- 4111Jun Xia, Tian Liu 0005, Zhiwei Ling, Ting Wang 0001, Xin Fu, Mingsong Chen. PervasiveFL: Pervasive Federated Learning for Heterogeneous IoT Systems
4112 -- 4123Chuxi Li, Xiaoya Fan, Xiaoti Wu, Zhao Yang, Miao Wang, Meng Zhang, Shengbing Zhang. Memory-Computing Decoupling: A DNN Multitasking Accelerator With Adaptive Data Arrangement
4124 -- 4133Jie Peng, Haijun Liu 0003, Zhongjin Zhao, Zhiwei Li, Sen Liu, Qingjiang Li. CMQ: Crossbar-Aware Neural Network Mixed-Precision Quantization via Differentiable Architecture Search
4134 -- 4144Nikhil Rangarajan, Johann Knechtel, Nimisha Limaye, Ozgur Sinanoglu, Hussam Amrouch. A Novel Attack Mode on Advanced Technology Nodes Exploiting Transistor Self-Heating
4145 -- 4156Harsh Sharma, Sumit K. Mandal, Janardhan Rao Doppa, Ümit Y. Ogras, Partha Pratim Pande. SWAP: A Server-Scale Communication-Aware Chiplet-Based Manycore PIM Accelerator
4157 -- 4168Junjie Shi, Christoph-Cordt von Egidy, Kuan-Hsun Chen, Jian-Jia Chen. Formal Verification of Resource Synchronization Protocol Implementations: A Case Study in RTEMS
4169 -- 4180Wojciech Romaszkan, Tianmu Li, Puneet Gupta 0001. SASCHA - Sparsity-Aware Stochastic Computing Hardware Architecture for Neural Network Acceleration
4181 -- 4192Jiwon Kim, Eunyeong Kim, Seunghyeok Jeon, Junick Ahn, Hyungchol Jun, Hojung Cha. PVoT: Reconfigurable Photovoltaic Array for Indoor Light Energy-Powered Batteryless Devices
4193 -- 4204Nicole Fronda, Houssam Abbas. Differentiable Inference of Temporal Logic Formulas
4205 -- 4216Chiao Hsieh, Yangge Li, Dawei Sun, Keyur Joshi, Sasa Misailovic, Sayan Mitra. Verifying Controllers With Vision-Based Perception Using Safe Approximate Abstractions
4217 -- 4228Bo Liu 0019, Ziyu Wang, Xuetao Wang, Renyuan Zhang, Anfeng Xue, Qiao Shen, Na Xie, Yu Gong, Zhen Wang 0019, Jun Yang 0006, Hao Cai. An Efficient BCNN Deployment Method Using Quality-Aware Approximate Computing
4229 -- 4240Chih-Hsuan Yen, Hashan Roshantha Mendis, Tei-Wei Kuo, Pi-Cheng Hsiu. Stateful Neural Networks for Intermittent Systems
4241 -- 4252Gokul Krishnan, Zhenyu Wang, Injune Yeo, Li Yang, Jian Meng, Maximilian Liehr, Rajiv V. Joshi, Nathaniel C. Cady, Deliang Fan, Jae-sun Seo, Yu Cao 0001. Hybrid RRAM/SRAM in-Memory Computing for Robust DNN Acceleration
4253 -- 4264Zhiwei Feng, Zonghua Gu 0001, Haichuan Yu, Qingxu Deng, Linwei Niu. Online Rerouting and Rescheduling of Time-Triggered Flows for Fault Tolerance in Time-Sensitive Networking
4265 -- 4276Manish Goyal 0002, Miheer Dewaskar, Parasara Sridhar Duggirala. NExG: Provable and Guided State-Space Exploration of Neural Network Control Systems Using Sensitivity Approximation
4277 -- 4288Samuele Germiniani, Graziano Pravadelli. HARM: A Hint-Based Assertion Miner
4289 -- 4300Jan Spieck, Stefan Wildermann, Jürgen Teich. On Transferring Application Mapping Knowledge Between Differing MPSoC Architectures
4301 -- 4312Chia-Chih Lin, Ming-Syan Chen. Enhancing Reliability and Security: A Configurable Poisoning PUF Against Modeling Attacks
4313 -- 4324Jiaen Xu, Xiaohang Wang 0001, Yingtao Jiang, Amit Kumar Singh 0002, Chongyan Gu, Letian Huang, Mei Yang, Shunbin Li. Secured Data Transmission Over Insecure Networks-on-Chip by Modulating Inter-Packet Delays
4325 -- 4336Mochamad Asri, Andreas Gerstlauer. CASPHAr: Cache-Managed Accelerator Staging and Pipelining in Heterogeneous System Architectures
4337 -- 4348Sairam Sri Vatsavai, Ishan G. Thakkar. Photonic Reconfigurable Accelerators for Efficient Inference of CNNs With Mixed-Sized Tensors
4349 -- 4360Hassan Nassar, Lars Bauer, Jörg Henkel. CaPUF: Cascaded PUF Structure for Machine Learning Resiliency
4361 -- 4372Rose Bohrer, Bashima Islam. Cyber-Physical Verification of Intermittently Powered Embedded Systems
4373 -- 4384Yiwen Xu, Zijing Yin, Yiwei Hou, Jianzhong Liu, Yu Jiang 0001. MIDAS: Safeguarding IoT Devices Against Malware via Real-Time Behavior Auditing
4385 -- 4396Priyanka Panigrahi, Abhik Paul, Chandan Karfa. Quantifying Information Leakage for Security Verification of Compiler Optimizations
4397 -- 4408Yufei Cui, Shangyu Wu, Qiao Li 0001, Antoni B. Chan, Tei-Wei Kuo, Chun Jason Xue. Bits-Ensemble: Toward Light-Weight Robust Deep Ensemble by Bits-Sharing
4409 -- 4420Aditi Kabra, Stefan Mitsch, André Platzer. Verified Train Controllers for the Federal Railroad Administration Train Kinematics Model: Balancing Competing Brake and Track Forces
4421 -- 4432Zhenya Zhang, Paolo Arcaini, Xuan Xie. Online Reset for Signal Temporal Logic Monitoring
4433 -- 4444Linjun Wu, Yupeng Hu, Kehuan Zhang, Wenjia Li, Xiaolin Xu, Wanli Chang 0001. FLAM-PUF: A Response-Feedback-Based Lightweight Anti-Machine-Learning-Attack PUF
4445 -- 4456Samvid Mistry, Indranil Saha, Swarnendu Biswas. An MILP Encoding for Efficient Verification of Quantized Deep Neural Networks
4457 -- 4468Feilong Zuo, Zhengxiong Luo, Junze Yu, Ting Chen 0002, Zichen Xu 0001, Aiguo Cui, Yu Jiang 0001. Vulnerability Detection of ICS Protocols via Cross-State Fuzzing
4469 -- 4480Niccolò Borgioli, Matteo Zini, Daniel Casini, Giorgiomaria Cicero, Alessandro Biondi, Giorgio C. Buttazzo. An I/O Virtualization Framework With I/O-Related Memory Contention Control for Real-Time Systems
4481 -- 4491Fangzhu Lin, Chunhua Xiao, Weichen Liu, Lin Wu, Chen Shi, Kun Ning. Fast and Low Overhead Metadata Operations for NVM-Based File System Using Slotted Paging
4492 -- 4503Wen Zhang, Mimi Xie, Caleb Scott, Chen Pan. Sparsity-Aware Intelligent Spatiotemporal Data Sensing for Energy Harvesting IoT System
4504 -- 4515Zehong Yu, Zhuo Su 0005, Yixiao Yang, Jie Liang, Yu Jiang, Aiguo Cui, Wanli Chang 0001, Rui Wang. Mercury: Instruction Pipeline Aware Code Generation for Simulink Models
4516 -- 4526Enrico Tabanelli, Giuseppe Tagliavini, Luca Benini. Optimizing Random Forest-Based Inference on RISC-V MCUs at the Extreme Edge
4527 -- 4538Yuhong Wen, You Zhou, Fei Wu 0005, Shu Li, Zhenghong Wang, Changsheng Xie. WA-OPShare: Workload-Adaptive Over-Provisioning Space Allocation for Multi-Tenant SSDs
4539 -- 4550Jongouk Choi, Hyunwoo Joe, Changhee Jung. CapOS: Capacitor Error Resilience for Energy Harvesting Systems
4551 -- 4562Nuzhat Yamin, Ganapati Bhat. Near-Optimal Energy Management for Energy Harvesting IoT Devices Using Imitation Learning
4563 -- 4574Yuheng Shen, Yiru Xu, Hao Sun, Jianzhong Liu, Zichen Xu 0001, Aiguo Cui, Heyuan Shi, Yu Jiang 0001. Tardis: Coverage-Guided Embedded Operating System Fuzzing
4575 -- 4586Yi-Chen Lu, Sai Pentapati, Lingjun Zhu, Gauthaman Murali, Kambiz Samadi, Sung Kyu Lim. A Machine Learning-Powered Tier Partitioning Methodology for Monolithic 3-D ICs
4587 -- 4599Rakibul Hassan, Gaurav Kolhe, Setareh Rafatirad, Houman Homayoun, Sai Manoj Pudukotai Dinakarrao. A Neural Network-Based Cognitive Obfuscation Toward Enhanced Logic Locking
4600 -- 4611Sven Thijssen, Sumit Kumar Jha 0001, Rickard Ewetz. COMPACT: Flow-Based Computing on Nanoscale Crossbars With Minimal Semiperimeter and Maximum Dimension
4612 -- 4625Sudip Poddar, Gerold Fink, Werner Haselmayr, Robert Wille. A Generic Sample Preparation Approach for Different Microfluidic Labs-on-Chips
4626 -- 4638Tianyang Gai, Tong Qu, Shuhan Wang, Xiaojing Su, Renren Xu, Yun Wang, Jing Xue, Yajuan Su, Yayi Wei, Tian-Chun Ye 0001. Flexible Hotspot Detection Based on Fully Convolutional Network With Transfer Learning
4639 -- 4652Jianli Chen, Zhifeng Lin, Yanyue Xie, Wenxing Zhu, Yao-Wen Chang. Mixed-Cell-Height Placement With Complex Minimum-Implant-Area Constraints
4653 -- 4666Yu-Sheng Lu, Sheng-Jung Yu, Yao-Wen Chang. On-Chip Optical Routing With Provably Good Algorithms for Path Clustering and Assignment
4667 -- 4680Zhiyao Xie, Rongjian Liang, Xiaoqing Xu, Jiang Hu, Chen-Chia Chang, Jingyu Pan, Yiran Chen 0001. Preplacement Net Length and Timing Estimation by Customized Graph Neural Network
4681 -- 4693Jinwei Chen, Zhixiong Di, Jiangyi Shi, Quanyuan Feng, Qiang Wu. NBLG: A Robust Legalizer for Mixed-Cell-Height Modern Design
4694 -- 4707Fuxun Yu, Zirui Xu, Chenchen Liu, Dimitrios Stamoulis, Di Wang 0003, Yanzhi Wang, Xiang Chen 0010. AntiDoteX: Attention-Based Dynamic Optimization for Neural Network Runtime Efficiency
4708 -- 4720Jie Xiao 0003, Wenbo Chen, Jungang Lou, Jianhui Jiang, Qianwei Zhou. Identifying Reliability-Critical Primary Inputs of Combinational Circuits Based on the Model of Gate-Sensitive Attributes
4721 -- 4732Zheng Dong 0002, Cong Liu. Schedulability Analysis for Coscheduling Real-Time Tasks on Multiprocessors
4733 -- 4746Liqiang Lu, Yun Liang 0001. Morphling: A Reconfigurable Architecture for Tensor Computation
4747 -- 4757Ang Li, Huiyu Mo, Wenping Zhu, Qiang Li, Shouyi Yin, Shaojun Wei, Leibo Liu. BitCluster: Fine-Grained Weight Quantization for Load-Balanced Bit-Serial Neural Network Accelerators
4758 -- 4770Xingchen Li, Zhihang Yuan, Yijin Guan, Guangyu Sun 0003, Tao Zhang 0032, Rongshan Wei, Dimin Niu. Flatfish: A Reinforcement Learning Approach for Application-Aware Address Mapping
4771 -- 4781Jhon Gomez, Nektar Xama, Anthony Coyette, Ronny Vanhooren, Wim Dobbelaere, Georges G. E. Gielen. DDtM: Increasing Latent Defect Detection in Analog/Mixed-Signal ICs Using the Difference in Distance to Mean Value
4782 -- 4796Ling Liang, Zheng Qu, Zhaodong Chen, Fengbin Tu, Yujie Wu 0002, Lei Deng 0003, Guoqi Li, Peng Li 0001, Yuan Xie 0001. H2Learn: High-Efficiency Learning Accelerator for High-Accuracy Spiking Neural Networks
4797 -- 4807Menghua Jia, Yachen Kong, Xuepeng Zhan, Meng Zhang 0014, Fei Wu 0005, Jiezhi Chen. Optimal Program-Read Schemes Toward Highly Reliable Open Block Operations in 3-D Charge-Trap NAND Flash Memory
4808 -- 4820Chen Chen, Hongyi Wang, Xinyue Song, Feng Liang 0001, Kaikai Wu, Tao Tao. High-Dimensional Bayesian Optimization for Analog Integrated Circuit Sizing Based on Dropout and g/I Methodology
4821 -- 4825Hsiao-Lun Liu, Yi-Ting Li, Yung-Chih Chen, Chun-Yao Wang. A Don't-Care-Based Approach to Reducing the Multiplicative Complexity in Logic Networks
4826 -- 4836Jaeseong Lee 0002, Jungsub Rhim, Duseok Kang, Soonhoi Ha. SNAS: Fast Hardware-Aware Neural Architecture Search Methodology
4837 -- 4850Valeriy Sukharev, Armen Kteyan, Farid N. Najm, Yong Hyeon Yi, Chris H. Kim, Jun-Ho Choy, Sofya Torosyan, Yu Zhu. Experimental Validation of a Novel Methodology for Electromigration Assessment in On-Chip Power Grids
4851 -- 4861Jesús Jiménez-León, Arturo Sarmiento-Reyes, Pedro Rosales-Quintero. A Compact Modeling Methodology for Experimental Memristive Devices
4862 -- 4872Irith Pomeranz. Pass/Fail Data for Logic Diagnosis Under Bounded Transparent Scan
4873 -- 4886Fupeng Chen, Heng Yu 0001, Weixiong Jiang, Yajun Ha. Quality Optimization of Adaptive Applications via Deep Reinforcement Learning in Energy Harvesting Edge Devices
4887 -- 4900Xiaodong Wang, Changhao Yan, Yuzhe Ma, Bei Yu 0001, Fan Yang 0001, Dian Zhou, Xuan Zeng 0001. Analog Circuit Yield Optimization via Freeze-Thaw Bayesian Optimization Technique
4901 -- 4914Amin Sabet, Jonathon S. Hare, Bashir M. Al-Hashimi, Geoff V. Merrett. Similarity-Aware CNN for Efficient Video Recognition at the Edge
4915 -- 4926Zichang He, Zheng Zhang 0005. PoBO: A Polynomial Bounding Method for Chance-Constrained Yield-Aware Optimization of Photonic ICs
4927 -- 4938Debayan Das, Mayukh Nath, Baibhab Chatterjee, Raghavan Kumar, Xiaosen Liu, Harish Krishnamurthy, Manoj Sastry, Sanu Mathew, Santosh Ghosh, Shreyas Sen. EM SCA White-Box Analysis-Based Reduced Leakage Cell Design and Presilicon Evaluation
4939 -- 4951Gyungbin Kim, Minho Cheong, Sungho Kang. SPAR: A New Test-Point Insertion Using Shared Points for Area Overhead Reduction
4952 -- 4964Abraham Peedikayil Kuruvila, Xingyu Meng, Shamik Kundu, Gaurav Pandey 0004, Kanad Basu. Explainable Machine Learning for Intrusion Detection via Hardware Performance Counters
4965 -- 4974Fayu Wan, Taochen Gu, Binhong Li, Bo Li 0051, Wenceslas Rahajandraibe, Mathieu Guerin, Sébastien Lalléchère, Blaise Ravelo. Design and Experimentation of Inductorless Low-Pass NGD Integrated Circuit in 180-nm CMOS Technology
4975 -- 4990Shayan Hassantabar, Xiaoliang Dai, Niraj K. Jha. CURIOUS: Efficient Neural Architecture Search Based on a Performance Predictor and Evolutionary Search
4991 -- 5004Lizhou Wu, Siddharth Rao, Mottaqiallah Taouil, Erik Jan Marinissen, Gouri Sankar Kar, Said Hamdioui. MFA-MTJ Model: Magnetic-Field-Aware Compact Model of pMTJ for Robust STT-MRAM Design
5005 -- 5015Bin Zhou, Ting Ye, Shenggang Wan, Xubin He, Weijun Xiao, Changsheng Xie. Data Representation Aware of Damage to Extend the Lifetime of MLC NAND Flash Memory
5016 -- 5029Hui-Chieh Yu, Yu-Huei Lin, Zhiyang Chen, Bing Li 0005, Xing Huang, Ulf Schlichtmann, Tsung-Yi Ho, Hailong Yao. Contamination-Aware Synthesis for Programmable Microfluidic Devices
5030 -- 5042Wei Li 0159, Yuzhe Ma, Yibo Lin, Bei Yu 0001. Adaptive Layout Decomposition With Graph Embedding Neural Networks
5043 -- 5056Jingyu Wang, Songming Yu, Zhuqing Yuan, Jinshan Yue, Zhe Yuan, Ruoyang Liu, Yanzhi Wang, Huazhong Yang, Xueqing Li, Yongpan Liu. PACA: A Pattern Pruning Algorithm and Channel-Fused High PE Utilization Accelerator for CNNs
5057 -- 5070Yu-Teng Nien, Kai-Chiang Wu, Dong-Zhen Lee, Ying-Yen Chen, Po-Lin Chen, Mason Chern, Jih-Nung Lee, Shu-Yi Kao, Mango Chia-Tso Chao. Methodology of Generating Timing-Slack-Based Cell-Aware Tests
5071 -- 5084Xiaoyu Zhang, Rui Liu, Tao Song, Yuxin Yang, Yinhe Han, Xiaoming Chen 0003. Re-FeMAT: A Reconfigurable Multifunctional FeFET-Based Memory Architecture
5085 -- 5099Sanbao Su, Chang Meng, Fan Yang 0001, Xiaolong Shen, Leibin Ni, Wei Wu, Zhihang Wu, Junfeng Zhao 0003, Weikang Qian. VECBEE: A Versatile Efficiency-Accuracy Configurable Batch Error Estimation Method for Greedy Approximate Logic Synthesis
5100 -- 5111Kun-Chih Chen, Hsueh-Wen Tang, Chi-Hsun Wu, Chia-Hsin Chen. Thermal Sensor Placement for Multicore Systems Based on Low-Complex Compressive Sensing Theory
5112 -- 5125Qiulin Wu, You Zhou, Fei Wu 0005, Hong Jiang 0001, Jian Zhou 0004, Changsheng Xie. Understanding and Exploiting the Full Potential of SSD Address Remapping
5126 -- 5130Gabriel Ammes, Walter Lau Neto, Paulo F. Butzen, Pierre-Emmanuel Gaillardon, Renato P. Ribas. A Two-Level Approximate Logic Synthesis Combining Cube Insertion and Removal
5131 -- 5135Williams Paul Nwadiugwu, Dong-Seong Kim 0003. Reconfigurable Physical Resource Block Using Novel - Beamforming Filter Circuit for LTE-Based Cell-Edge Terminals

Volume 41, Issue 10

3162 -- 3181Martin Rapp, Hussam Amrouch, Yibo Lin, Bei Yu 0001, David Z. Pan, Marilyn Wolf, Jörg Henkel. MLCAD: A Survey of Research in Machine Learning for CAD Keynote Paper
3182 -- 3187Qi Xu, Hao Geng, Tianming Ni, Song Chen 0001, Bei Yu 0001, Yi Kang, Xiaoqing Wen. Fortune: A New Fault-Tolerance TSV Configuration in Router-Based Redundancy Structure
3188 -- 3201Sujan K. Gonugondla, Charbel Sakr, Hassan Dbouk, Naresh R. Shanbhag. Fundamental Limits on Energy-Delay-Accuracy of In-Memory Architectures in Inference Applications
3202 -- 3215Andrew Stern, Huanyu Wang, Fahim Rahman, Farimah Farahmandi, Mark M. Tehranipoor. ACED-IT: Assuring Confidential Electronic Design Against Insider Threats in a Zero-Trust Environment
3216 -- 3227Pranesh Santikellur, Rajat Subhra Chakraborty. Correlation Integral-Based Intrinsic Dimension: A Deep-Learning-Assisted Empirical Metric to Estimate the Robustness of Physically Unclonable Functions to Modeling Attacks
3228 -- 3238Yanjiang Liu, Jiaji He, Haocheng Ma, Tongzhou Qu, Zibin Dai. A Comprehensive Evaluation of Integrated Circuits Side-Channel Resilience Utilizing Three-Independent-Gate Silicon Nanowire Field Effect Transistors-Based Current Mode Logic
3239 -- 3251Behnaz Ranjbar, Ali Hosseinghorban, Siva Satyendra Sahoo, Alireza Ejlali, Akash Kumar 0001. BOT-MICS: Bounding Time Using Analytics in Mixed-Criticality Systems
3252 -- 3265Zhuo Su 0005, Dongyan Wang, Yixiao Yang, Zehong Yu, Wanli Chang 0001, Wen Li, Aiguo Cui, Yu Jiang 0001, Jiaguang Sun 0001. MDD: A Unified Model-Driven Design Framework for Embedded Control Software
3266 -- 3275Vanchinathan Venkataramani, Bruno Bodin, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh. ASCENT: Communication Scheduling for SDF on Bufferless Software-Defined NoC
3276 -- 3289Chenlin Ma, Zhuokai Zhou, Lei Han, Zhaoyan Shen, Yi Wang 0003, Renhai Chen, Zili Shao. Rebirth-FTL: Lifetime Optimization via Approximate Storage for NAND Flash Memory
3290 -- 3303Dhananjaya Wijerathne, Zhaoying Li, Anuj Pathania, Tulika Mitra, Lothar Thiele. HiMap: Fast and Scalable High-Quality Mapping on CGRA via Hierarchical Abstraction
3304 -- 3317Yu-Pei Liang, Tseng-Yi Chen, Yuan-Hao Chang 0001, Yi-Da Huang, Wei Kuan Shih. Planting Fast-Growing Forest by Leveraging the Asymmetric Read/Write Latency of NVRAM-Based Systems
3318 -- 3331Anirudh Mohan Kaushik, Hiren D. Patel. Automatic Construction of Predictable and High-Performance Cache Coherence Protocols for Multicore Real-Time Systems
3332 -- 3345Sanchita Saha Ray, Dulal Adak, Surajeet Ghosh. Worst Case O(N) Comparison-Free Hardware Sorting Engine
3346 -- 3358Rassul Bairamkulov, Tahereh Jabbari, Eby G. Friedman. QuCTS - Single-Flux Quantum Clock Tree Synthesis
3359 -- 3372Asif Mirza, Febin Sunny, Peter Walsh, Karim Hassan, Sudeep Pasricha, Mahdi Nikdast. Silicon Photonic Microring Resonators: A Comprehensive Design-Space Exploration and Optimization Under Fabrication-Process Variations
3373 -- 3386Kuan-Yu Chang, Chun-Yi Lee. Mapping Nearest Neighbor Compliant Quantum Circuits Onto a 2-D Hexagonal Architecture
3387 -- 3399Jungi Lee, Jongeun Lee. Specializing CGRAs for Light-Weight Convolutional Neural Networks
3400 -- 3413Cheng Liu 0008, Cheng Chu, Dawen Xu 0002, Ying Wang 0001, Qianlong Wang, Huawei Li, Xiaowei Li 0001, Kwang-Ting Cheng. HyCA: A Hybrid Computing Architecture for Fault-Tolerant Deep Learning
3414 -- 3425Jinyu Zhan, Ruoxu Sun, Wei Jiang 0016, Yucheng Jiang, Xunzhao Yin, Cheng Zhuo. Improving Fault Tolerance for Reliable DNN Using Boundary-Aware Activation
3426 -- 3437Ahmet Inci, Mehmet Meric Isgenc, Diana Marculescu. DeepNVM++: Cross-Layer Modeling and Optimization Framework of Nonvolatile Memories for Deep Learning
3438 -- 3451Yingcheng Bu, Yi Fang 0005, Guohua Zhang, Jun Cheng. Achievable-Rate-Aware Retention-Error Correction for Multi-Level-Cell NAND Flash Memory
3452 -- 3465Ruslan Dashkin, Rajit Manohar. General Approach to Asynchronous Circuits Simulation Using Synchronous FPGAs
3466 -- 3478Zizheng Guo, MingWei Yang, Tsung-Wei Huang, Yibo Lin. A Provably Good and Practically Efficient Algorithm for Common Path Pessimism Removal in Large Designs
3479 -- 3491Chengning Wang, Dan Feng 0001, Wei Tong 0001, Jingning Liu, Bing Wu, Yiran Chen 0001. Space-Time-Efficient Modeling of Large-Scale 3-D Cross-Point Memory Arrays by Operation Adaption and Network Compaction
3492 -- 3502Qi Xu, Hao Geng, Song Chen 0001, Bo Yuan 0006, Cheng Zhuo, Yi Kang, Xiaoqing Wen. GoodFloorplan: Graph Convolutional Network and Reinforcement Learning-Based Floorplanning
3503 -- 3514Rongjian Liang, Hua Xiang, Diwesh Pandey, Lakshmi N. Reddy, Shyam Ramji, Gi-Joon Nam, Jiang Hu. Design Rule Violation Prediction at Sub-10-nm Process Nodes Using Customized Convolutional Networks
3515 -- 3528Vidya A. Chhabria, Sachin S. Sapatnekar. OpeNPDN: A Neural-Network-Based Framework for Power Delivery Network Synthesis
3529 -- 3542Xiqiong Bai, Ziran Zhu, Pingping Li, Jianli Chen, Tingshen Lan, Xingquan Li, Jun Yu 0010, Wenxing Zhu, Yao-Wen Chang. Timing-Aware Fill Insertions With Design-Rule and Density Constraints
3543 -- 3547Debao Wei, Hua Feng, Liyan Qiao, Cong Hu, Xiyuan Peng. Experimental Verification and Analysis of the Acceleration Factor Model for 3-D nand Flash Memory
3548 -- 3552Mehdi Safarpour, Lei Xun, Geoff V. Merrett, Olli Silvén. A High-Level Approach for Energy Efficiency Improvement of FPGAs by Voltage Trimming
3553 -- 3557Irith Pomeranz. Storage-Based Logic Built-in Self-Test With Multicycle Tests
3558 -- 3562Hao Du 0009, Qian Yang, Xinyue Dai, Xuewen Liao, Anxue Zhang. A Parameter Extraction Method for LC Circuit of DB-BPF Based on Fully Connected Network

Volume 41, Issue 1

1 -- 14Shuhan Zhang, Fan Yang 0001, Changhao Yan, Dian Zhou, Xuan Zeng 0001. An Efficient Batch-Constrained Bayesian Optimization Approach for Analog Circuit Synthesis via Multiobjective Acquisition Ensemble
15 -- 28Jingxiao Ma, Soheil Hashemi, Sherief Reda. Approximate Logic Synthesis Using Boolean Matrix Factorization
29 -- 34Xiang-Min Yang, Pei-pei Chen, Hsiao-Yu Chiang, Chia-Chun Lin, Yung-Chih Chen, Chun-Yao Wang. LOOPLock 2.0: An Enhanced Cyclic Logic Locking Approach
35 -- 48Rana Elnaggar, Kanad Basu, Krishnendu Chakrabarty, Ramesh Karri. Runtime Malware Detection Using Embedded Trace Buffers
49 -- 61Zhuo Su 0005, Dongyan Wang, Yixiao Yang, Yu Jiang 0001, Wanli Chang 0001, Liming Fang 0001, Wen Li, Jia-Guang Sun 0001. Code Synthesis for Dataflow-Based Embedded Software Design
62 -- 75Zhishan Guo, Sudharsan Vaidhun, Luca Satinelli, Samsil Arefin, Jun Wang 0001, Kecheng Yang 0001. Mixed-Criticality Scheduling Upon Permitted Failure Probability and Dynamic Priority
76 -- 90Yawen Wu, Zhenge Jia, Fei Fang, Jingtong Hu. Cooperative Communication Between Two Transiently Powered Sensor Nodes by Reinforcement Learning
91 -- 103Tai Chang, Jen-Wei Hsieh, Tai-Chieh Chang, Liang-Wei Lai. EMT: Elegantly Measured Tanner for Key-Value Store on SSD
104 -- 115Mehdi Sadi, Ujjwal Guin. Test and Yield Loss Reduction of AI and Deep Learning Accelerators
116 -- 128Xinkai Song, Tian Zhi, Zhe Fan, Zhenxing Zhang, Xi Zeng, Wei Li, Xing Hu 0001, Zidong Du, Qi Guo 0001, Yunji Chen. Cambricon-G: A Polyvalent Energy-Efficient Accelerator for Dynamic Graph Neural Networks
129 -- 142Elena-Diana Sandru, Emilian David, Ingrid Kovacs, Andi Buzo, Corneliu Burileanu, Georg Pelz. Modeling the Dependency of Analog Circuit Performance Parameters on Manufacturing Process Variations With Applications in Sensitivity Analysis and Yield Prediction
143 -- 154Haocheng Li, Wing-Kai Chow, Gengjie Chen, Bei Yu 0001, Evangeline F. Y. Young. Pin-Accessible Legalization for Mixed-Cell-Height Circuits
155 -- 168Yibai Meng, Wuxi Li, Yibo Lin, David Z. Pan. elfPlace: Electrostatics-Based Placement for Large-Scale Heterogeneous FPGAs
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