Table of Contents

• Principles and trends in quantum nano-electronics and nano-magnetics for beyond-CMOS computingIan A. Young, Dmitri E. Nikonov. 1-5 [doi]
• 22% Higher performance, 2x SCM write endurance heterogeneous storage with dual storage class memory and NAND flashChihiro Matsui, Ken Takeuchi. 6-9 [doi]
• Study of error repeatability and recovery in 40nm TaOx ReRAMTakashi Inose, Seiichi Aritome, Ryutaro Yasuhara, Satoshi Mishima, Ken Takeuchi. 10-13 [doi]
• Optimization of writing scheme on 1T1R RRAM to achieve both high speed and good uniformityShan Wang, Huaqiang Wu, Bin Gao, Ning Deng, Dong Wu, He Qian. 14-17 [doi]
• Analyzing inference robustness of RRAM synaptic array in low-precision neural networkRui Liu, Heng-Yuan Lee, Shimeng Yu. 18-21 [doi]
• SPICE modeling in Verilog-A: Successes and challenges: Invited paperColin C. McAndrew. 22-25 [doi]
• SPICE modeling of light induced current in silicon with 'Generalized' lumped devicesChiara Rossi, Pietro Buccella, Camillo Stefanucci, Jean-Michel Sallese. 26-29 [doi]
• Total ionizing dose effects on analog performance of 28 nm bulk MOSFETsC.-M. Zhang, Farzan Jazaeri, Alessandro Pezzotta, Claudio Bruschini, G. Borghello, S. Mattiazzo, Andrea Baschirotto, Christian C. Enz. 30-33 [doi]
• 1/f Noise in 3D vertical gate-all-around junction-less silicon nanowire transistorsChhandak Mukherjee, Cristell Maneux, Julien Pezard, Guilhem Larrieu. 34-37 [doi]
• Random telegraph signal noise in tunneling field-effect transistors with S below 60 mV/decadeMarkus Hellenbrand, Elvedin Memisevic, Johannes Svensson, Erik Lind, Lars-Erik Wernersson. 38-41 [doi]
• Experimental characterization of the static noise margins of strained silicon complementary tunnel-FET SRAMGia Vinh Luong, Sebastiano Strangio, Andreas T. Tiedemann, P. Bernardy, Stefan Trellenkamp, Pierpaolo Palestri, Siegfried Mantl, Qing-Tai Zhao. 42-45 [doi]
• Advances in the understanding of microscopic switching mechanisms in ReRAM devices (Invited paper)Benoit Skienard, Philippe Blaise, Boubacar Traore, Alberto Dragoni, Cecile Nail, Elisa Vianello. 46-49 [doi]
• Modeling the effect of surface roughness on the performance of line tunnel FETsSaurabh Sant, Andreas Schenk. 50-53 [doi]
• Material selection and device design guidelines for two-dimensional materials based TFETsTarun Agarwal, Bart Soree, Iuliana Radu, Praveen Raghavan, Gianluca Fiori, Marc M. Heyns, Wim Dehaene. 54-57 [doi]
• Nanometer CMOS characterization and compact modeling at deep-cryogenic temperaturesRosario M. Incandela, L. Song, Harald A. R. Homulle, Fabio Sebastiano, Edoardo Charbon, Andrei Vladimirescu. 58-61 [doi]
• Cryogenic characterization of 28 nm bulk CMOS technology for quantum computingArnout Beckers, Farzan Jazaeri, Andrea Ruffino, Claudio Bruschini, Andrea Baschirotto, Christian Enz. 62-65 [doi]
• A new method for junctionless transistors parameters extractionRenan Trevisoli Doria, Rodrigo Trevisoli Doria, Michelly de Souza, Marcelo Antonio Pavanello, Sylvain Barraud. 66-69 [doi]
• Avalanche compact model featuring SiGe HBTs characteristics up to BVcboMathieu Jaoul, Didier Celi, Cristell Maneux, Michael Schröter, Andreas Pawlak. 70-73 [doi]
• Utilizing I-V non-linearity and analog state variations in ReRAM-based security primitivesGina C. Adam, Hussein Nili, J. Kim, Brian D. Hoskins, Omid Kavehei, Dmitri B. Strukov. 74-77 [doi]
• Negative capacitance field effect transistors; capacitance matching and non-hysteretic operationAli Saeidi, Farzan Jazaeri, Francesco Bellando, Igor Stolichnov, Christian C. Enz, Adrian M. Ionescu. 78-81 [doi]
• Buried multi-gate InAs-nanowire FETsThomas Grap, F. Riederer, C. Gupta, Joachim Knoch. 82-85 [doi]
• Equivalent circuit model for the electron transport in 2D resistive switching material systemsE. Miranda, J. Sune, C. Pan, M. Villena, N. Xiao, M. Lanza. 86-89 [doi]
• Analytical drain current model for non-ballistic Schottky-Barrier CNTFETsIgor Bejenari, Michael Schröter, Martin Claus. 90-93 [doi]
• A general circuit model for spintronic devices under electric and magnetic fieldsMeshal Alawein, Hossein Fariborzi. 94-97 [doi]
• Compact physical model of a-IGZO TFTs for circuit simulationMatteo Ghittorelli, Fabrizio Torricelli, Carmine Garripoli, Jan-Laurens P. J. van der Steen, Gerwin H. Gelinck, Sahel Abdinia, Eugenio Cantatore, Zsolt Miklós Kovács-Vajna. 98-101 [doi]
• Complementary black phosphorous FETs by workfunction engineering of pre-patterned Au and Ag embedded electrodesNicolo Oliva, Emanuele A. Casu, Wolfgang A. Vitale, Igor Stolichnov, Adrian M. Ionescu. 102-105 [doi]
• Tunneling transistors based on MoS2/MoTe2 Van der Waals heterostructuresYashwanth Balaji, Quentin Smets, Cesar J. Lockhart de la Rosa, Anh Khoa Augustin Lu, Daniele Chiappe, Tarun Agarwal, Dennis Lin, Cedric Huyghebaert, Iuliana Radu, Dan Mocuta, Guido Groeseneken. 106-109 [doi]
• Temperature dependence of contact resistance for gold-graphene contactsAmit Gahoi, Satender Kataria, Max C. Lemme. 110-113 [doi]
• Radical oxidation process for hybrid SAM/HfOx gate dielectrics in MoS2 FETsTakamasa Kawanago, Ryo Ikoma, Tomoaki Oba, Hiroyuki Takagi. 114-117 [doi]
• CoolSiC™ and major trends in SiC power device developmentRoland Rupp. 118-121 [doi]
• Gated base structure for improved current gain in SiC bipolar technologyB. Gunnar Malm, Hossein Elahipanah, Arash Salemi, Mikael Östling. 122-125 [doi]
• On the understanding of cathode related trapping effects in GaN-on-Si Schottky diodesW. Vandendaele, T. Lorin, Romain Gwoziecki, Y. Baines, J. Biscarrat, M.-A. Jaud, C. Gillot, M. Charles, M. Plissonnier, G. Reimbold. 126-129 [doi]
• Temperature dependent substrate trapping in AlGaN/GaN power devices and the impact on dynamic ronArno Stockman, Michael Uren, Alaleh Tajalli, Matteo Meneghini, Benoit Bakeroot, Peter Moens. 130-133 [doi]
• Material and device innovation impact on reliability for scaled CMOS technologiesTanya Nigam, Andreas Kerber, T. Shen, R. Ranjan, L. Cao. 134-139 [doi]
• Carrier lifetime evaluation in FD-SOI layersK. H. Lee, Maryline Bawedin, H. J. Park, Mukta Singh Parihar, Sorin Cristoloveanu. 140-143 [doi]
• Precise EOT regrowth extraction enabling performance analysis of low temperature extension first devicesJessy Micout, Quentin Rafhay, X. Garros, Mikaël Casse, Jean Coignus, L. Pasini, Cao-Minh Vincent Lu, Nils Rambal, Claire Fenouillet-Béranger, Laurent Brunet, G. Romano, R. Gassilloud, Perrine Batude, Maud Vinet, Gérard Ghibaudo. 144-147 [doi]
• Back-gate bias effect on UTBB-FDSOI non-linearity performanceB. Kazemi Esfeh, Valeria Kilchytska, B. Parvais, Nicolas Planes, M. Haond, Denis Flandre, Jean-Pierre Raskin. 148-151 [doi]
• Evolution of oxygen vacancies under electrical characterization for HfOx-based ReRAMsB. Attarimashalkoubeh, Jury Sandrini, E. Shahrabi, Yusuf Leblebici. 152-155 [doi]
• Emerging memory technologies for high density applicationsGiorgio Servalli. 156-159 [doi]
• Anti-ferroelectric ZrO2, an enabler for low power non-volatile 1T-1C and 1T random access memoriesMilan Pesic, M. Hoffmann, C. Richter, Stefan Slesazeck, T. Kampfe, L. M. Eng, Thomas Mikolajick, Uwe Schroeder. 160-163 [doi]
• From planar to vertical capacitors: A step towards ferroelectric V-FeFET integrationKarine Florent, Simone Lavizzari, Luca Di Piazza, Mihaela Popovici, Goedele Potoms, Tom Raymaekers, Guido Groeseneken, Jan Van Houdt. 164-167 [doi]
• Doped GeSe materials for selector applicationsNaga Sruti Avasarala, Bogdan Govoreanu, Karl Opsomer, W. Devulder, S. Clima, Christophe Detavernier, Marleen van der Veen, Jan Van Houdt, Marc Henys, Ludovic Goux, G. S. Kar. 168-171 [doi]
• Multilevel SOT-MRAM cell with a novel sensing scheme for high-density memory applicationsBehzad Zeinali, Mahsa Esmaeili, Jens Kargaard Madsen, Farshad Moradi. 172-175 [doi]
• On the ballistic ratio in 14nm-Node FinFETsF. M. Bufler, Kenichi Miyaguchi, Thomas Chiarella, N. Horiguchi, Anda Mocuta. 176-179 [doi]
• Three-dimensional multi-subband simulation of scaled FinFETsLuca Donetti, Carlos Sampedro, F. G. Ruiz, Andres Godoy, Francisco Gámiz. 180-183 [doi]
• Study of strained effects in nanoscale GAA nanowire FETs using 3D Monte Carlo simulationsMuhammad A. Elmessary, Daniel Nagy, Manuel Aldegunde, Antonio J. García-Loureiro, Karol Kalna. 184-187 [doi]
• Investigation of electrically gate-all-around hexagonal nanowire FET (HexFET) architecture for 5 nm node logic and SRAM applicationsJeffrey A. Smith, Kai Ni, Ram Krishna Ghosh, Jeff Xu, Mustafa Badaroglu, P. R. Chidi Chidambaram, Suman Datta. 188-191 [doi]
• Modeling of dynamic trap density increase for aging simulation of any MOSFET circuitsMichiko Miura-Mattausch, Hidenori Miyamoto, Hideyuki Kikuchihara, D. Navarro, Tapas K. Maiti, N. Rohbani, C. Ma, Hans Jürgen Mattausch, A. Schiffmann, Alexander Steinmair, Ehrenfried Seebacher. 192-195 [doi]
• Comprehensive compact electro-thermal GaN HEMT modelMuhammad Alshahed, M. Dakran, L. Heuken, M. Alomari, Joachim N. Burghartz. 196-199 [doi]
• Trap-assisted carrier transport through the multi-stack gate dielectrics of HKMG nMOS transistors: A compact modelApoorva Ojha, Nihar R. Mohapatra. 200-203 [doi]
• A new verilog-A compact model of random telegraph noise in oxide-based RRAM for advanced circuit designFrancesco Maria Puglisi, Nicolo Zagni, Luca Larcher, Paolo Pavan. 204-207 [doi]
• Ink-jet printed 2D crystal heterostructuresFrancesco Bonaccorso. 208-211 [doi]
• WS2 transistors on 300 mm wafers with BEOL compatibilityTom Schram, Quentin Smets, B. Groven, M. H. Heyne, E. Kunnen, A. Thiam, K. Devriendt, Annelies Delabie, Dennis Lin, M. Lux, Daniele Chiappe, I. Asselberghs, S. Brus, Cedric Huyghebaert, S. Sayan, A. Juncker, Matty Caymax, Iuliana P. Radu. 212-215 [doi]
• 200 mm Wafer level graphene transfer by wafer bonding techniqueMesut Inac, Grzegorz Lupina, Matthias Wietstruck, Marco Lisker, Mirko Fraschke, Andreas Mai, Fabio Coccetti, Mehmet Kaynakt. 216-219 [doi]
• Epitaxial growth and diffusion characteristics analysis of vertical thin poly-Si channel transfer gate structured pixels for 3D CMOS image sensorSung-Kun Park, Donghyun Woo, Min-Ki Na, Pyong-Su Kwag, Ho-Ryeong Lee, Kyoung-Wook Ro, Kyung-Hwan Kim, Dong-Kyu Lee, Chris Hong, In-Wook Cho, Kyung-Dong Yoo. 220-223 [doi]
• Modelling, design and characterization of Schottky diodes in 28nm bulk CMOS for 850/1310/1550nm fully integrated optical receiversWouter Diels, Michiel Steyaert, Filip Tavernier. 224-227 [doi]
• Importance of buffer configuration in GaN HEMTs for high microwave performance and robustnessR. Pecheux, R. Kabouche, E. Dogmus, A. Linge, E. Okada, M. Zegaoui, F. Medjdoub. 228-231 [doi]
• Shunt capacitive switches based on VO2 metal insulator transition for RF phase shifter applicationsEmanuele A. Casu, Wolfgang A. Vitale, Michele Tamagnone, M. Maqueda Lopez, Nicolo Oliva, A. Krammer, A. Schuler, Montserrat Fernandez-Bolaños, Adrian M. Ionescu. 232-235 [doi]
• Single event effects and total ionising dose in 600V Si-on-SiC LDMOS transistors for rad-hard space applicationsK. Ben Ali, P. M. Gammon, C. W. Chan, F. Li, V. Pathirana, T. Trajkovic, Farzan Gity, Denis Flandre, Valeria Kilchytska. 236-239 [doi]
• PPAC scaling enablement for 5nm mobile SoC technologyMustafa Badaroglu, Jeff Xu, John Zhu, Da Yang, Jerry Bao, Seung Chul Song, Peijie Feng, Romain Ritzenthaler, Hans Mertens, Geert Eneman, Naoto Horiguchi, Jeffrey Smith, Suman Datta, David Kohen, Po-Wen Chan, Keagan Chen, P. R. Chidi Chidambaram. 240-243 [doi]
• Hybrid InGaAs/SiGe CMOS circuits with 2D and 3D monolithic integrationV. Deshpande, H. Hahn, V. Djara, E. O'Connor, D. Caimi, M. Sousa, J. Fompeyrine, L. Czornomaz. 244-247 [doi]
• Tunable ESD clamp for high-voltage power I/O pins of a battery charge circuit in mobile applicationsMirko Scholz, Geert Hellings, Shih-Hung Chen, Dimitri Linten. 248-251 [doi]
• Guidelines for intermediate back end of line (BEOL) for 3D sequential integrationClaire Fenouillet-Béranger, S. Beaurepaire, Fabien Deprat, Alexandre Ayres De Sousa, Laurent Brunet, Perrine Batude, Olivier Rozeau, François Andrieu, Paul Besombes, M.-P. Samson, Bernard Previtali, F. Nemouchi, G. Rodriguez, P. Rodriguez, R. Famulok, Nils Rambal, V. Balan, Z. Saghi, V. Jousseaume, Charles-Antoine Guérin, F. Ibars, F. Proud, D. Nouguier, D. Ney, V. Delaye, H. Dansas, X. Federspiel, Maud Vinet. 252-255 [doi]
• Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7Mohit Kumar Gupta, Pieter Weckx, Stefan Cosemans, Pieter Schuddinck, Rogier Baert, Dmitry Yakimets, Doyoung Jang, Yasser Sherazi, Praveen Raghavan, Alessio Spessot, Anda Mocuta, Wim Dehaene. 256-259 [doi]
• Microfluidic technology: New opportunities to develop physiologically relevant in vitro models integrated microfluidic platform for the in vitro pre-implantation culture of individual mammalian embryos and their in situ characterizationSeverine Le Gac. 260-263 [doi]
• Development of ultrasensitive extended-gate Ion-sensitive-field-effect-transistor based on industrial UTBB FDSOI transistorGetenet Tesega Ayele, Stephane Monfray, Frédéric Boeuf, Jean-Pierre Cloarec, Serge Ecoffey, Dominique Drouin, Etienne Puyoo, Abdelkader Souifi. 264-267 [doi]
• Ultrathin lateral unidirectional bipolar-type insulated-gate transistor as pH sensorQinghua Han, Anran Gao, Keyvan Narimani, Yuelin Wang, Tie Li, Siegfried Mantl, Qing-Tai Zhao. 268-271 [doi]
• A novel approach for scalable sensor arrays using cantilever field-effect transistorsAndreas Hessel, Stefan Scholz, Alexander Pelger, Albert Pfander, Joachim Knoch. 272-275 [doi]
• ESD characterisation of a-IGZO TFTs on Si and foil substratesNian Wang, Shih-Hung Chen, Geert Hellings, Kris Myny, Soeren Steudel, Mirko Scholz, Roman Boschke, Dimitri Linten, Guido Groeseneken. 276-279 [doi]
• Dopant diffusion and segregation, Si-Ge interdiffusion and defect engineering in SiGe devicesGuangrui Xia. 280-283 [doi]
• Physical modeling of the hysteresis in M0S2 transistorsTheresia Knobloch, Gerhard Rzepa, Yury Yu. Illarionov, Michael Waltl, Franz Schanovsky, Markus Jech, Bernhard Stampfer, Marco M. Furchi, Thomas Muller, Tibor Grasser. 284-287 [doi]
• Impact of impurities, interface traps and contacts on MoS2 MOSFETs: Modelling and experimentsGioele Mirabelli, Farzan Gity, Scott Monaghan, Paul K. Hurley, Ray Duffy. 288-291 [doi]
• Electron mobility in thin In0.53Ga0.47As channelE. Cartier, A. Majumdar, K. T. Lee, T. Ando, M. M. Frank, J. Rozen, K. A. Jenkins, C. Liang, C. W. Cheng, J. Bruley, M. Hopstaken, P. Kerber, J.-B. Yau, X. Sun, R. T. Mo, C.-C. Yeh, E. Leobandung, V. Narayanan. 292-295 [doi]
• Understanding of slow traps generation in plasma oxidation GeOx/Ge MOS interfaces with ALD high-k layersMengnan Ke, Mitsuru Takenaka, Shinichi Takagi. 296-299 [doi]
• Isolation of nanowires made on bulk wafers by ground plane dopingRomain Ritzenthaler, Hans Mertens, A. De Keersgieter, Jérôme Mitard, D. Mocuta, N. Horiguchi. 300-303 [doi]
• In-depth electrical characterization of carrier transport in ambipolar Si-NW Schottky-barrier FETsDae-Young Jeon, Tim Baldauf, So-Jeong Park, Sebastian Pregi, Larysa Baraban, Gianaurelio Cuniberti, Thomas Mikolajick, Walter M. Weber. 304-307 [doi]