Rochit Rajsuman - researchr alias

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Viewing Publication 1 - 37 from 37

2006

Guest Editorial Second Special Section of the IEEE Transactions on Instrumentation and Measurement in the Area of VLSI Testing - Future of Semiconductor TestSunil R. Das, Rochit Rajsuman. tim, 55(2):378-380, 2006. [doi]

Innovation In Test: Where Are WeRochit Rajsuman. delta 2006: 289-294 [doi]

Towards The Methodology of On-line DiagnosisRochit Rajsuman. iolts 2006: 76 [doi]

2005

Guest Editorial First Special Section of the IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT in the Area of VLSI Testing - Future of Semiconductor TestSunil R. Das, Rochit Rajsuman. tim, 54(5):1659-1661, 2005. [doi]

Architecture and design of an open ATE to incubate the development of third-party instrumentsRochit Rajsuman, Masuda Noriyuki, Kazuhiro Yamashita. tim, 54(5):1678-1698, 2005. [doi]

2004

Opportunities with the open architecture test systemKazumi Hatayama, Rochit Rajsuman. aspdac 2004: 334 [doi]

Open Architecture Test System: System Architecture and DesignRochit Rajsuman, Masuda Noriyuki. itc 2003: 403-412 [doi]

New opportunities with the open architecture test systemRochit Rajsuman. aspdac 2004: 335 [doi]

An Overview of the Open Architecture Test SystemRochit Rajsuman. delta 2004: 341-348 [doi]

2003

Guest editorial [Special section on innovations in VLSI automatic test equipment (ATEs)]Sunil R. Das, Rochit Rajsuman. tim, 52(5):1350-1352, 2003. [doi]

Architecture, design, and application of an event-based test systemRochit Rajsuman. tim, 52(5):1408-1427, 2003. [doi]

2002

Extending EDA Environment From Design to TestRochit Rajsuman. ats 2002: 386-391 [doi]

Testing The TesterRochit Rajsuman. itc 2002: 30 [doi]

Can IC Test Learn from How a Tester is TestedRochit Rajsuman. itc 2002: 1186 [doi]

Testing The TesterRochit Rajsuman. itc 2002: 27 [doi]

2001

Test and repair of large embedded DRAMs. IRoderick McConnell, Rochit Rajsuman, Eric A. Nelson, Jeffrey Dreibelbis. itc 2001: 163-172

Design and Test of Large Embedded Memories: An OverviewRochit Rajsuman. dt, 18(3):16-27, 2001. [doi]

Guest Editors Intoduction: The New World of Large Embedded MemoriesRochit Rajsuman, Francky Catthoor. dt, 18(3):3-4, 2001.

2000

A new paradigm in test for the next millenniumJerry Katz, Rochit Rajsuman. itc 2000: 468-476

Iddq testing for CMOS VLSIRochit Rajsuman. pieee, 88(4):544-568, 2000. [doi]

1999

Testing a system-on-a-chip with embedded microprocessorRochit Rajsuman. itc 1999: 499-508

1997

VLSI Testing for High Reliability: Mixing IDDQ Testing With Logic TestingSuntae Hwang, Rochit Rajsuman. vlsi, 5(3):299-311, 1997. [doi]

1996

Challenge of the 90 s: Testing CoreWare:::TM::: Based ASICsRochit Rajsuman. itc 1996: 940

1995

Testable design of BiCMOS circuits for stuck-open fault detection using single patternsSankaran M. Menon, Yashwant K. Malaiya, Anura P. Jayasumana, Rochit Rajsuman. jssc, 30(8):855-863, August 1995. [doi]

1994

::::I::DDQ:::::: Detection of CMOS Bridging Faults by Stuck-At Fault TestsS. Hwang, Rochit Rajsuman, Scott Davidson. vlsid 1994: 183-186

A new testing method for EEPLARochit Rajsuman. tcad, 13(7):935-939, 1994. [doi]

Special Issue on Digital Hardware TestingRochit Rajsuman. vlsi, 1(4), 1994. [doi]

STD Architecture: A Practical Approach to Test M-Bits Random Access MemoriesRochit Rajsuman, Kamal Rajkanan. vlsi, 1(4):327-334, 1994. [doi]

1993

Coverage of Bridging Faults by Random Testing in I::DDQ:: Test EnvironmentRochit Rajsuman, D. A. Penry. vlsid 1993: 136-139

1992

An Architecture To Test Random Access MemoriesRochit Rajsuman. vlsid 1992: 144-147 [doi]

An analysis and simulation of multiple ring token networksDavid A. Vasko, Rochit Rajsuman. lcn 1992: 649-657 [doi]

1991

An analysis of feedback bridging faults in MOS VLSIRochit Rajsuman. vts 1991: 53-58 [doi]

An analysis and testing of operation induced faults in MOS VLSIRochit Rajsuman, Anura P. Jayasumana, Yashwant K. Malaiya, Juney Park. vts 1991: 137-142 [doi]

1990

On the testing of microprogrammed processorS. Hwang, Rochit Rajsuman, Yashwant K. Malaiya. euromicro 1990: 260-266 [doi]

1989

CMOS Stuck-open Fault Detection Using Single Test PatternsRochit Rajsuman, Anura P. Jayasumana, Yashwant K. Malaiya. dac 1989: 714-717 [doi]

Limitations of switch level analysis for bridging faultsRochit Rajsuman, Yashwant K. Malaiya, Anura P. Jayasumana. tcad, 8(7):807-811, 1989. [doi]

1987

On Accuracy of Switch-Level Modeling of Bridging Faults in Complex GatesRochit Rajsuman, Yashwant K. Malaiya, Anura P. Jayasumana. dac 1987: 244-250 [doi]

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