| 1929 | -- | 1937 | Chingwei Yeh, Yuan-Chang Chen, Jinn-Shyan Wang. Towards Process Variation-Aware Power Gating |
| 1938 | -- | 1950 | Xinmiao Zhang, Fang Cai, Shu Lin. Low-Complexity Reliability-Based Message-Passing Decoder Architectures for Non-Binary LDPC Codes |
| 1951 | -- | 1959 | Hyunbean Yi, Tomokazu Yoneda, Michiko Inoue, Yasuo Sato, Seiji Kajihara, Hideo Fujiwara. A Failure Prediction Strategy for Transistor Aging |
| 1960 | -- | 1973 | Jianxin Fang, Sachin S. Sapatnekar. Scalable Methods for Analyzing the Circuit Failure Probability Due to Gate Oxide Breakdown |
| 1974 | -- | 1985 | Stuart N. Wooters, Adam C. Cabe, Zhenyu Qi, Jiajing Wang, Randy W. Mann, Benton H. Calhoun, Mircea R. Stan, Travis N. Blalock. Tracking On-Chip Age Using Distributed, Embedded Sensors |
| 1986 | -- | 1996 | Aashish Pant, Puneet Gupta, Mihaela van der Schaar. AppAdapt: Opportunistic Application Adaptation in Presence of Hardware Variation |
| 1997 | -- | 2010 | Marcel Gort, Flavio M. de Paula, Johnny J. W. Kuan, Tor M. Aamodt, Alan J. Hu, Steven J. E. Wilton, Jin Yang. Formal-Analysis-Based Trace Computation for Post-Silicon Debug |
| 2011 | -- | 2019 | Suknam Kwon, Sungjoo Yoo, Sunggu Lee, Jinpyo Park. Optimizing Video Application Design for Phase-Change RAM-Based Main Memory |
| 2020 | -- | 2030 | Zhenyu Sun, Hai Li, Yiran Chen, XiaoBin Wang. Voltage Driven Nondestructive Self-Reference Sensing Scheme of Spin-Transfer Torque Memory |
| 2031 | -- | 2043 | P. Aubertin, J. M. Pierre Langlois, Yvon Savaria. Real-Time Computation of Local Neighborhood Functions in Application-Specific Instruction-Set Processors |
| 2044 | -- | 2053 | Kyungho Ryu, Jisu Kim, Jiwan Jung, Jung Pill Kim, Seung-Hyuk Kang, Seong-Ook Jung. A Magnetic Tunnel Junction Based Zero Standby Leakage Current Retention Flip-Flop |
| 2054 | -- | 2065 | S.-H. Lee, S. Vishwanath. Boolean Functions Over Nano-Fabrics: Improving Resilience Through Coding |
| 2066 | -- | 2079 | Michael B. Healy, Sung Kyu Lim. Distributed TSV Topology for 3-D Power-Supply Networks |
| 2080 | -- | 2093 | Rohit Sunkam Ramanujam, Bill Lin. Randomized Partially-Minimal Routing: Near-Optimal Oblivious Routing for 3-D Mesh Networks |
| 2094 | -- | 2103 | Jingwei Lu, Wing-Kai Chow, Chiu-Wing Sham. Fast Power- and Slew-Aware Gated Clock Tree Synthesis |
| 2104 | -- | 2117 | Saket Gupta, Sachin S. Sapatnekar. Compact Current Source Models for Timing Analysis Under Temperature and Body Bias Variations |
| 2118 | -- | 2122 | Weiguo Tang, Jie Huang, Lei Wang 0003, Shengli Zhou. A Nonbinary LDPC Decoder Architecture With Adaptive Message Control |
| 2123 | -- | 2127 | Yu-Jen Huang, Jin-Fu Li. Low-Cost Self-Test Techniques for Small RAMs in SOCs Using Enhanced IEEE 1500 Test Wrappers |
| 2128 | -- | 2132 | Marco Bucci, Luca Giancane, Raimondo Luzzi, Alessandro Trifiletti. A Flip-Flop for the DPA Resistant Three-Phase Dual-Rail Pre-Charge Logic Family |
| 2133 | -- | 2137 | Erick Amador, Raymond Knopp, Renaud Pacalet, Vincent Rezard. Dynamic Power Management for the Iterative Decoding of Turbo Codes |
| 2138 | -- | 2142 | Irith Pomeranz. Non-Uniform Coverage by n -Detection Test Sets |
| 2143 | -- | 2147 | Xiaoming Chen, Yu Wang 0002, Yu Cao, Yuchun Ma, Huazhong Yang. Variation-Aware Supply Voltage Assignment for Simultaneous Power and Aging Optimization |
| 2147 | -- | 2151 | Wei Wu, Dinesh Somasekhar, Shih-Lien Lu. Direct Compare of Information Coded With Error-Correcting Codes |
| 2151 | -- | 2156 | Ting-Jung Lin, Wei Zhang, N. K. Jha. SRAM-Based NATURE: A Dynamically Reconfigurable FPGA Based on 10T Low-Power SRAMs |