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Viewing Publication 1 - 100 from 186
2023
IEEE International Test Conference in Asia, ITC-Asia 2023, Matsue, Japan, September 12-14, 2023
IEEE,
2023.
[doi]
Cost-Effective Error-Mitigation for High Memory Error Rate of DNN: A Case Study on YOLOv4
Wei-Ji Chao
,
Tong-Yu Hsieh
.
itc-asia 2023
:
1-6
[doi]
BDD-Based Self-Test Program Generation for Processor Cores
Hao Cheng
,
Chi-Jhe Li
,
Hung-Lin Chen
,
Jiun-Lang Huang
.
itc-asia 2023
:
1-6
[doi]
Generating Test Patterns for Chiplet Interconnects: Achieving Optimal Effectiveness and Efficiency
Po-Yao Chuang
,
Francesco Lorenzelli
,
Erik Jan Marinissen
.
itc-asia 2023
:
1-6
[doi]
Scalable hierarchical DFT technologies for AI, SOC and multi-die : Tutorial 1
Lee Harrison
,
Wu Yang
.
itc-asia 2023
:
1
[doi]
Parametric Faults in Computing-in-Memory Applications of a 4kb Read-Decoupled 8T SRAM Array in 40nm CMOS
Hao-Chiao Hong
,
Chien-Hung Chen
,
Yu-Wun Chen
.
itc-asia 2023
:
1-5
[doi]
Hunting for Hardware Trojan in Gate Netlist: A Stacking Ensemble Learning Perspective
Liang Hong
,
Ge Zhu
,
Jing Zhou
,
Xuefei Li
,
Ziyi Chen
,
Wei Hu
.
itc-asia 2023
:
1-6
[doi]
A Physically Unclonable Function Using Time-to-Digital Converter with Linearity Self-Calibration and its FPGA Implementation
Kentaroh Katoh
,
Shuhei Yamamoto
,
Zheming Zhao
,
Yujie Zhao
,
Shogo Katayama
,
Anna Kuwana
,
Takayuki Nakatani
,
Kazumi Hatayama
,
Haruo Kobayashi 0001
,
Keno Sato
,
Takashi Ishida 0003
,
Toshiyuki Okamoto
,
Tamotsu Ichikawa
.
itc-asia 2023
:
1-6
[doi]
Experimental Evaluation of Jitter Reduction Methods for Multi-Gigahertz Test
David C. Keezer
,
Dany Minier
,
Hongjie Li
.
itc-asia 2023
:
1-6
[doi]
Self-Sufficient Clock Jitter Measurement Methodology Using Dithering-Based Calibration
Yi-Hsuan Lee
,
Wei-Hao Chen
,
Shi-Yu Huang
.
itc-asia 2023
:
1-6
[doi]
Software Defect Detection Based on Feature Fusion and Alias Analysis
Xuejian Li
,
Zhengguang Zhu
.
itc-asia 2023
:
1-6
[doi]
Integrated Progressive Built-In Self-Repair (IPBISR) Techniques for NAND Flash Memory
Shyue-Kung Lu
,
Xin Dong
.
itc-asia 2023
:
1-6
[doi]
Moore Meets Murphy : Invited Talk 1
Erik Jan Marinissen
.
itc-asia 2023
:
1
[doi]
Test industry challenges and solutions as observed by the leading physical implementation solution provider : Invited Talk 2
Janet Olson
.
itc-asia 2023
:
1
[doi]
Semiconductor Packaging Revolution in the Era of Chiplets : Keynote 1
Yasumitsu Orii
.
itc-asia 2023
:
1
[doi]
Design of Single Node Upset Resilient Latch for Low Power, Low Cost and Highly Robust Applications
Anwesh Kumar Samal
,
Sandeep Kumar
,
Atin Mukherjee
.
itc-asia 2023
:
1-5
[doi]
Feasibility Study of Incremental Neural Network Based Test Escape Detection by Introducing Transfer Learning Technique
Ayano Takaya
,
Michihiro Shintani
.
itc-asia 2023
:
1-6
[doi]
On Test Pattern Generation Method for an Approximate Multiplier Considering Acceptable Faults
Shogo Tokai
,
Daichi Akamatsu
,
Hiroyuki Yotsuyanagi
,
Masaki Hashizume
.
itc-asia 2023
:
1-6
[doi]
Trustworthy Lifetime Prediction by Aging History Analysis and Multi-Level Stress Test
Chen-Lin Tsai
,
Shi-Yu Huang
.
itc-asia 2023
:
1-6
[doi]
Fault-Aware ECC Scheme for Enhancing the Read Reliability of STT-MRAMs
Meng-Shan Wu
,
Yen-Lin Chua
,
Jin-Fu Li 0001
,
Yun-Ting Chuan
,
Shih-Hsu Huang
.
itc-asia 2023
:
1-6
[doi]
Technology for The Future of Computing : Keynote 2
Shintaro Yamamichi
.
itc-asia 2023
:
1
[doi]
Toward Improvement and Evaluation of Reconstruction Capability of CapsNet-Based Wafer Map Defect Pattern Classifier
Yuki Yamanaka
,
Masayuki Arai
,
Yoshikazu Nagamura
,
Satoshi Fukumoto
.
itc-asia 2023
:
1-6
[doi]
A Low Overhead and Double-Node-Upset Self-Recoverable Latch
Aibin Yan
,
Fan Xia
,
Tianming Ni
,
Jie Cui 0004
,
Zhengfeng Huang
,
Patrick Girard 0001
,
Xiaoqing Wen
.
itc-asia 2023
:
1-5
[doi]
Design of A Highly Reliable and Low-Power SRAM With Double-Node Upset Recovery for Safety-critical Applications
Aibin Yan
,
Jing Xiang
,
Zhengfeng Huang
,
Tianming Ni
,
Jie Cui 0004
,
Patrick Girard 0001
,
Xiaoqing Wen
.
itc-asia 2023
:
1-6
[doi]
Design of a Novel Latch with Quadruple-Node-Upset Recovery for Harsh Radiation Hardness
Aibin Yan
,
Chao Zhou
,
Shaojie Wei
,
Jie Cui 0004
,
Zhengfeng Huang
,
Patrick Girard 0001
,
Xiaoqing Wen
.
itc-asia 2023
:
1-6
[doi]
Optimizing Post-Silicon Validation for FPGA Serial Configuration using an Automation Framework and Timing Characterization Verification
Mohd Amiruddin Zainol
,
Sompon Khamron
,
Ng Gua Bin
.
itc-asia 2023
:
1-6
[doi]
Structured DFT Development Approach for Chisel-Based High Performance RISC-V Processors
Bin Zhang
,
Ye Cai
,
Zhiheng He
,
Sen Liang
,
Wei He
.
itc-asia 2023
:
1-6
[doi]
Silicon Lifecycle Management: Trends, Challenges and Solutions : Tutorial 2
Yervant Zorian
.
itc-asia 2023
:
1
[doi]
2022
IEEE International Test Conference in Asia, ITC-Asia 2022, Taipei, Taiwan, August 24-26, 2022
IEEE,
2022.
[doi]
A failure analysis framework of ReRAM In-Memory Logic operations
L. Brackmann
,
A. Jafari
,
C. Bengel
,
M. Mayahinia
,
R. Waser
,
D. Wouters
,
S. Menzel
,
M. Tahoori
.
itc-asia 2022
:
67-72
[doi]
A Physically Unclonable Function Embedded in a SAR ADC
Yi-Ying Chen
,
Soon-Jyh Chang
.
itc-asia 2022
:
85-89
[doi]
A Decision Tree-Based Screening Method for Improving Test Quality of Memory Chips
Ya-Chi Cheng
,
Pai-Yu Tan
,
Cheng-Wen Wu
,
Ming-Der Shieh
,
Chien-Hui Chuang
,
Gordon Liao
.
itc-asia 2022
:
19-24
[doi]
A Novel Dual Logic Locking Method to Prevent Counterfeit IP/IC
Aobo Cui
,
Dongrong Zhang
,
Qiang Ren
,
Donglin Su
.
itc-asia 2022
:
79-84
[doi]
Structured Test Development Approach for Computation-in-Memory Architectures
Moritz Fieback
,
Mottaqiallah Taouil
,
Said Hamdioui
.
itc-asia 2022
:
61-66
[doi]
Evaluating the impact of Permanent Faults in a GPU running a Deep Neural Network
Juan-David Guerrero-Balaguera
,
Luigi Galasso
,
Robert Limas Sierra
,
Ernesto Sánchez 0001
,
Matteo Sonza Reorda
.
itc-asia 2022
:
96-101
[doi]
An Improvement of the No-Reference Test Scheme Based on False Edge Detection for Image Processing Application
Hideyuki Ichihara
,
Naruki Itoh
,
Tomoo Inoue
.
itc-asia 2022
:
90-95
[doi]
Diagnosing Transition Delay Faults under Scan-Based Logic Array
Duo-Yao Kang
,
Shiou-Ning Lin
,
Kuen-Jong Lee
.
itc-asia 2022
:
13-18
[doi]
Testing and Reliability of Computing-In Memories: Solutions and Challenges
Jin-Fu Li
.
itc-asia 2022
:
55-60
[doi]
Test Response Compaction for Software-Based Self-Test
Jia-Ruei Liang
,
Ya-Ni Hsieh
,
Jiun-Lang Huang
.
itc-asia 2022
:
49-54
[doi]
Weak Die Screening by Feature Prioritized Random Forest for Improving Semiconductor Quality and Reliability
Shian-Yu Lin
,
Pai-Yu Tan
,
Cheng-Wen Wu
,
Ming-Der Shieh
,
Chien-Hui Chuang
,
Gordon Liao
.
itc-asia 2022
:
25-30
[doi]
Fault Resilience Techniques for Flash Memory of DNN Accelerators
Shyue-Kung Lu
,
Yu-Sheng Wu
,
Jin-Hua Hong
,
Kohei Miyase
.
itc-asia 2022
:
1-6
[doi]
Timing-Critical Path Analysis in Circuit Designs Considering Aging with Signal Probability
Jiun-Cheng Tsai
,
Aaron C.-W. Liang
,
Charles H.-P. Wen
.
itc-asia 2022
:
37-42
[doi]
Effective Switching Probability Calculation to Locate Hotspots in Logic Circuits
Taiki Utsunomiya
,
Ryu Hoshino
,
Kohei Miyase
,
Shyue-Kung Lu
,
Xiaoqing Wen
,
Seiji Kajihara
.
itc-asia 2022
:
43-48
[doi]
Cost-Optimized and Robust Latch Hardened against Quadruple Node Upsets for Nanoscale CMOS
Aibin Yan
,
Shukai Song
,
Jixiang Zhang 0007
,
Jie Cui 0004
,
Zhengfeng Huang
,
Tianming Ni
,
Xiaoqing Wen
,
Patrick Girard 0001
.
itc-asia 2022
:
73-78
[doi]
Fault Modeling and Testing of RRAM-based Computing-In Memories
Yu-Cheng Yang
,
Jin-Fu Li
.
itc-asia 2022
:
7-12
[doi]
Wafer Map Pattern Analytics Driven By Natural Language Queries
Yueling Jenny Zeng
,
Min-Jian Yang
,
Li-C. Wang
.
itc-asia 2022
:
31-36
[doi]
2021
Diagnosis and Yield Learning
Yu Huang 0005
,
Wu-Tung Cheng
,
Ruifeng Guo
,
Sameer Chillarige
.
itc-asia 2021
:
1
[doi]
Automotive Test and Reliability
Yu Huang 0005
,
David Francis
,
Yervant Zorian
,
Nilanjan Mukherjee 0001
.
itc-asia 2021
:
1
[doi]
Developing Formal Models for Measuring Fault Effects Using Functional EDA Tools
Wei Hu 0008
,
Jing Tan
,
Lingjuan Wu
,
Yu Tai
,
Liang Hong
.
itc-asia 2021
:
1-6
[doi]
IEEE International Test Conference in Asia, ITC-Asia 2021, Shanghai, China, August 18-20, 2021
IEEE,
2021.
[doi]
A Low-Cost Quadruple-Node-Upset Self-Recoverable Latch Design
Shuo Cai
,
Caicai Xie
,
Yan Wen
,
Weizheng Wang
.
itc-asia 2021
:
1-5
[doi]
*
Arjun Chaudhuri
,
Krishnendu Chakrabarty
.
itc-asia 2021
:
1-6
[doi]
Automatic Test Program Generation for Transition Delay Faults in Pipelined Processors
Kai-Hsun Chen
,
Bo-Yi Yang
,
Jia-Ruei Liang
,
Hung-Lin Chen
,
Jiun-Lang Huang
.
itc-asia 2021
:
1-6
[doi]
The ANN Based Modeling Attack and Security Enhancement of the Double-layer PUF
Xiaole Cui
,
Yongliang Chen
,
Wenqiang Ye
,
Xiaoxin Cui
.
itc-asia 2021
:
1-6
[doi]
Kelvin Bridge Structure Based TSV Test for Weak Faults
Chang Hao
,
Zhengfeng Huang
,
Tianming Ni
.
itc-asia 2021
:
1-6
[doi]
Fault Modeling and Testing of Spiking Neural Network Chips
Yi-Zhan Hsieh
,
Hsiao-Yin Tseng
,
I-Wei Chiu
,
James Chien-Mo Li
.
itc-asia 2021
:
1-6
[doi]
The Advancement of 1149.10
Yu Huang
,
Haitao Fu
,
Bin Deng
,
Edward Seng
,
Marc Hutner
,
Jean-Francois Cote
,
Geir Eide
.
itc-asia 2021
:
1
[doi]
Rigorous Test Flow for PLL to Identify Weak Devices
Yi-Hsuan Lee
,
Shi-Yu Huang
.
itc-asia 2021
:
1-6
[doi]
Integrated Scratch Marker for Wafer Defect Diagnosis
Katherine Shu-Min Li
,
Leon Li-Yang Chen
,
Peter Yi-Yu Liao
,
Sying-Jyan Wang
,
Andrew Yi-Ann Huang
,
Ken Chau-Cheung Cheng
.
itc-asia 2021
:
1-4
[doi]
A N: 1 Single-Channel TDMA Fault-Tolerant Technique for TSVs in 3D-ICs
Huaguo Liang
,
Danqing Li
,
Zhao Yang
,
Tianming Ni
,
Zhengfeng Huang
,
Cuiyun Jiang
.
itc-asia 2021
:
1-5
[doi]
Scalable Parallel Static Learning
Xiaoze Lin
,
Liyang Lai
,
Huawei Li
.
itc-asia 2021
:
1-6
[doi]
Use Machine Learning Based Smart Sampling to Improve System Level Testing Efficiency
Chenwei Liu
,
Jie Ou
.
itc-asia 2021
:
1-6
[doi]
High-speed measurement of Piezoelectric MEMS equivalent circuit parameters by Swept-sine and PRBS signals
Mitsuo Matsumoto
,
Masayuki Kawabata
,
Yukio Kawanabe
.
itc-asia 2021
:
1-6
[doi]
AMSER-FF: Area-Minimized Soft-Error-Recoverable Flip-Flop for Radiation Hardening
John Z.-L. Tang
,
Dave Y.-W. Lin
,
Ralf E.-H. Yee
,
Charles H.-P. Wen
.
itc-asia 2021
:
1-6
[doi]
A Duty-Cycle Monitor Supporting A Wide Frequency Range of Clock Signal
Chen-Lin Tsai
,
Wei-Hao Chen
,
Shi-Yu Huang
.
itc-asia 2021
:
1-6
[doi]
TAIWAN Online: Test AI with AN Codes Online for Automotive Chips
Cheng-Di Tsai
,
Hsiao-Wen Fu
,
Ting-Yu Chen
,
Tsung-Chu Huang
.
itc-asia 2021
:
1-6
[doi]
Reliability Evaluation of Approximate Arithmetic Circuits Based on Signal Probability
Zhen Wang
,
Guofa Zhang
,
Jing Ye
,
Jianhui Jiang
.
itc-asia 2021
:
1-6
[doi]
Identification of Counter Registers through Full Scan Chain
Qidong Wang
,
Aijiao Cui
,
Gang Qu 0001
.
itc-asia 2021
:
1-5
[doi]
An SRAM Test Quality Improvement Method For Automotive chips
Tuanhui Xu
,
Junlin Huang
,
Mingen Bu
,
Zhe Jiang
.
itc-asia 2021
:
1-4
[doi]
Parallel DICE Cells and Dual-Level CEs based 3-Node-Upset Tolerant Latch Design for Highly Robust Computing
Aibin Yan
,
Zijie Zhai
,
Lele Wang
,
JiXiang Zhang
,
Ningning Cui
,
Tianming Ni
,
Xiaoqing Wen
.
itc-asia 2021
:
1-5
[doi]
An optimized DFT technology based on machine learning
Han Yang
,
Zeyu Zhao
,
Zhikuang Cai
.
itc-asia 2021
:
1-4
[doi]
2020
IEEE International Test Conference in Asia, ITC-Asia 2020, Taipei, Taiwan, September 23-25, 2020
IEEE,
2020.
[doi]
A Deep Learning-Based Screening Method for Improving the Quality and Reliability of Integrated Passive Devices
Chien-Hui Chuang
,
Kuan-Wei Hou
,
Cheng-Wen Wu
,
Mincent Lee
,
Chia-Heng Tsai
,
Hao Chen
,
Min-Jer Wang
.
itc-asia 2020
:
13-18
[doi]
Design of a Highly Reliable SRAM Cell with Advanced Self-Recoverability from Soft Errors
Zhengda Dou
,
Albin Yan
,
Jun Zhou 0016
,
Yuanjie Hu
,
Yan Chen
,
Tianming Ni
,
Jie Cui 0004
,
Patrick Girard 0001
,
Xiaoqing Wen
.
itc-asia 2020
:
35-40
[doi]
Test Challenges of Providing Low Phase Noise Reference Clock Signal with ATE Platform
Kevin Fan
.
itc-asia 2020
:
19-24
[doi]
Adaptive Test Pattern Reordering for Diagnosis using k-Nearest Neighbors
Chenlei Fang
,
Qicheng Huang
,
R. D. Shawn Blanton
.
itc-asia 2020
:
59-64
[doi]
On Enhancing Error-Tolerability of Videos via Re-Encoding with Adaptive I-Frame Insertion
Tong-Yu Hsieh
,
Chen-Chia Chung
,
Jun-Tsung Wu
.
itc-asia 2020
:
136-141
[doi]
Refresh Power Reduction of DRAMs in DNN Systems Using Hybrid Voting and ECC Method
Tsung-Fu Hsieh
,
Jin-Fu Li
,
Jenn-Shiang Lai
,
Chih-Yen Lo
,
Ding-Ming Kwai
,
Yung-Fa Chou
.
itc-asia 2020
:
41-46
[doi]
A Self-Detection and Self-Repair Methodology for Reliable Speech Recognition Considering AWGN Noises
Tong-Yu Hsieh
,
Yu-Min Chung
.
itc-asia 2020
:
142-147
[doi]
Test Methodology for Defect-based Bridge Faults
Yu-Pang Hu
,
Shuo-Wen Chang
,
Kai-Chiang Wu
,
Chi-Chun Wang
,
Fu-Sheng Huang
,
Yi-Lun Tang
,
Yung-Chen Chen
,
Ming-Chien Chen
,
Mango C.-T. Chao
.
itc-asia 2020
:
106-111
[doi]
Diagnosis Outcome Prediction on Limited Data via Transferred Random Forest
Qicheng Huang
,
Chenlei Fang
,
R. D. Shawn Blanton
.
itc-asia 2020
:
65-70
[doi]
A Novel Tampering Attack on AES Cores with Hardware Trojans
Ayush Jain
,
Ujjwal Guin
.
itc-asia 2020
:
77-82
[doi]
GPU-based Hybrid Parallel Logic Simulation for Scan Patterns
Liyang Lai
,
Qiting Zhang
,
Kun-Han Hans Tsai
,
Wu-Tung Cheng
.
itc-asia 2020
:
118-123
[doi]
Development and Validation of a Novel Reliable Method for Wet Testing on Biochemical Chip
Po-Ting Lai
,
Yu-Hao Chiu
,
Chieh-Wen Lu
,
Kuang-Hsiang Liu
,
Tung-Liang Chiu
,
Wendy Chen
.
itc-asia 2020
:
25-30
[doi]
On Optical Attacks Making Logic Obfuscation Fragile
Leonidas Lavdas
,
M. Tanjidur Rahman
,
Mark Mohammad Tehranipoor
,
Navid Asadizanjani
.
itc-asia 2020
:
71-76
[doi]
High Efficiency and Low Overkill Testing for Probabilistic Circuits
Ming-Ting Lee
,
Chen-Hung Wu
,
Shi-Tang Liu
,
Cheng-Yun Hsieh
,
James Chien-Mo Li
.
itc-asia 2020
:
83-87
[doi]
W-ERA: One-Time Memory Repair with Wafer-Level Early Repair Analysis for Cost Reduction
Hayoung Lee
,
Donghyun Han
,
Hogyeong Kim
,
Sungho Kang
.
itc-asia 2020
:
94-99
[doi]
Site-aware Anomaly Detection with Machine Learning for Circuit Probing to Prevent Overkill
Mincent Lee
,
Cheng-Tse Lu
,
Chia-Heng Tsai
,
Hao Chen
,
Min-Jer Wang
.
itc-asia 2020
:
1-6
[doi]
Modified BER Test for SAR ADCs
Chia-Chuan Li
,
Soon-Jyh Chang
.
itc-asia 2020
:
100-105
[doi]
Watermarking for Paper-Based Digital Microfluidic Biochips
Jian-De Li
,
Sying-Jyan Wang
,
Katherine Shu-Min Li
,
Tsung-Yi Ho
.
itc-asia 2020
:
148-153
[doi]
Automatic IR-Drop ECO Using Machine Learning
Heng-Yi Lin
,
Yen-Chun Fang
,
Shi-Tang Liu
,
Jia-Xian Chen
,
Chien-Mo James Li
,
Eric Jia-Wei Fang
.
itc-asia 2020
:
7-12
[doi]
ECC Caching Techniques for Protecting NAND Flash Memories
Shyue-Kung Lu
,
Zeng-Long Tsai
,
Chun-Lung Hsu
,
Chi-Tien Sun
.
itc-asia 2020
:
47-52
[doi]
Path Delay Measurement with Correction for Temperature And Voltage Variations
Yousuke Miyake
,
Takaaki Kato
,
Seiji Kajihara
.
itc-asia 2020
:
112-117
[doi]
Estimation of Test Data Volume for Scan Architectures with Different Numbers of Input Channels
Fong-Jyun Tsai
,
Chong-Siao Ye
,
Yu Huang 0005
,
Kuen-Jong Lee
,
Wu-Tung Cheng
,
Sudhakar M. Reddy
,
Mark Kassab
,
Janusz Rajski
,
Shi-Xuan Zheng
.
itc-asia 2020
:
130-135
[doi]
Novel Circuit Probing for Tiny Inductor
Chia-Heng Tsai
,
Chi-Chang Lai
,
Hao Chen
,
Min-Jer Wang
.
itc-asia 2020
:
31-34
[doi]
The Decision Mechanism Uses the Multiple-Tests Scheme to Improve Test Yield in IC Testing
Chung-Huang Yeh
,
Jwu E. Chen
.
itc-asia 2020
:
88-93
[doi]
DSSP-ATPG: A Deterministic Search-Space Parallel Test Pattern Generator
Kuen-Wei Yeh
,
Jiun-Lang Huang
.
itc-asia 2020
:
124-129
[doi]
Diagnosis technique for Clustered Multiple Transition Delay Faults
Yan-Shen You
,
Chih-Yan Liu
,
Mu-Ting Wu
,
Po-Wei Chen
,
James Chien-Mo Li
.
itc-asia 2020
:
53-58
[doi]
2019
IEEE International Test Conference in Asia, ITC-Asia 2019, Tokyo, Japan, September 3-5, 2019
IEEE,
2019.
[doi]
On-Chip Test Clock Validation Using A Time-to-Digital Converter in FPGAs
Yousuke Miyake
,
Seiji Kajihara
,
Poki Chen
.
itc-asia 2019
:
157-162
[doi]
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