Dennis Sylvester - researchr alias

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2011

A dense 45nm half-differential SRAM with lower minimum operating voltageGregory K. Chen, Michael Wieckowski, Daeyeon Kim, David Blaauw, Dennis Sylvester. iscas 2011: 57-60 [doi]

Energy-optimized high performance FFT processorDongsuk Jeon, Mingoo Seok, Chaitali Chakrabarti, David Blaauw, Dennis Sylvester. icassp 2011: 1701-1704 [doi]

A 1.85fW/bit ultra low leakage 10T SRAM with speed compensation schemeDaeyeon Kim, Gregory K. Chen, Matthew Fojtik, Mingoo Seok, David Blaauw, Dennis Sylvester. iscas 2011: 69-72 [doi]

Variation-aware static and dynamic writability analysis for voltage-scaled bit-interleaved 8-T SRAMsDaeyeon Kim, Vikas Chandra, Robert C. Aitken, David Blaauw, Dennis Sylvester. islped 2010: 145-150 [doi]

A Robust Edge Encoding Technique for Energy-Efficient Multi-Cycle InterconnectJae-sun Seo, Himanshu Kaul, Ram Krishnamurthy, Dennis Sylvester, David Blaauw. tvlsi, 19(2):264-273, 2011. [doi]

Fast Statistical Static Timing Analysis Using Smart Monte Carlo TechniquesVineeth Veetil, Kaviraj Chopra, David Blaauw, Dennis Sylvester. tcad, 30(6):852-865, 2011. [doi]

A 128kb high density portless SRAM using hierarchical bitlines and thyristor sense amplifiersMichael Wieckowski, Gregory K. Chen, Daeyeon Kim, David Blaauw, Dennis Sylvester. isqed 2011: 87-90 [doi]

2010

Yield-Driven Near-Threshold SRAM DesignGregory K. Chen, Dennis Sylvester, David Blaauw, Trevor N. Mudge. tvlsi, 18(11):1590-1598, 2010. [doi]

Victim Alignment in Crosstalk-Aware Timing AnalysisRavikishore Gandikota, Kaviraj Chopra, David Blaauw, Dennis Sylvester. tcad, 29(2):261-274, 2010. [doi]

Simultaneous extraction of effective gate length and low-field mobility in non-uniform devicesVivek Joshi, Kanak Agarwal, Dennis Sylvester. isqed 2010: 158-162 [doi]

Analyzing electrical effects of RTA-driven local anneal temperature variationVivek Joshi, Kanak Agarwal, Dennis Sylvester, David Blaauw. aspdac 2010: 739-744 [doi]

Mechanical Stress Aware Optimization for Leakage Power ReductionVivek Joshi, Brian Cline, Dennis Sylvester, David Blaauw, Kanak Agarwal. tcad, 29(5):722-736, 2010. [doi]

Closed-form modeling of layout-dependent mechanical stressVivek Joshi, Valeriy Sukharev, Andres Torres, Kanak Agarwal, Dennis Sylvester, David Blaauw. dac 2010: 673-678 [doi]

Analysis and optimization of SRAM robustness for double patterning lithographyVivek Joshi, Kanak Agarwal, David Blaauw, Dennis Sylvester. iccad 2010: 25-31 [doi]

Circuit design advances to enable ubiquitous sensing environmentsMingoo Seok, Scott Hanson, Michael Wieckowski, Gregory K. Chen, Yu-Shiang Lin, David Blaauw, Dennis Sylvester. iscas 2010: 285-288 [doi]

Clock network design for ultra-low power applicationsMingoo Seok, David Blaauw, Dennis Sylvester. islped 2010: 271-276 [doi]

Dynamically Pulsed MTCMOS With Bus Encoding for Reduction of Total Power and Crosstalk NoiseHarmander Singh, Rahul M. Rao, Kanak Agarwal, Dennis Sylvester, Richard B. Brown. tvlsi, 18(1):166-170, 2010. [doi]

A lower bound computation method for evaluation of statistical design techniquesVineeth Veetil, Dennis Sylvester, David Blaauw. iccad 2010: 562-569 [doi]

Efficient smart monte carlo based SSTA on graphics processing units with improved resource utilizationVineeth Veetil, Yung-Hsu Chang, Dennis Sylvester, David Blaauw. dac 2010: 793-798 [doi]

A black box method for stability analysis of arbitrary SRAM cell structuresMichael Wieckowski, Dennis Sylvester, David Blaauw, Vikas Chandra, Sachin Idgunji, Cezary Pietrzyk, Robert C. Aitken. date 2010: 795-800 [doi]

Process variation and temperature-aware reliability managementCheng Zhuo, Dennis Sylvester, David Blaauw. date 2010: 580-585 [doi]

Active learning framework for post-silicon variation extraction and test cost reductionCheng Zhuo, Kanak Agarwal, David Blaauw, Dennis Sylvester. iccad 2010: 508-515 [doi]

Design time body bias selection for parametric yield improvementCheng Zhuo, Yung-Hsu Chang, Dennis Sylvester, David Blaauw. aspdac 2010: 681-688 [doi]

2009

Reconfigurable Multicore Server Processors for Low Power OperationRonald G. Dreslinski, David Fick, David Blaauw, Dennis Sylvester, Trevor N. Mudge. samos 2009: 247-254 [doi]

Vicis: a reliable network for unreliable siliconDavid Fick, Andrew DeOrio, Jin Hu, Valeria Bertacco, David Blaauw, Dennis Sylvester. dac 2009: 812-817 [doi]

A highly resilient routing algorithm for fault-tolerant NoCsDavid Fick, Andrew DeOrio, Gregory K. Chen, Valeria Bertacco, Dennis Sylvester, David Blaauw. date 2009: 21-26 [doi]

Simple and Accurate Models for Capacitance Considering Floating Metal Fill InsertionYoungmin Kim, Dusan Petranovic, Dennis Sylvester. tvlsi, 17(8):1166-1170, 2009. [doi]

Low power circuit design based on heterojunction tunneling transistors (HETTs)Daeyeon Kim, Yoonmyung Lee, Jin Cai, Isaac Lauer, Leland Chang, Steven J. Koester, Dennis Sylvester, David Blaauw. islped 2009: 219-224 [doi]

Circuit optimization techniques to mitigate the effects of soft errors in combinational logicRajeev R. Rao, Vivek Joshi, David Blaauw, Dennis Sylvester. todaes, 15(1), 2009. [doi]

Sensor-Driven Reliability and Wearout ManagementPrashant Singh, Cheng Zhuo, Eric Karl, David Blaauw, Dennis Sylvester. dt, 26(6):40-49, 2009. [doi]

Efficient smart sampling based full-chip leakage analysis for intra-die variation considering state dependenceVineeth Veetil, Dennis Sylvester, David Blaauw, Saumil Shah, Steffen Rochel. dac 2009: 154-159 [doi]

Energy-Efficient Subthreshold Processor DesignBo Zhai, Sanjay Pant, Leyla Nazhandali, Scott Hanson, Javin Olson, Anna Reeves, Michael Minuth, Ryan Helfand, Todd M. Austin, Dennis Sylvester, David Blaauw. tvlsi, 17(8):1127-1137, 2009. [doi]

Post-fabrication measurement-driven oxide breakdown reliability prediction and managementCheng Zhuo, David Blaauw, Dennis Sylvester. iccad 2009: 441-448 [doi]

2008

A statistical approach for full-chip gate-oxide reliability analysisKaviraj Chopra, Cheng Zhuo, David Blaauw, Dennis Sylvester. iccad 2008: 698-705 [doi]

STEEL: a technique for stress-enhanced standard cell library designBrian Cline, Vivek Joshi, Dennis Sylvester, David Blaauw. iccad 2008: 691-697 [doi]

Reconfigurable energy efficient near threshold cache architecturesRonald G. Dreslinski, Gregory K. Chen, Trevor N. Mudge, David Blaauw, Dennis Sylvester, Krisztián Flautner. euromicro 2008: 459-470 [doi]

Modeling crosstalk in statistical static timing analysisRavikishore Gandikota, David Blaauw, Dennis Sylvester. dac 2008: 974-979 [doi]

Investigation of diffusion rounding for post-lithography analysisPuneet Gupta, Andrew B. Kahng, Youngmin Kim, Saumil Shah, Dennis Sylvester. aspdac 2008: 480-485 [doi]

Clock tree synthesis with data-path sensitivity matchingMatthew R. Guthaus, Dennis Sylvester, Richard B. Brown. aspdac 2008: 498-503 [doi]

Leakage power reduction using stress-enhanced layoutsVivek Joshi, Brian Cline, Dennis Sylvester, David Blaauw, Kanak Agarwal. dac 2008: 912-917 [doi]

Stress aware layout optimizationVivek Joshi, Brian Cline, Dennis Sylvester, David Blaauw, Kanak Agarwal. ispd 2008: 168-174 [doi]

Multi-Mechanism Reliability Modeling and Management in Dynamic SystemsEric Karl, David Blaauw, Dennis Sylvester, Trevor N. Mudge. tvlsi, 16(4):476-487, 2008. [doi]

Analysis of System-Level Reliability Factors and Implications on Real-Time Monitoring Methods for Oxide Breakdown Device FailuresEric Karl, Dennis Sylvester, David Blaauw. isqed 2008: 391-395 [doi]

A robust alternate repeater technique for high performance busses in the multi-core eraHimanshu Kaul, Jae-sun Seo, Mark Anders, Dennis Sylvester, Ram Krishnamurthy. iscas 2008: 372-375 [doi]

Low-voltage circuit design for widespread sensing applicationsYu-Shiang Lin, Scott Hanson, Fabio Albano, Carlos Tokunaga, Razi-Ul Haque, Kensall Wise, Ann Marie Sastry, David Blaauw, Dennis Sylvester. iscas 2008: 2558-2561 [doi]

On the decreasing significance of large standard cells in technology mappingJae-sun Seo, Igor L. Markov, Dennis Sylvester, David Blaauw. iccad 2008: 116-121 [doi]

Optimal technology selection for minimizing energy and variability in low voltage applicationsMingoo Seok, Dennis Sylvester, David Blaauw. islped 2008: 9-14 [doi]

Self-Timed Regenerators for High-Speed and Low-Power On-Chip Global InterconnectPrashant Singh, Jae-sun Seo, David Blaauw, Dennis Sylvester. tvlsi, 16(6):673-677, 2008. [doi]

A Novel Approach to Perform Gate-Level Yield Analysis and Optimization Considering Correlated Variations in Power and PerformanceAshish Srivastava, Kaviraj Chopra, Saumil Shah, Dennis Sylvester, David Blaauw. tcad, 27(2):272-285, 2008. [doi]

Variability in nanometer CMOS: Impact, analysis, and minimizationDennis Sylvester, Kanak Agarwal, Saumil Shah. integration, 41(3):319-339, 2008. [doi]

Efficient Monte Carlo based incremental statistical timing analysisVineeth Veetil, Dennis Sylvester, David Blaauw. dac 2008: 676-681 [doi]

Fast and Accurate Waveform Analysis with Current Source ModelsVineeth Veetil, Dennis Sylvester, David Blaauw. isqed 2008: 53-56 [doi]

Variation-aware gate sizing and clustering for post-silicon optimized circuitsCheng Zhuo, David Blaauw, Dennis Sylvester. islped 2008: 105-110 [doi]

2007

Parametric Yield Analysis and Optimization in Leakage Dominated TechnologiesKanak Agarwal, Rahul M. Rao, Dennis Sylvester, Richard B. Brown. tvlsi, 15(6):613-623, 2007. [doi]

Yield-driven near-threshold SRAM designGregory K. Chen, David Blaauw, Trevor N. Mudge, Dennis Sylvester, Nam Sung Kim. iccad 2007: 660-666 [doi]

An Energy Efficient Parallel Architecture Using Near Threshold OperationRonald G. Dreslinski, Bo Zhai, Trevor N. Mudge, David Blaauw, Dennis Sylvester. IEEEpact 2007: 175-188 [doi]

Top-k Aggressors Sets in Delay Noise AnalysisRavikishore Gandikota, Kaviraj Chopra, David Blaauw, Dennis Sylvester, Murat R. Becer. dac 2007: 174-179 [doi]

Victim alignment in crosstalk aware timing analysisRavikishore Gandikota, Kaviraj Chopra, David Blaauw, Dennis Sylvester, Murat R. Becer, Joao Geada. iccad 2007: 698-704 [doi]

Line-End Shortening is Not Always a FailurePuneet Gupta, Andrew B. Kahng, Youngmin Kim, Saumil Shah, Dennis Sylvester. dac 2007: 270-271 [doi]

Self-Compensating Design for Reduction of Timing and Leakage Sensitivity to Systematic Pattern-Dependent VariationPuneet Gupta, Andrew B. Kahng, Youngmin Kim, Dennis Sylvester. tcad, 26(9):1614-1624, 2007. [doi]

Nanometer Device Scaling in Subthreshold CircuitsScott Hanson, Mingoo Seok, Dennis Sylvester, David Blaauw. dac 2007: 700-705 [doi]

Soft-edge flip-flops for improved timing yield: design and optimizationVivek Joshi, David Blaauw, Dennis Sylvester. iccad 2007: 667-673 [doi]

Simple and Accurate Models for Capacitance Increment due to Metal Fill InsertionYoungmin Kim, Dusan Petranovic, Dennis Sylvester. aspdac 2007: 456-461 [doi]

Runtime leakage power estimation technique for combinational circuitsYu-Shiang Lin, Dennis Sylvester. aspdac 2007: 660-665 [doi]

Computing the Soft Error Rate of a Combinational Logic Circuit Using Parameterized DescriptorsRajeev R. Rao, Kaviraj Chopra, David T. Blaauw, Dennis Sylvester. tcad, 26(3):468-479, 2007. [doi]

A robust edge encoding technique for energy-efficient multi-cycle interconnectJae-sun Seo, Dennis Sylvester, David Blaauw, Himanshu Kaul, Ram Krishnamurthy. islped 2007: 68-73 [doi]

Self-Time Regenerators for High-Speed and Low-Power InterconnectJae-sun Seo, Prashant Singh, Dennis Sylvester, David Blaauw. isqed 2007: 621-626 [doi]

Analysis and Optimization of Sleep Modes in Subthreshold Circuit DesignMingoo Seok, Scott Hanson, Dennis Sylvester, David Blaauw. dac 2007: 694-699 [doi]

Enhanced Leakage Reduction Techniques Using Intermediate Strength Power GatingH. Singh, Kanak Agarwal, Dennis Sylvester, Kevin J. Nowka. tvlsi, 15(11):1215-1224, 2007. [doi]

Low-Power-Design Space Exploration Considering Process Variation Using Robust OptimizationAshish Srivastava, T. Kachru, Dennis Sylvester. tcad, 26(1):67-79, 2007. [doi]

Energy efficient near-threshold chip multi-processingBo Zhai, Ronald G. Dreslinski, David Blaauw, Trevor N. Mudge, Dennis Sylvester. islped 2007: 32-37 [doi]

2006

Power Gating with Multiple Sleep ModesKanak Agarwal, Kevin J. Nowka, Harmander Deogun, Dennis Sylvester. isqed 2006: 633-637 [doi]

Statistical interconnect metrics for physical-design optimizationKanak Agarwal, Mridul Agarwal, Dennis Sylvester, David Blaauw. tcad, 25(7):1273-1288, 2006. [doi]

Modeling and analysis of crosstalk noise in coupled RLC interconnectsKanak Agarwal, Dennis Sylvester, David Blaauw. tcad, 25(5):892-901, 2006. [doi]

A new statistical max operation for propagating skewness in statistical timing analysisKaviraj Chopra, Bo Zhai, David Blaauw, Dennis Sylvester. iccad 2006: 237-243 [doi]

A dual-V::DD:: boosted pulsed bus technique for low power and low leakage operationHarmander Deogun, Robert M. Senger, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka. islped 2006: 73-78 [doi]

Fine grained multi-threshold CMOS for enhanced leakage reductionHarmander Deogun, Dennis Sylvester, Kevin J. Nowka. iscas 2006: [doi]

Gate-length biasing for runtime-leakage controlPuneet Gupta, Andrew B. Kahng, Puneet Sharma, Dennis Sylvester. tcad, 25(8):1475-1485, 2006. [doi]

Process-induced skew reduction in nominal zero-skew clock treesMatthew R. Guthaus, Dennis Sylvester, Richard B. Brown. aspdac 2006: 84-89 [doi]

Clock buffer and wire sizing using sequential programmingMatthew R. Guthaus, Dennis Sylvester, Richard B. Brown. dac 2006: 1041-1046 [doi]

Ultralow-voltage, minimum-energy CMOSScott Hanson, Bo Zhai, Kerry Bernstein, David Blaauw, Andres Bryant, Leland Chang, Koushik K. Das, Wilfried Haensch, Edward J. Nowak, Dennis Sylvester. ibmrd, 50(4-5):469-490, 2006. [doi]

A new technique for jointly optimizing gate sizing and supply voltage in ultra-low energy circuitsScott Hanson, Dennis Sylvester, David Blaauw. islped 2006: 338-341 [doi]

Energy optimality and variability in subthreshold designScott Hanson, Bo Zhai, David Blaauw, Dennis Sylvester, Andres Bryant, Xinlin Wang. islped 2006: 363-365 [doi]

Logic SER Reduction through Flipflop RedesignVivek Joshi, Rajeev R. Rao, David Blaauw, Dennis Sylvester. isqed 2006: 611-616 [doi]

Reliability modeling and management in dynamic microprocessor-based systemsEric Karl, David Blaauw, Dennis Sylvester, Trevor N. Mudge. dac 2006: 1057-1060 [doi]

Power Distribution Techniques for Dual VDD CircuitsSarvesh H. Kulkarni, Dennis Sylvester. jolpe, 2(2):217-229, 2006. [doi]

Power distribution techniques for dual VDD circuitsSarvesh H. Kulkarni, Dennis Sylvester. aspdac 2006: 838-843 [doi]

A statistical framework for post-silicon tuning through body bias clusteringSarvesh H. Kulkarni, Dennis Sylvester, David Blaauw. iccad 2006: 39-46 [doi]

Runtime Leakage Minimization Through Probability-Aware OptimizationDongwoo Lee, David Blaauw, Dennis Sylvester. tvlsi, 14(10):1075-1088, 2006. [doi]

Variation-aware analysis: savior of the nanometer era?Sani R. Nassif, Vijay Pitchumani, N. Rodriguez, Dennis Sylvester, Clive Bittlestone, Riko Radojcic. dac 2006: 411-412 [doi]

An efficient static algorithm for computing the soft error rates of combinational circuitsRajeev R. Rao, Kaviraj Chopra, David Blaauw, Dennis Sylvester. date 2006: 164-169 [doi]

Analytical yield prediction considering leakage/performance correlationRajeev R. Rao, Anirudh Devgan, David Blaauw, Dennis Sylvester. tcad, 25(9):1685-1695, 2006. [doi]

Soft error reduction in combinational logic using gate resizing and flipflop selectionRajeev R. Rao, David Blaauw, Dennis Sylvester. iccad 2006: 502-509 [doi]

ElastIC: An Adaptive Self-Healing Architecture for Unpredictable SiliconDennis Sylvester, David Blaauw, Eric Karl. dt, 23(6):484-490, 2006. [doi]

2005

Achieving continuous V::T:: performance in a dual V::T:: processKanak Agarwal, Dennis Sylvester, David Blaauw, Anirudh Devgan. aspdac 2005: 393-398 [doi]

Dynamically Pulsed MTCMOS with Bus Encoding for Total Power and Crosstalk MinimizationHarmander Deogun, Rahul M. Rao, Dennis Sylvester, Richard B. Brown, Kevin J. Nowka. isqed 2005: 88-93 [doi]

A novel buffer circuit for energy efficient signaling in dual-VDD systemsHimanshu Kaul, Dennis Sylvester. glvlsi 2005: 462-467 [doi]

Static leakage reduction through simultaneous V/sub t//T/sub ox/ and state assignmentDongwoo Lee, David Blaauw, Dennis Sylvester. tcad, 24(7):1014-1029, 2005. [doi]

Accurate and efficient gate-level parametric yield estimation considering correlated variations in leakage power and performanceAshish Srivastava, Saumil Shah, Kanak Agarwal, Dennis Sylvester, David Blaauw, Stephen W. Director. dac 2005: 535-540 [doi]

The limit of dynamic voltage scaling and insomniac dynamic voltage scalingBo Zhai, David T. Blaauw, Dennis Sylvester, Krisztián Flautner. tvlsi, 13(11):1239-1252, 2005. [doi]

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