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Viewing Publication 1 - 71 from 71

2023

AutoDMP: Automated DREAMPlace-based Macro PlacementAnthony Agnesina, Puranjay Rajvanshi, Tian Yang, Geraldo Pradipta, Austin Jiao, Ben Keller, Brucek Khailany, Haoxing Ren. ispd 2023: 149-157 [doi]

Efficient Transformer Inference with Statically Structured Sparse AttentionSteve Dai, Hasan Genc, Rangharajan Venkatesan, Brucek Khailany. dac 2023: 1-6 [doi]

NVCell 2: Routability-Driven Standard Cell Layout in Advanced Nodes with Lattice Graph Routability ModelChia-Tung Ho, Alvin Ho, Matthew Fojtik, Minsoo Kim, Shang Wei, Yaguang Li, Brucek Khailany, Haoxing Ren. ispd 2023: 44-52 [doi]

A 95.6-TOPS/W Deep Learning Inference Accelerator With Per-Vector Scaled 4-bit Quantization in 5 nmBen Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, Charbel Sakr, William J. Dally, C. Thomas Gray, Brucek Khailany. jssc, 58(4):1129-1141, 2023. [doi]

Late Breaking Results: Test Selection For RTL Coverage By Unsupervised Learning From Fast Functional SimulationRongjian Liang, Nathaniel Ross Pinckney, Yuji Chai, Haoxin Ren, Brucek Khailany. dac 2023: 1-2 [doi]

GenFuzz: GPU-accelerated Hardware Fuzzing using Genetic Algorithm with Multiple InputsDian-Lun Lin, Yanqing Zhang 0002, Haoxing Ren, Brucek Khailany, Shih-Hsin Wang, Tsung-Wei Huang. dac 2023: 1-6 [doi]

An Adversarial Active Sampling-Based Data Augmentation Framework for AI-Assisted Lithography ModelingMingjie Liu, Haoyu Yang, Brucek Khailany, Haoxing Ren. iccad 2023: 1-9 [doi]

Invited Paper: VerilogEval: Evaluating Large Language Models for Verilog Code GenerationMingjie Liu, Nathaniel Ross Pinckney, Brucek Khailany, Haoxing Ren. iccad 2023: 1-8 [doi]

Machine Learning and Algorithms: Let Us Team Up for EDAHaoxing Ren, Brucek Khailany, Matthew Fojtik, Yanqing Zhang. dt, 40(1):70-76, February 2023. [doi]

2022

AutoCRAFT: Layout Automation for Custom Circuits in Advanced FinFET TechnologiesHao Chen, Walker J. Turner, Sanquan Song, Keren Zhu 0001, George F. Kokai, Brian Zimmer, C. Thomas Gray, Brucek Khailany, David Z. Pan, Haoxing Ren. ispd 2022: 175-183 [doi]

XT-PRAGGMA: Crosstalk Pessimism Reduction Achieved with GPU Gate-level Simulations and Machine LearningVidya A. Chhabria, Ben Keller, Yanqing Zhang, Sandeep Vollala, Sreedhar Pratty, Haoxing Ren, Brucek Khailany. mlcad 2022: 63-69 [doi]

A 17-95.6 TOPS/W Deep Learning Inference Accelerator with Per-Vector Scaled 4-bit Quantization for Transformers in 5nmBen Keller, Rangharajan Venkatesan, Steve Dai, Stephen G. Tell, Brian Zimmer, William J. Dally, C. Thomas Gray, Brucek Khailany. vlsit 2022: 16-17 [doi]

From RTL to CUDA: A GPU Acceleration Flow for RTL Simulation with Batch StimulusDian-Lun Lin, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Tsung-Wei Huang. icpp 2022: [doi]

TransSizer: A Novel Transformer-Based Fast Gate SizerSiddhartha Nath, Geraldo Pradipta, Corey Hu, Tian Yang, Brucek Khailany, Haoxing Ren. iccad 2022: 74 [doi]

Generative self-supervised learning for gate sizing: invitedSiddhartha Nath, Geraldo Pradipta, Corey Hu, Tian Yang, Brucek Khailany, Haoxing Ren. dac 2022: 1331-1334 [doi]

Optimal Clipping and Magnitude-aware Differentiation for Improved Quantization-aware TrainingCharbel Sakr, Steve Dai, Rangharajan Venkatesan, Brian Zimmer, William J. Dally, Brucek Khailany. icml 2022: 19123-19138 [doi]

Generic lithography modeling with dual-band optics-inspired neural networksHaoyu Yang, Zongyi Li, Kumara Sastry, Saumyadip Mukhopadhyay, Mark Kilgard, Anima Anandkumar, Brucek Khailany, Vivek Singh, Haoxing Ren. dac 2022: 973-978 [doi]

GATSPI: GPU accelerated gate-level simulation for power improvementYanqing Zhang, Haoxing Ren, Akshay Sridharan, Brucek Khailany. dac 2022: 1231-1236 [doi]

LNS-Madam: Low-Precision Training in Logarithmic Number System Using Multiplicative Weight UpdateJiawei Zhao, Steve Dai, Rangharajan Venkatesan, Brian Zimmer, Mustafa Fayez Ali, Ming-Yu Liu 0001, Brucek Khailany, William J. Dally, Anima Anandkumar. TC, 71(12):3179-3190, 2022. [doi]

2021

MAVIREC: ML-Aided Vectored IR-Drop Estimation and ClassificationVidya A. Chhabria, Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany, Sachin S. Sapatnekar. date 2021: 1825-1828 [doi]

3.2 The A100 Datacenter GPU and Ampere ArchitectureJack Choquette, M.-J. Edward Lee, Ronny Krashinsky, Vishnu Balan, Brucek Khailany. isscc 2021: 48-50 [doi]

VS-Quant: Per-vector Scaled Quantization for Accurate Low-Precision Neural Network InferenceSteve Dai, Rangharajan Venkatesan, Mark Ren, Brian Zimmer, William J. Dally, Brucek Khailany. mlsys 2021: [doi]

DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI PlacementYibo Lin, Zixuan Jiang, Jiaqi Gu, Wuxi Li, Shounak Dhar, Haoxing Ren, Brucek Khailany, David Z. Pan. tcad, 40(4):748-761, 2021. [doi]

Parasitic-Aware Analog Circuit Sizing with Graph Neural Networks and Bayesian OptimizationMingjie Liu, Walker J. Turner, George F. Kokai, Brucek Khailany, David Z. Pan, Haoxing Ren. date 2021: 1372-1377 [doi]

2021 ICCAD CAD Contest Problem C: GPU Accelerated Logic RewritingGhasem Pasandi, Sreedhar Pratty, David Brown, Yanqing Zhang, Haoxing Ren, Brucek Khailany. iccad 2021: 1-6 [doi]

IPA: Floorplan-Aware SystemC Interconnect Performance Modeling and Generation for HLS-based SoCsNathaniel Ross Pinckney, Rangharajan Venkatesan, Ben Keller, Brucek Khailany. iccad 2021: 1-9 [doi]

Optimizing VLSI Implementation with Reinforcement Learning - ICCAD Special Session PaperHaoxing Ren, Saad Godil, Brucek Khailany, Robert Kirby, Haiguang Liao, Siddhartha Nath, Jonathan Raiman, Rajarshi Roy 0003. iccad 2021: 1-6 [doi]

Softermax: Hardware/Software Co-Design of an Efficient Softmax for TransformersJacob R. Stevens, Rangharajan Venkatesan, Steve Dai, Brucek Khailany, Anand Raghunathan. dac 2021: 469-474 [doi]

2020

Accelerating Chip Design with Machine LearningBrucek Khailany. mlcad 2020: 33 [doi]

Accelerating Chip Design With Machine LearningBrucek Khailany, Haoxing Ren, Steve Dai, Saad Godil, Ben Keller, Robert Kirby, Alicia Klinefelter, Rangharajan Venkatesan, Yanqing Zhang, Bryan Catanzaro, William J. Dally. micro, 40(6):23-32, 2020. [doi]

ABCDPlace: Accelerated Batch-Based Concurrent Detailed Placement on Multithreaded CPUs and GPUsYibo Lin, Wuxi Li, Jiaqi Gu, Haoxing Ren, Brucek Khailany, David Z. Pan. tcad, 39(12):5083-5096, 2020. [doi]

FIST: A Feature-Importance Sampling and Tree-Based Method for Automatic Design Flow Parameter TuningZhiyao Xie, Guan-Qi Fang, Yu-Hung Huang, Haoxing Ren, Yanqing Zhang, Brucek Khailany, Shao-Yun Fang, Jiang Hu, Yiran Chen, Erick Carvajal Barboza. aspdac 2020: 19-25 [doi]

PowerNet: Transferable Dynamic IR Drop Estimation via Maximum Convolutional Neural NetworkZhiyao Xie, Haoxing Ren, Brucek Khailany, Ye Sheng, Santosh Santosh, Jiang Hu, Yiran Chen. aspdac 2020: 13-18 [doi]

Opportunities for RTL and Gate Level Simulation using GPUs (Invited Talk)Yanqing Zhang, Haoxing Ren, Brucek Khailany. iccad 2020: 1-5 [doi]

GRANNITE: Graph Neural Network Inference for Transferable Power EstimationYanqing Zhang, Haoxing Ren, Brucek Khailany. dac 2020: 1-6 [doi]

Problem C: GPU Accelerated Logic Re-simulation : (Invited Talk)Yanqing Zhang, Haoxing Ren, Ben Keller, Brucek Khailany. iccad 2020: 1-4 [doi]

2019

A Fine-Grained GALS SoC with Pausible Adaptive Clocking in 16 nm FinFETMatthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Stephen G. Tell, Brian Zimmer, Tezaswi Raja, Kevin Zhou, William J. Dally, Brucek Khailany. async 2019: 27-35 [doi]

DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI PlacementYibo Lin, Shounak Dhar, Wuxi Li, Haoxing Ren, Brucek Khailany, David Z. Pan. dac 2019: 117 [doi]

High Performance Graph Convolutional Networks with Applications in Testability AnalysisYuzhe Ma, Haoxing Ren, Brucek Khailany, Harbinder Sikka, Lijuan Luo, Karthikeyan Natarajan, Bei Yu 0001. dac 2019: 18 [doi]

Timeloop: A Systematic Approach to DNN Accelerator EvaluationAngshuman Parashar, Priyanka Raina, Yakun Sophia Shao, Yu-Hsin Chen, Victor A. Ying, Anurag Mukkara, Rangharajan Venkatesan, Brucek Khailany, Stephen W. Keckler, Joel S. Emer. ispass 2019: 304-315 [doi]

Analog/Mixed-Signal Hardware Error Modeling for Deep Learning InferenceAngad S. Rekhi, Brian Zimmer, Nikola Nedovic, Ningxi Liu, Rangharajan Venkatesan, Miaorong Wang, Brucek Khailany, William J. Dally, C. Thomas Gray. dac 2019: 81 [doi]

MAGNet: A Modular Accelerator Generator for Neural NetworksRangharajan Venkatesan, Yakun Sophia Shao, Miaorong Wang, Jason Clemons, Steve Dai, Matthew Fojtik, Ben Keller, Alicia Klinefelter, Nathaniel Ross Pinckney, Priyanka Raina, Yanqing Zhang, Brian Zimmer, William J. Dally, Joel S. Emer, Stephen W. Keckler, Brucek Khailany. iccad 2019: 1-8 [doi]

PRIMAL: Power Inference using Machine LearningYuan Zhou, Haoxing Ren, Yanqing Zhang, Ben Keller, Brucek Khailany, Zhiru Zhang. dac 2019: 39 [doi]

2018

2017

SCNN: An Accelerator for Compressed-sparse Convolutional Neural NetworksAngshuman Parashar, Minsoo Rhu, Anurag Mukkara, Antonio Puglielli, Rangharajan Venkatesan, Brucek Khailany, Joel S. Emer, Stephen W. Keckler, William J. Dally. isca 2017: 27-40 [doi]

2016

A real-time energy-efficient superpixel hardware accelerator for mobile computer vision applicationsInjoon Hong, Jason Clemons, Rangharajan Venkatesan, Iuri Frosio, Brucek Khailany, Stephen W. Keckler. dac 2016: 95 [doi]

Modeling and Analysis of Power Supply Noise Tolerance with Fine-Grained GALS Adaptive ClocksDivya Akella Kamakshi, Matthew Fojtik, Brucek Khailany, Sudhir S. Kudva, Yaping Zhou, Benton H. Calhoun. async 2016: 75-82 [doi]

2015

A Pausible Bisynchronous FIFO for GALS SystemsBen Keller, Matthew Fojtik, Brucek Khailany. async 2015: 1-8 [doi]

2013

GPU design in a power-limited eraBrucek Khailany. mse 2013: 68 [doi]

2012

Unifying Primary Cache, Scratch, and Register File Memories in a Throughput ProcessorMark Gebhart, Stephen W. Keckler, Brucek Khailany, Ronny Krashinsky, William J. Dally. micro 2012: 96-106 [doi]

2011

CudaDMA: optimizing GPU memory bandwidth via warp specializationMichael Bauer, Henry Cook, Brucek Khailany. sc 2011: 12 [doi]

GPUs and the Future of Parallel ComputingStephen W. Keckler, William J. Dally, Brucek Khailany, Michael Garland, David Glasco. micro, 31(5):7-17, 2011. [doi]

2008

A Programmable 512 GOPS Stream Processor for Signal, Image, and Video ProcessingBrucek Khailany, Ted Williams, Jim Lin, Eileen Peters Long, Mark Rygh, DeForest Tovey, William J. Dally. jssc, 43(1):202-213, 2008. [doi]

2007

A Programmable 512 GOPS Stream Processor for Signal, Image, and Video ProcessingBrucek Khailany, Ted Williams, Jim Lin, Eileen Long, Mark Rygh, DeForest Tovey, William J. Daly. isscc 2007: 272-602 [doi]

2004

Evaluating the Imagine Stream ArchitectureJung Ho Ahn, William J. Dally, Brucek Khailany, Ujval J. Kapasi, Abhishek Das. isca 2004: 14-25 [doi]

Stream Processors: Progammability and EfficiencyWilliam J. Dally, Ujval J. Kapasi, Brucek Khailany, Jung Ho Ahn, Abhishek Das. queue, 2(1):52-62, 2004. [doi]

2003

Programmable Stream ProcessorsUjval J. Kapasi, Scott Rixner, William J. Dally, Brucek Khailany, Jung Ho Ahn, Peter R. Mattson, John D. Owens. Computer, 36(8):54-62, 2003. [doi]

Exploring the VLSI Scalability of Stream ProcessorsBrucek Khailany, William J. Dally, Scott Rixner, Ujval J. Kapasi, John D. Owens, Brian Towles. hpca 2003: 153-164 [doi]

2002

2001

Imagine: Media Processing with StreamsBrucek Khailany, William J. Dally, Ujval J. Kapasi, Peter R. Mattson, Jinyung Namkoong, John D. Owens, Brian Towles, Andrew Chang, Scott Rixner. micro, 21(2):35-46, 2001. [doi]

2000

Efficient conditional operations for data-parallel architecturesUjval J. Kapasi, William J. Dally, Scott Rixner, Peter R. Mattson, John D. Owens, Brucek Khailany. euromicro 2000: 159-170 [doi]

Register Organization for Media ProcessingScott Rixner, William J. Dally, Brucek Khailany, Peter R. Mattson, Ujval J. Kapasi, John D. Owens. hpca 2000: 375-386 [doi]

1998

A Bandwidth-efficient Architecture for Media ProcessingScott Rixner, William J. Dally, Ujval J. Kapasi, Brucek Khailany, Abelardo López-Lagunas, Peter R. Mattson, John D. Owens. euromicro 1998: 3-13 [doi]

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