Table of Contents

• Unbalanced lattice switched-current filtersAntônio Carlos M. de Queiroz. 1-4 [doi]
• Ultrasonic liver tissues classification by fractal feature vector based on M-band wavelet transformWen-Li Lee, Yung-Chang Chen, Kao-Sheng Hsieh. 1-4 [doi]
• IEEE1394 system simulation environment and a design of its link layer controllerKeishi Chikamura, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura. 1-4 [doi]
• Low cost and high efficiency BIST scheme with 2-level LFSR and ATPTSeung-Moon Yoo, Seong-Ook Jung, Sung-Mo Kang. 1-4 [doi]
• Small signal simulation of resonant convertersS. W. Ng, Y. S. Lee. 1-4 [doi]
• Low power order based DCT processing algorithmS. Masupe, T. Arslan. 5-8 [doi]
• A CMOS field programmable analog array and its application in continuous-time OTA-C filter designB. Pankiewicz, M. Wojcikowski, Stanislaw Szczepanski, Yichuang Sun. 5-8 [doi]
• Large-signal stability-oriented design of boost-type regulators in discontinuous conduction modeYefim Berkovich, Adrian Ioinovici. 5-8 [doi]
• System design problem formulation by control theoryAlexander Zemliak. 5-8 [doi]
• Testing complementary pass-transistor logic circuitsA. B. M. Harun-ur Rashid, M. Karim, S. M. Aziz. 5-8 [doi]
• Sampled-data modeling and analysis of one-cycle control and charge controlChung-Chieh Fang. 9-12 [doi]
• Noise reduction system using modified DFT pairN. Nakanishi, Y. Itoh, Y. Fukui, K. Fujii. 9-12 [doi]
• Introduction of system level architecture exploration using the SpecC methodologyLukai Cai, Daniel Gajski, Mike Olivarez. 9-12 [doi]
• Floating-gate CMOS differential analog inverter for ultra low-voltage applicationsYngvar Berg, Snorre Aunet, Øivind Næss, Mats Høvin. 9-12 [doi]
• At-speed testing of data communications transceiversS. L. Liu, S. Mourad, S. Krishnan. 9-12 [doi]
• Multiplier-less discrete sinusoidal and lapped transforms using sum-of-powers-of-two (sopot) coefficientsS. C. Chan, P. M. Yiu. 13-16 [doi]
• Low voltage class AB output stages for CMOS op-amps using floating capacitorsRamón González Carvajal, Antonio Jesús Torralba Silgado, Jaime Ramírez-Angulo, Jonathan Noel Tombs, Fernando Muñoz Chavero. 13-16 [doi]
• Global variable localization and transformation for hardware synthesis from high-level programming language descriptionJong-Yeol Lee, In-Cheol Park. 13-16 [doi]
• Simulation model of switching power circuitsI. Medic, B. Persic. 13-16 [doi]
• Built-In self-repair for divided word line memoryShyue-Kung Lu, Chih-Hsien Hsu. 13-16 [doi]
• Performance estimators for hardware/software co-designL. Theriault, D. Auder, Yvon Savaria. 17-20 [doi]
• FDP: fault detection probability function for analog circuitsAbdelhakim Khouas, Anne Derieux. 17-20 [doi]
• Qualitative dynamics of the boost converterO. Woywode, J. Weber, H. Guldner, Alexander L. Baranovski, Wolfgang M. Schwarz. 17-20 [doi]
• Adaptive filter implementation using switched-current techniqueA. S. de la Vega, Antônio Carlos M. de Queiroz, Paulo S. R. Diniz. 17-20 [doi]
• Improving the transform domain ECG denoising performance by applying interbeat and intra-beat decorrelating transformsAtanas P. Gotchev, N. Nikolaev, Karen O. Egiazarian. 17-20 [doi]
• Fingerprint recognition using wavelet featuresMarius Tico, E. Immonen, Pauli Rämö, Pauli Kuosmanen, Jukka Saarinen. 21-24 [doi]
• A solution-tracing circuit for the fixed-point homotopy methodY. Inoue, E. Kaji, S. Kasanobu. 21-24 [doi]
• Robust high-pass and notch Gm-(grounded) C biquads: how many different topologies are there?Vladimir I. Prodanov. 21-24 [doi]
• Encoding and transcoding multiple video objects with variable temporal resolutionAnthony Vetro, Huifang Sun. 21-24 [doi]
• Statistical analysis of the time-delay digital tanlock loop in the presence of Gaussian noiseZ. M. Hussain, Boualem Boashash. 21-24 [doi]
• Transcoder with arbitrarily resizing capabilityGuobin Shen, Bing Zeng, Ya-Qin Zhang, Ming L. Liou. 25-28 [doi]
• An all-lag rotating-reference correlator and its efficient implementationTung-Sang Ng, Kun-Wah Yip, Chin-Long Cheng. 25-28 [doi]
• A class of biorthogonal nonuniform cosine-modulated filter banks with lower system delayX. M. Xie, S. C. Chan, T. I. Yuk. 25-28 [doi]
• Finding all characteristic curves of nonlinear resistive circuits using the dual simplex methodK. Yamamura, T. Kumakura. 25-28 [doi]
• Designs of analog and digital comparators with FGMOSK. Nandhasri, Jitkasem Ngarmnil. 25-28 [doi]
• Noise generation system using DCTKi-Cheol Tae, Jin-Gyun Chung, Dae-Ik Kim. 29-32 [doi]
• Energy storage and Gramians of ladder filter realisationsJ. Harrison, Neil Weste. 29-32 [doi]
• An image segmentation method with multi-resolution mechanismY. Miyanaga, A. Sato, R. HeeBurm. 29-32 [doi]
• Analysis of a class of constrained nonlinear dynamic circuitsM. J. Ogorzalek. 29-32 [doi]
• Low-complexity and high quality frame-skipping transcoderKai-Tat Fung, Yui-Lam Chan, Wan-Chi Siu. 29-32 [doi]
• Dynamic charge restoration of floating gate subthreshold MOS translinear circuitsVincent F. Koosh, Rodney M. Goodman. 33-36 [doi]
• A systematic technique for designing prototype filters for perfect reconstruction cosine modulated and modified DFT filter banksR. Begovic, Tapio Saramäki. 33-36 [doi]
• Solvability of network with nonlinear resistorsH. Nakajima, T. Miyoshi, N. Inaba. 33-36 [doi]
• Systolic VLSI realization of a novel iterative division algorithm over GF(2m): a high-speed, low-complexity designChien-Hsing Wu, Chien-Ming Wu, Ming-Der Shieh, Yin-Tsung Hwang. 33-36 [doi]
• Minimum cost implementation of full VCR functionality in MPEG video streamingChia-Wen Lin, Jian Zhou, Ming-Ting Sun, Hung Hseng Hsu. 33-36 [doi]
• Multiplier-free structures for IIR half-band filter by multiple use of short subfilterMin-Chi Kao. 37-40 [doi]
• A new image interpolation method for increasing the frame rate in multimedia and virtual reality applicationsW. Zeise, Anton Kummert. 37-40 [doi]
• A low-power bit-serial multiplier for finite fields GF(2m)Johann Großschädl. 37-40 [doi]
• Multi-template approach to artificial locomotion controlPaolo Arena, Luigi Fortuna, Mattia Frasca, C. Marchese. 37-40 [doi]
• Extreme low-voltage floating-gate CMOS transconductance amplifierYngvar Berg, Snorre Aunet, Øivind Næss, Henning Gundersen, Mats Høvin. 37-40 [doi]
• A new resource constrained asynchronous scheduling method through transformation of dataflow graphsEuiseok Kim, Dong-Ik Lee. 41-44 [doi]
• Content based color image adaptive watermarking schemeHuajian Liu, Xiangwei Kong, Xiangdong Kong, Yu Liu. 41-44 [doi]
• A low power MMSE receiver architecture for multi-carrier CDMAA. C. McCormick, P. M. Grant, John S. Thompson, Tughrul Arslan, Ahmet T. Erdogan. 41-44 [doi]
• LC quadrature generation in integrated circuitsK. T. Christensen. 41-44 [doi]
• AnaLogic Wave Computers-wave-type algorithms: canonical description, computer classes, and computational complexityTamás Roska. 41-44 [doi]
• PN-generators embedded in high performance signal processorsU. Walther, G. P. Ferrweis. 45-48 [doi]
• Robust and high-quality time-domain audio watermarking subject to psychoacoustic maskingWen-Nung Lie, Li-Chun Chang. 45-48 [doi]
• On tri-state buffer inference in HDL synthesisHen-Ming Lin, Jing-Yang Jou. 45-48 [doi]
• A quadrature sampling scheme with improved image rejection for complex-IF receiversKong-Pang Pun, José E. Franca, Carlos Azeredo Leme. 45-48 [doi]
• Complex dynamics in cellular neural networksMarco Gilli, Mario Biey, Pier Paolo Civalleri, Paolo Checco. 45-48 [doi]
• An entropy-based algorithm to reduce area overhead for bipartition-codec architecturePo-Hung Chen, Shanq-Jang Ruan, Kuen-Pin Wu, Dai-Xun Hu, Feipei Lai, Kun-Lin Tsai. 49-52 [doi]
• A 1.5-V CMOS fully differential inductorless RF bandpass amplifierApinunt Thanachayanont. 49-52 [doi]
• Digital watermarking for object-based compressed videoWen-Nung Lie, Guo-Shiang Lin, Ta-Chun Wang. 49-52 [doi]
• Nonuniform amplitude division for ABLMS equalisationT. Shimamura. 49-52 [doi]
• Computing on silicon with trigger waves: experiments on CNN-UM chipsCsaba Rekeczky, István Szatmári, Péter Földesy. 49-52 [doi]
• Watermarks embedded in the permuted imageJui-Cheng Yen. 53-56 [doi]
• A novel estimation procedure for the aperture time in asynchronous sinusoidal PWM systemsRichard A. Guinee, C. Lyden. 53-56 [doi]
• A flexible method of LUT indexing in digital predistortion linearization of RF power amplifiersJ. Y. Hassani, Mahmoud Kamarei. 53-56 [doi]
• An automatic word length determination methodMarc-André Cantin, Yvon Savaria, D. Prodanos, Pierre Lavoie. 53-56 [doi]
• Robust chaotic PN sequence generation techniquesD. Leon, Sina Balkir, Michael W. Hoffman, L. C. Perez. 53-56 [doi]
• Statistical analysis of Markov chaotic sequences for watermarking applicationsAnastasios Tefas, Athanasios Nikolaidis, Nikos Nikolaidis, Vassilios Solachidis, Sofia Tsekeridou, Ioannis Pitas. 57-60 [doi]
• A constructive procedure for optimizing the placement of macrocellsM. Mir, M. A. Al-Saleh. 57-60 [doi]
• Cancelling the memory effects in RF power amplifiersJ. Vuolevi, J. Manninen, T. Rahkonen. 57-60 [doi]
• VLSI architecture design and implementation for BLOWFISH block cipher with secure modes of operationYeong-Kang Lai, Yu-Chuan Shu. 57-60 [doi]
• Fundamental frequency parabolic PWM controller for lossless soft-switching boost power factor correctionTanes Tanitteerapan, S. Mori. 57-60 [doi]
• A 2.5 Mb/s, 23 mW SOVA traceback chip for turbo decoding applicationsDavid Garrett, Mircea R. Stan. 61-64 [doi]
• Lower bound on mean squared channel estimation error for multiuser receiverHolger Boche, Slawomir Stanczak. 61-64 [doi]
• A 1.25 V FGMOS filter using translinear circuitsEsther Rodríguez-Villegas, Adoración Rueda, Alberto Yufera. 61-64 [doi]
• Calculation of sign Walsh spectra of Boolean functions from disjoint cubesBogdan J. Falkowski, Sudha Kannurao. 61-64 [doi]
• Dual supply-voltage scaling for reconfigurable SoC sThomas Olsson, Pontus Åström, Peter Nilsson. 61-64 [doi]
• A study on the performance, complexity tradeoffs of block turbo decoder designZhipei Chi, Leilei Song, Keshab K. Parhi. 65-68 [doi]
• An integrated digital PWM DC/DC converter using proportional current feedbackChung-Hsien Tso, Jiin-Chuan Wu. 65-68 [doi]
• A fast constructive algorithm for fixed channel assignment problemJunaid A. Khan, Sadiq M. Sait, Salman A. Khan. 65-68 [doi]
• On the testability of SC filters based on allpass sectionsJorge M. Cañive, Antonio Petraglia. 65-68 [doi]
• FIR MIMO decision feedback equalization for space-time block-coded transmission over multipath-fading channelsNaofal Al-Dhahir, Ayman F. Naguib. 65-68 [doi]
• Adaptive blind signal separation using a risk-sensitive criterionJ. Shimizu. 69-72 [doi]
• 3V CMOS 0.35 µ transimpedance receiver for optical applicationsHåkan Bengtson, Christer Svensson. 69-71 [doi]
• A genetic approach to the design space exploration of superscalar microprocessor architecturesM. Olivieri. 69-72 [doi]
• A new approach for controlling series-connected IGBT modulesJ. Thalheim, Norbert Felber, Wolfgang Fichtner. 69-72 [doi]
• A digitally programmable IIR switched-capacitor filter for CMOS technologyJoarez B. Monteiro, Antonio Petraglia, Carlos Azeredo Leme. 69-72 [doi]
• A serial link transceiver for USB2 high-speed modeShyh-Jye Jou, Shu-Hua Kuo, Jui-Ta Chiu, Chu King, Chien-Hsiung Lee, Tim Liu. 72-75 [doi]
• A minimax approach to open-loop downlink beamformingJ. Panoff, S. Nagaraj, S. Gollamudi, Yih-Fang Huang, Josef A. Nossek. 73-76 [doi]
• Switched-MOSFET technique for programmable filters operating at low-voltage supplyL. C. C. Marques, Carlos Galup-Montoro, Sidnei Noceti Filho, Márcio C. Schneider. 73-76 [doi]
• A wavelet balance approach for steady-state analysis of nonlinear circuitsXin Li, Bo Hu, Xieting Ling, Xuan Zeng. 73-76 [doi]
• An efficient BIST method for testing of embedded SRAMsMohammad H. Tehranipour, Zainalabedin Navabi, Seid Mehdi Fakhraie. 73-76 [doi]
• Pipelined implementation of the adaptive canceller-equalizerInseop Lee, W. Kenneth Jenkins. 76-80 [doi]
• Design of digital differentiator based on maximum signal to noise ratio criterionChien-Cheng Tseng, Su-Ling Lee. 77-80 [doi]
• Evaluation of the response of nonlinear systems to asymptotically almost periodic inputsIrwin W. Sandberg, G. J. J. Van Zyl. 77-80 [doi]
• A switched-MOSFET filter for application in hearing aid devicesL. C. C. Marques, Carlos Galup-Montoro, Sidnei Noceti Filho, Márcio C. Schneider. 77-80 [doi]
• A distributed and object-oriented framework for VLSI physical design automationFong-Ming Shyu, Sao-Jie Chen. 77-80 [doi]
• A 1.25 GHz 32-bit tree-structured carry lookahead adderChua-Chin Wang, Po-Ming Lee, Rong-Chin Lee, Chenn-Jung Huang. 80-83 [doi]
• A class of approximate FIR low-pass filtersJ. J. Fuchs. 81-84 [doi]
• A trajectory-based methodology for systematically computing multiple optimal solutions of general nonlinear programming problemsJaewook Lee, Hsiao-Dong Chiang. 81-84 [doi]
• A comparative performance analysis of a DDR-SDRAM, a D-RDRAM, and a DDR-FCRAM using a POPeye simulatorKangmin Lee, Chi Weon Yoon, Ramchan Woo, Jeong-Hun Kook, Ja-Il Koo, Tae-Sung Jung, Hoi-Jun Yoo. 81-84 [doi]
• Modelling of effects of temperature profile in the MOS transistor characteristicsSaeid Nooshabadi. 81-84 [doi]
• A 2.8 ns 30 uW/MHz area-efficient 32-b Manchester carry-bypass adderHenrik Eriksson, Per Larsson-Edefors, Atila Alvandpour. 84-87 [doi]
• Harmonic injection method: a novel method for harmonic distortion analysisJirayuth Mahattanakul, C. Bunyakate. 85-88 [doi]
• Low-power multiplexer decomposition by suppressing propagation of signal transitionsKisun Kim, Taekyoon Ahn, Sang-Yeol Han, Chang-Seung Kim, Ki Hyun Kim. 85-88 [doi]
• Modeling of random channel parameter variations in MOS transistorsMao-Feng Lan, Randall L. Geiger. 85-88 [doi]
• Unispherical windowsA. G. Deczky. 85-88 [doi]
• A high-speed CMOS incrementer/decrementerChung-Hsun Huang, Jinn-Shyan Wang, Yan-Chao Huang. 88-91 [doi]
• The transfer function of low delay maximally flat lowpass FIR digital filtersYukio Mori, Naoyuki Aikawa. 89-92 [doi]
• ST: PERL package for simulation and test environmentKazutoshi Kobayashi, Hidetoshi Onodera. 89-92 [doi]
• MOSGRAD-a tool for simulating the effects of systematic and random channel parameter variationsMao-Feng Lan, Randall L. Geiger. 89-92 [doi]
• Scaled simplicial approximation for the inversion of Gaussian RBF expansionsP. Mundkur, Rui J. P. de Figueiredo. 89-92 [doi]
• Scalable counter architecture for a pre-loadable 1 GHz@0.6 um/5V pre-scaler in TSPCAndreas Wassatsch, Dirk Timmermann. 92-95 [doi]
• Compact bistable CNNs based on resonant tunneling diodesM. Hanggi, Leon O. Chua. 93-96 [doi]
• Q-GA: a modified genetic algorithm for the design of phase equalizersD. B. Carvalho, Sidnei Noceti Filho, Rui Seara. 93-96 [doi]
• Response of maximally flat lowpass filters to polynomial signalsSaed Samadi, Akinori Nishihara. 93-96 [doi]
• Multiple description image transmission for diversity systems using block-based DC separationMd. A. Razzak, Bing Zeng. 93-96 [doi]
• A compact layout technique to minimize high frequency switching effects in high speed circuitsJuan A. Montiel-Nelson, V. de Armas, Roberto Sarmiento, Antonio Núñez, Saeid Nooshabadi. 96-99 [doi]
• Prototype implementation of a WWW based analog circuit design toolMark Schlarmann, Randall L. Geiger. 97-100 [doi]
• Fast algorithm of adaptive chirplet-based real signal decompositionAigang Feng, Xiaojun Wu, Qinye Yin. 97-100 [doi]
• Terminal dynamics approach to cellular neural networksV. Mladenov, Hans Hegt, Arthur H. M. van Roermund. 97-100 [doi]
• Progressive fine granular scalable (PFGS) video using advance-predicted bitplane coding (APBIC)Feng Wu, Shipeng Li, Ya-Qin Zhang. 97-100 [doi]
• A low-power fully integrated Gaussian-MSK modulator based on the sigma-delta fractional-N frequency synthesisH. Zarei, Omid Shoaei, Seid Mehdi Fakhraie. 100-103 [doi]
• An accurate low-voltage analog memory-cell with built-in multiplicationJader A. De Lima, A. S. Cordeiro. 101-104 [doi]
• Optimal linear space-time multiuser detector for asynchronous DS-CDMA systemWenjie Wang, Aigang Feng, Qinye Yin. 101-104 [doi]
• Dependant distance potential source algorithm for optimal path finding with the analogic CNNHyongsuk Kim, Hongrak Son, Tamás Roska, Leon O. Chua. 101-104 [doi]
• Wireless video transport using conditional retransmission and low-delay interleavingSupavadee Aramvith, Chia-Wen Lin, Sumit Roy, Ming-Ting Sun. 101-104 [doi]
• A new design for cascaded sigma-delta modulatorsXiaohong Sun, K. R. Laker. 104-107 [doi]
• High-precision analog EEPROM with real-time write monitoringKeng Hoong Wee, Toshiyuki Nozawa, T. Yonezawa, Y. Yamashita, Tadashi Shibata, Tadahiro Ohmi. 105-108 [doi]
• Robust layered coding of video for transmission over noisy channelsNikolaos V. Boulgouris, Athanasios Leontaris, Nikolaos Thomos, Michael G. Strintzis. 105-108 [doi]
• Adaptive multipath equalization time delay estimation with bias-removalH. C. So. 105-108 [doi]
• The variable neighborhood CNNM. Namba, S. Takatori, H. Kawabata, Z. Zhang. 105-108 [doi]
• A low power sinusoidal clockB. Voss, Manfred Glesner. 108-111 [doi]
• A family of CMOS latches with 3 stable operating pointsXiaoqiang Shou, M. M. Green. 109-112 [doi]
• Network-adaptive rate control with unequal loss protection for scalable video over InternetWenwu Zhu, Qian Zhang, Ya-Qin Zhang. 109-112 [doi]
• Multicomponent IF estimation: a statistical comparison in the quadratic class of time-frequency distributionsZ. M. Hussain, Boualem Boashash. 109-112 [doi]
• A piecewise-linear simplicial coupling cell for CNN gray-level image processingPedro Julián, Radu Dogaru, Leon O. Chua. 109-112 [doi]
• CML ring oscillators: oscillation frequencyMassimo Alioto, Giuseppe Di Cataldo, Gaetano Palumbo. 112-115 [doi]
• Application of static synchronous series compensator (SSSC) to stabilization of frequency oscillations in an interconnected power systemNgamroo Ngamroo. 113-116 [doi]
• A new level converter for low-power applicationsChien-Cheng Yu, Wei-Ping Wang, Bin-Da Liu. 113-116 [doi]
• Harmonic retrieval in mixed non-Gaussian and gaussian ARMA noises using higher-order statisticsSheng-Hong Li, Hong-Wen Zhu. 113-116 [doi]
• Symbolic verification of Boolean constraints over partially specified functionsS. Sriram, R. Tandon, Pallab Dasgupta, P. P. Chakrabarti. 113-116 [doi]
• An 8-Bit, 100-MHz low glitch interpolation DACYijun Zhou, Jiren Yuan. 116-119 [doi]
• Direct downconversion with switching CMOS mixerJ. Pihl, K. T. Christensen, Erik Bruun. 117-120 [doi]
• Sensitivity analysis of differential-algebraic systems using the GMRES method-application to power systemsD. Chaniotis, M. A. Pai, Ian A. Hiskens. 117-120 [doi]
• A computationally efficient scheme for estimating linear noisy input-output systemsWei Xing Zheng. 117-120 [doi]
• A global approach to the variable ordering problem in PSBDDsWei Wang, Malgorzata Chrzanowska-Jeske. 117-120 [doi]
• A comparative analysis of direct-sequence spread-spectrum super-regenerative architecturesF. Xavier Moncunill-Geniz, O. Mas-Casals, Pere Palà-Schönwälder. 120-123 [doi]
• Unbiased parameter identification for noisy autoregressive signalsWei Xing Zheng. 121-124 [doi]
• Autonomous robot for a power transmission line inspectionS. Peungsungwal, B. Pungsiri, Kosin Chamnongthai, M. Okuda. 121-124 [doi]
• On the use of don t cares during symbolic reachability analysisS. Reda, Ayman M. Wahba, Ashraf M. Salem, Dominique Borrione, M. Ghonaimy. 121-124 [doi]
• The design of a CMOS IF bandpass amplifier with low sensitivity to process and temperature variationsChung-Yu Wu, Chung-Yun Chou. 121-124 [doi]
• Image-reject receivers with image-selection functionalityKari Stadius, P. Jarvio, Petteri Paatsila, Kari Halonen. 124-127 [doi]
• Parameter space depiction of stability limits in the presence of singularitiesSaffet Ayasun, Chika Nwankpa, Harry G. Kwatny. 125-128 [doi]
• Single chip tuner design for digital terrestrial televisionM. Dawkins, A. Payne, N. Cowley. 125-128 [doi]
• Dental caries lesions detection using deformable templatesK. Kantapanit, P. Inrawongs, W. Wiriyasuttiwong, R. Kantapanit. 125-128 [doi]
• Abstractions for model checking of event timingsJatindra Kumar Deka, S. Chaki, Pallab Dasgupta, P. P. Chakrabarti. 125-128 [doi]
• A bit-streaming, pipelined multiuser detector for wireless communication receiversSridhar Rajagopal, Joseph R. Cavallaro. 128-131 [doi]
• Modeling and verification of cache coherence protocolsL. Ivanov, R. Nunna. 129-132 [doi]
• Design of a class E power amplifier with non-linear transistor output capacitance and finite DC-feed inductanceC. K. T. Chan, Christofer Toumazou. 129-132 [doi]
• Design of robust H-infty via normalized coprime factorization approachIssarachai Ngamroo. 129-132 [doi]
• Minimum mean square error quantizers with uncorrelated input and quantization noiseAre Hjørungnes, Tapio Saramäki. 129-132 [doi]
• A novel single-bit input all digital synchronizer and demodulator baseband processor for fast frequency hopping systemF. S. Tsai, Chen-Yi Lee. 132-135 [doi]
• Quantized chaotic dynamics and communications systemsYoshinobu Kawasaki, Toshimichi Saito, Hiroyuki Torikai. 133-136 [doi]
• Content-based retrieval from nonstationary image databaseChia-Hung Yeh, Chung J. Kuo. 133-136 [doi]
• Joint source-channel coding of images using punctured convolutional codes and trellis-coded quantizationSumohana S. Channappayya, Glen P. Abousleman, Lina J. Karam. 133-136 [doi]
• Hybrid analysis of shielding effect in planar microwave circuitsMohamed Lamine Tounsi, Mustapha Chérif-Eddine Yagoub, B. Haraoubia. 133-136 [doi]
• A design of source matched MAP receiver for image transmissionS. Makido, Takaya Yamazato, Hiraku Okada, Masaaki Katayama, Akira Ogawa. 136-139 [doi]
• All-MOS subthreshold log filtersFrancesc Serra-Graells. 137-140 [doi]
• A color histogram based people tracking systemWenmiao Lu, Yap-Peng Tan. 137-140 [doi]
• A first experimental verification of optimal MAI reduction in chaos-based DS-CDMA systemsF. Agnelli, Gianluca Mazzini, Riccardo Rovatti, Gianluca Setti. 137-140 [doi]
• A power-optimized joint source channel coding for scalable video streaming over wireless channelQian Zhang, Wenwu Zhu, Zu Ji, Ya-Qin Zhang. 137-140 [doi]
• A CMOS differential logic for low-power and high-speed applicationsYiannis Moisiadis, I. Bouras, Angela Arapoyanni. 140-143 [doi]
• A sender-adaptive and receiver-driven layered multicast scheme for video over InternetQuji Guo, Qian Zhang, Wenwu Zhu, Ya-Qin Zhang. 141-144 [doi]
• Recent results for chaotic modulation schemesGéza Kolumbán, Michael Peter Kennedy. 141-144 [doi]
• High-order lowpass and bandpass elliptic log-domain ladder filtersEmmanuel M. Drakakis, A. J. Payne, Christofer Toumazou, A. E. J. Ng, John I. Sewell. 141-144 [doi]
• Change detection based on color edgesAndrea Cavallaro, Touradj Ebrahimi. 141-144 [doi]
• Dynamic single phase logic with self-timed stages for power reduction in pipeline circuit designsFrank Grassert, Dirk Timmermann. 144-147 [doi]
• Masking compressed video connection utilization in ATM networksJ. McEachen, A. Cay. 145-148 [doi]
• Ergodic chaos shift keyingM. Hasler. 145-148 [doi]
• Human face recognition using a spatially weighted Hausdorff distanceBaofeng Guo, Kin-Man Lam, Wan-Chi Siu, Shuyuan Yang. 145-148 [doi]
• The development of bipolar log domain filters in a standard CMOS processG. D. Duerden, Gordon W. Roberts, M. Jamal Deen. 145-148 [doi]
• A low-power 3-phase half rail pass-gate differential logicHongchin Lin, Yi-Fan Chen, Hsien-Chih She. 148-151 [doi]
• Multiple-reference temporal error concealmentMohammed E. Al-Mualla, Cedric Nishan Canagarajah, David R. Bull. 149-152 [doi]
• A unified matrix method for systematic synthesis of log-domain ladder filtersA. E. J. Ng, John I. Sewell, Emmanuel M. Drakakis, A. J. Payne, Chris Toumazou. 149-152 [doi]
• Design of spread spectrum sequences using chaotic dynamical systems with Lebesgue spectrumChi-Chung Chen, Kung Yao. 149-152 [doi]
• A study on detecting image hiding by feature analysisGuo-Shiang Lin, Wen-Nung Lie. 149-152 [doi]
• CRRDL: a novel charge recovery-recycling differential logicK. Y. Cheung. 152-153 [doi]
• A signal reconstruction method based on an unwrapping of signals in transform domainP. Zavarsky, Noriyoshi Kambayashi, Somchart Chokchaitam, Masahiro Iwahashi, M. Kamiya. 153-156 [doi]
• Extracting a planar spanning subgraph of a terminal-vertex graph by solving the independent set problemT. Yamaoki, Satoshi Taoka, Toshimasa Watanabe. 153-156 [doi]
• An operating point elimination technique for weak-inversion log-domain filters with multiple operating pointsJulius Georgiou, Christofer Toumazou. 153-155 [doi]
• Applications of symbolic dynamics to UWB impulse radioGian Mario Maggio, Luca Reggiani. 153-156 [doi]
• Skew-tolerant high-speed (STHS) domino logicSeong-Ook Jung, Seung-Moon Yoo, Ki-Wook Kim, Sung-Mo Kang. 154-157 [doi]
• A 150 MHz continuous-time seventh order 0.05° equiripple linear phase filter with automatic tuning systemA. Lopez-Martinez, R. Antonio-Chavez, J. Silva-Martinez. 156-159 [doi]
• ARMA processes in sub-bands with application to audio restorationLuiz W. P. Biscainho, Paulo S. R. Diniz, P. A. A. Esquef. 157-160 [doi]
• Neural network training using ant algorithm in ATM traffic controlZhangsu Bing, Liu Ze-Min. 157-160 [doi]
• A variable partition approach for disjoint decompositionMuthukumar Venkatesan, Robert J. Bignall, Henry Selvaraj. 157-162 [doi]
• Noise constrained power optimization for dual VT domino logicSeong-Ook Jung, Ki-Wook Kim, Sung-Mo Kang. 158-161 [doi]
• Low-sensitivity SAB band-pass active-RC filter using impedance taperingDrazen Jurisic, George S. Moschytz, Neven Mijat. 160-163 [doi]
• A simplified second-order HMM with application to face recognitionHisham Othman, Tyseer Aboulnasr. 161-164 [doi]
• A novel scheme for policing mechanism in ATM networks: feedback fuzzy leaky bucketA. Niruntasukrat, W. Benjapolakul. 161-164 [doi]
• The circuit design of multiple-valued logic voltage-mode addersI. Thoidis, Dimitrios Soudris, J. M. Fernandez, Adonios Thanailakis. 162-165 [doi]
• Adaptive negative cycle detection in dynamic graphsN. Chandrachoodan, S. S. Bhattacharyya, K. J. Ray Liu. 163-166 [doi]
• A compact low-power vertical filter for very-high-frequency applicationsU. Yodprasit, K. Sirivathanant. 164-167 [doi]
• Face recognition system with PCA and moment invariant methodT. Phiasai, S. Arunrungrusmi, Kosin Chamnongthai. 165-168 [doi]
• Backward predictive congestion control notification in ATM networks using neural network predictionW. Benjapolakul, A. Niruntasukrat, P. Nanagara. 165-168 [doi]
• A regular parallel multiplier which utilizes multiple carry-propagate addersHenrik Eriksson, Per Larsson-Edefors, William P. Marnane. 166-169 [doi]
• ENISLE: an intuitive heuristic nearly optimal solution for mincut and ratio mincut partitioningShun-Wen Cheng, Kuo-Hsing Cheng. 167-170 [doi]
• A CMOS digitally programmable current steering semidigital FIR reconstruction filterA. Aga, Gordon W. Roberts. 168-171 [doi]
• Applications of nonlinear prediction methods to the Internet trafficM. Hasegawa, Gang Wu, M. Mizuni. 169-172 [doi]
• A least squares algorithm for efficient context-based adaptive arithmetic codingGeorge A. Triantafyllidis, Michael G. Strintzis. 169-172 [doi]
• Asynchronous interface for locally clocked modules in ULSI systemsPasi Liljeberg, Juha Plosila, Jouni Isoaho. 170-173 [doi]
• Evolutionary graph generation system with transmigration capability for arithmetic circuit designNaofumi Homma, Takafumi Aoki, Tatsuo Higuchi. 171-174 [doi]
• VHF current-mode filter based on intrinsic biquad of the regulated cascode topologyU. Yodprasil, K. Sirivathanani. 172-175 [doi]
• Embedded fuzzy control for automatic channel equalization after digital transmissionsC. Dualibe, Paul G. A. Jespers, Michel Verleysen. 173-176 [doi]
• FPGA implementation of digital filters synthesized using the frequency-response masking techniqueYong Ching Lim, Ya Jun Yu, H. Q. Zheng, S. W. Foo. 173-176 [doi]
• Strategies for on-chip sub-nanosecond signal capture and timing measurementsNazmy Abaskharoun, Mohamed Hafed, Gordon W. Roberts. 174-177 [doi]
• Multiple motion object segmentation based on homogenous region mergingHong Li, Bee June Tye, Ee Ping Ong, Weisi Lin, Chi Chung Ko. 175-178 [doi]
• A low-power gigabit Ethernet analog equalizerP. Amini, Omid Shoaei. 176-179 [doi]
• Optimization of FIR filters using the frequency-response masking approachTapio Saramäki, Håkan Johansson. 177-180 [doi]
• Micromachined microphone with optical interferometric readoutF. L. Degertekin, N. A. Hall. 177-180 [doi]
• Leakage power estimation and minimization in VLSI circuitsWen-Tsong Shiue. 178-181 [doi]
• Multiresolution mesh representation using vertex cluster contractionK. F. Chan, Y. T. Wong, C. W. Kok. 179-182 [doi]
• Novel translinear-based multi-output FTFNAmorn Jiraseree-amornkun, B. Chipipop, Wanlop Surakampontorn. 180-183 [doi]
• Architecture for source localization with a linear ultrasonic arrayRalph Etienne-Cummings, Matthew A. Clapp. 181-184 [doi]
• Narrow-band and wide-band single filter frequency masking FIR filtersOscar Gustafsson, Håkan Johansson, Lars Wanhammar. 181-184 [doi]
• A new logic synthesis and optimization procedureHuo-Hsing Cheng, Ven-Chieh Hsieh. 182-185 [doi]
• New results on zonal based motion estimation algorithms-advanced predictive diamond zonal searchAlexis M. Tourapis, Oscar C. Au, Ming L. Liou. 183-186 [doi]
• The design and analysis of an analog ratio spectrum circuitLiping Deng, John G. Harris. 184-187 [doi]
• A systematic algorithm for the design of multiplierless FIR filtersJuha Yli-Kaakinen, Tapio Saramäki. 185-188 [doi]
• Pseudo-voltage domain implementation of a 2-dimensional silicon cochleaAndré van Schaik, Eric Fragnière. 185-188 [doi]
• Minimizing gate capacitances with transistor sizingArtur Wróblewski, O. Schumecher, Christian V. Schimpfle, Josef A. Nossek. 186-189 [doi]
• Low-power motion-estimation architecture based on a novel early-jump-out techniqueWujian Zhang, Runde Zhou, T. Kondo. 187-190 [doi]
• Optimization of frequency filters via vertex graphsDalibor Biolek, Viera Biolkova. 188-191 [doi]
• Efficient minimum group delay block processing approach to fractional sample rate conversionA. Groth, H. G. Gockler. 189-192 [doi]
• Heterogeneous integration of biomimetic acoustic microsystemsAndreas G. Andreou, David H. Goldberg, Eugenio Culurciello, Milutin Stanacevic, Gert Cauwenberghs, Laurence Riddle. 189-192 [doi]
• A low-cost CMOS time interval measurement coreMing-Jun Hsiao, Jing-Reng Huang, Shao-Shen Yang, Tsin-Yuan Chang. 190-193 [doi]
• Exploiting don t cares to minimize *BMDsChristoph Scholl, Marc Herbstritt, Bernd Becker. 191-194 [doi]
• A mixed-signal tuning approach for continuous-time LPFsA. Tong, Paul J. Hurst. 192-195 [doi]
• Blind broadband source localization and separation in miniature sensor arraysGert Cauwenberghs, Milutin Stanacevic, G. Zweig. 193-196 [doi]
• Hardware-efficient architecture design of tree-depth scanning and multiple quantization scheme for MPEG-4 still texture codingHao-Chieh Chang, Zhong-Lan Yang, Chung-Jr Lian, Liang-Gee Chen. 193-196 [doi]
• Modified SRCMOS cell for high-throughput wave-pipelined arithmetic unitsT. Santti, Jouni Isoaho. 194-197 [doi]
• Input vector generation for maximum intrinsic decoupling capacitance of VLSI circuitsSudhakar Bobba, Ibrahim N. Hajj. 195-198 [doi]
• New CMOS tunable transconductor for filtering applicationsG. Pamisano, Salvatore Pennisi. 196-199 [doi]
• A high-speed pattern decoder in MPEG-4 padding block hardware acceleratorHyeon-Cheol Mo, Jong-Sun Kim, Lee-Sup Kim. 197-200 [doi]
• Power system monitoring based on relay and circuit breaker informationChristoforos N. Hadjicostis, George C. Verghese. 197-200 [doi]
• On mismatch errors in analog-VLSI error correcting decodersFelix Lustenberger, Hans-Andrea Loeliger. 198-201 [doi]
• Multiple fault diagnosis of analog circuits by locating ambiguity groups of test equationJanusz A. Starzyk, D. Liu. 199-202 [doi]
• The parametric filter of signal constant componentRoman Kaszynski. 200-203 [doi]
• MPEG-4 authoring tool for the composition of 3D audiovisual scenesPetros Daras, Ioannis Kompatsiaris, Theodoros Raptis, Michael G. Strintzis. 201-204 [doi]
• Direct assessment of transient singularity in differential-algebraic systemsC. Singh, Ian A. Hiskens. 201-204 [doi]
• On finite precision implementation of low density parity check codes decoderTong Zhang, Zhongfeng Wang, Keshab K. Parhi. 202-205 [doi]
• A design of LUT-array-based PLD and a synthesis approach based on sum of generalized complex terms expressionHiroshi Tsutsui, K. Hiwada, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura. 203-206 [doi]
• High-frequency low-power multirate SC realizations for NTSC/PAL digital video filteringSeng-Pan U., Rui Paulo Martins, José E. Franca. 204-207 [doi]
• High quality MPEG-audio layer III algorithm for a 16-bit DSPKeun-Sup Lee, Hyen-O Oh, Young-Cheol Park, Dae Hee Youn. 205-208 [doi]
• Prospects for dynamic transmission circuit ratingsK. E. Holbert, G. T. Heydt. 205-208 [doi]
• VLSI architecture of extended in-place path metric update for Viterbi decodersChien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu. 206-209 [doi]
• Multiple region-of-interest image coding with embedded watermarkMei-Juan Chen, Chih-Wei Pan, Jeng-Wei Chen, Ro-Min Weng. 207-210 [doi]
• A programmable VHF CMOS read-channel continuous-time filter with on-chip tuningXiaoqiang Shou, M. Green. 208-211 [doi]
• Harmonic balance analysis and control of period doubling bifurcation in buck convertersChung-Chieh Fang, E. H. Abed. 209-212 [doi]
• Parallel implementation of H.263 encoder for CIF-sized images on quad DSP systemOlli Lehtoranta, Timo Hämäläinen, Jukka Saarinen. 209-212 [doi]
• A novel ACS-feedback scheme for generic, sequential Viterbi-decoder macrosM. Traber. 210-213 [doi]
• Block grouping algorithm for motion description encodingSimon Tredwell, Adrian N. Evans. 211-214 [doi]
• On designing OTA-C graphic-equalizers with MOSFET-triode transconductorsJader A. De Lima, Antonio Petraglia. 212-215 [doi]
• Universal discrete model and linear algebra representation for variant OFDM-CDMA systemsXiaojun Wu, Aigang Feng, Qinye Yin. 213-216 [doi]
• A comparative study of different chaos based spread spectrum communication systemsH. Yu, H. Leung. 213-216 [doi]
• A low power survivor memory unit for sequential Viterbi-DecodersM. Traber. 214-217 [doi]
• Xetal: a low-power high-performance smart camera processorRichard P. Kleihorst, Anteneh A. Abbo, André van der Avoird, M. Op de Beeck, Leo Sevat, Paul Wielage, R. van Veen, H. van Herten. 215-218 [doi]
• A -80 dB HD3 opamp in 3.3 V CMOS technology using tail current compensationBjørnar Hernes, Øystein Moldsvor, T. Saether. 216-219 [doi]
• Improved performance estimation and optimization for chaos-based asynchronous DS-CDMA systemsGianluca Mazzini, Riccardo Rovatti, Gianluca Setti. 217-220 [doi]
• A new genetic algorithm for routing the shortest route via several designated pointsJun Inagaki, Miki Haseyama, Hideo Kitajima. 217-220 [doi]
• A low power carry select adder with reduced areaYoungjoon Kim, Lee-Sup Kim. 218-221 [doi]
• Adaptive motion tracking for fast block motion estimationJian Feng, Tie-Yan Liu, Kwok-Tung Lo, Xu-Dong Zhang. 219-222 [doi]
• A CMOS current-mirror amplifier with compact slew rate enhancement circuit for large capacitive load applicationsHoi Lee, Philip K. T. Mok. 220-223 [doi]
• Adaptive median thresholding for the generation of high-data-rate random-like unpredictable binary sequences with chaosSergio Callegari, M. Dondini, Gianluca Setti. 221-224 [doi]
• A new Petri net based model of data transfers in the PC workstation memory hierarchy for MPEG encodingEric Debes. 221-224 [doi]
• Using carry-save adders in low-power multiplier blocksV. A. Bartlett, Andrew G. Dempster. 222-225 [doi]
• CMOS imager with charge-leakage compensated frame difference and sum outputBedabrata Pain, Suresh Seshadri, Monico Ortiz, Chris Wrigley, Guang Yang. 223-226 [doi]
• A constant GM rail-to-rail opamp with a novel input stage for BiCMOS processV. Rentala, S. Rout, E. Lee, R. J. Weber. 224-227 [doi]
• A protocol and memory manager for on-chip communicationKees G. W. Goossens. 225-228 [doi]
• Design of piece-wise maps for spread spectrum communication using genetic programmingVinay Varadan, Henry Leung. 225-228 [doi]
• A low power 10-transistor full adder cell for embedded architecturesAyman A. Fayed, Magdy A. Bayoumi. 226-229 [doi]
• Improved MPEG-4 visual texture coding using double transform codingChung-Neng Wang, Tihao Chiang, Chi-Min Liu, Hung-Ju Lee. 227-230 [doi]
• Fast-settling CMOS operational amplifiers with negative conductance voltage gain enhancementJie Yan, Randall L. Geiger. 228-231 [doi]
• SONET transcoder design for ATM over SONET or directly over fiberJie Chen. 229-232 [doi]
• On optimum 3-phase spreading sequences of simple Markov chainsH. Fujisaki. 229-232 [doi]
• An embedded low power FIR filterGang Xu, Jiren Yuan. 230-233 [doi]
• A new SPIHT algorithm based on variable sorting thresholdsHua Cai, Bing Zeng. 231-234 [doi]
• Gain and bandwidth boosting techniques for high-speed operational amplifiersM. M. Amourah, Randall L. Geiger. 232-235 [doi]
• Fast global motion estimation for global motion compensation codingYuwen He, Bo Feng, Shiqiang Yang, Yichuo Zhong. 233-236 [doi]
• VLSI neural network with digital weights and analog multipliersVincent F. Koosh, Rodney M. Goodman. 233-236 [doi]
• Low power enhancements for parallel algorithmsS. Klauke, J. Gotze. 234-237 [doi]
• Wavelet-based digital watermarking with halftoning techniqueK. H. Leung, Bing Zeng. 235-238 [doi]
• Design of a 1 V 250 MHz current-mode filter in conventional CMOS processYuanying Deng, E. K. F. Lee. 236-239 [doi]
• Content adaptive motion estimation for mobile video encodersA. Ahmed, S. K. Nandy, Paul Sathya. 237-240 [doi]
• MOS fully analog reinforcement neural network chipMahmoud Al-Nsour, Hoda S. Abdel-Aty-Zohdy. 237-240 [doi]
• A multi-gigabit CMOS data recovery circuit using an analog parallel sampling techniqueKasin Vichienchom, Mark Clements, Wentai Liu. 238-241 [doi]
• Embedding gray level imagesJiwu Huang, Yun Q. Shi. 239-242 [doi]
• A low-power and high-speed equalizer for magnetic storage read channelsTertulien Ndjountche, Rolf Unbehauen. 240-243 [doi]
• A novel fast motion estimation algorithm using fixed subsampling pattern and multiple local winners searchHsien-Hsi Hsieh, Yong-Kang Lai. 241-244 [doi]
• Analog VLSI spiking neural network with address domain probabilistic synapsesDavid H. Goldberg, Gert Cauwenberghs, Andreas G. Andreou. 241-244 [doi]
• System-on-chip design of a four-port ADSL-lite Data DSPR. K. Jain, R. Frenzel, M. Terschluse, P. K. Pandey, S. H. Low, B. Sukumaran, L. M. Lam. 242-245 [doi]
• Improved halftone image data hiding with intensity selectionMing Sun Fu, Oscar C. Au. 243-246 [doi]
• A low distortion wideband active-RC filter for a multicarrier base station transmitterJ. K. Pyykonen. 244-247 [doi]
• A novel neural oscillator and its implementation in analog VLSIQiang Luo, John G. Harris. 245-248 [doi]
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• On-chip automatic direct tuning circuitry based on the synchronous rectification scheme for CMOS gigahertz band front-end filtersYuyu Chang, Jack Wills, John Choma Jr.. 246-249 [doi]
• Scheduling tests for low power built-in self-testTobias Schüle, Albrecht P. Stroele. 247-250 [doi]
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• A compact multi-chip-module implementation of a multi-precision neural network classifierAmine Bermak, D. Martinez. 249-252 [doi]
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• An improved time-recursive lattice structure for low-latency IFFT architecture in DMT transmitterChi-Li Yu, An-Yeu Wu. 250-253 [doi]
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• Detection of calcifications in digitized mammograms using wavelet packet analysisWerapon Chiracharit, P. N. N. Ayudhya, Kosin Chamnongthai. 253-256 [doi]
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• Simple three oscillator universal probes for determining synchronization stability in coupled arrays of oscillatorsChai Wah Wu. 261-264 [doi]
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• Deriving accurate ASIC cell fault models for VITAL compliant VHDL simulationDonald B. Shaw, Dhamin Al-Khalili, Come Rozon. 263-266 [doi]
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• A CMOS clock and data recovery with two-XOR phase-frequency detector circuitJin-Ku Kang, Dong-Hee Kim. 266-269 [doi]
• Design trade-off in merged DRAM logic for video signal processingSunho Chang, Lee-Sup Kim. 267-270 [doi]
• Analysis of partial constant return map from controlled manifold piecewise linear chaotic circuitsK. Suzuki, T. Tsubone, T. Saito. 269-272 [doi]
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• A novel structure for portable digitally controlled oscillatorJin-Jer Jong, Chen-Yi Lee. 272-275 [doi]
• Property of the double heteroclinic tangency crisis in a forced PLL equationW. Ohno, T. Endo. 273-276 [doi]
• A MEMS implementation of an acoustical sensor arraySazzadur Chowdhury, Majid Ahmadi, Graham A. Jullien, William C. Miller. 273-276 [doi]
• Shared memory switching + virtual output queuing: A robust and scalable switchRonald P. Luijten, Antonius P. J. Engbersen, Cyriel Minkenberg. 274-277 [doi]
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• Low-power design of low-voltage current-mode integrators for continuous-time Sigma-Delta modulatorsHassan Aboushady, Marie-Minerve Louërat. 276-279 [doi]
• Frequency hysteresis phenomena in the frequency switched Chua s circuitLuigi Fortuna, Mattia Frasca, Alessandro Rizzo. 277-280 [doi]
• Signal conditioning for Fabry-Perot sensorShahrokh Ahmadi, Mona E. Zaghloul. 277-280 [doi]
• VLSI considerations in the design of k-ary n-cube interconnection networksMostafa I. Abd-El-Barr, C. Sundarram, A. S. Almulhem. 278-281 [doi]
• The advantages of multiprocessor systems for ACEIT and ICEIT inverse problem solutionM. Kacarska, S. Loskovska, D. Andonov. 279-282 [doi]
• Multibit Sigma-Delta ADC with mixed-mode DAC error correctionPeter Kiss, Un-Ku Moon, Jesper Steensgaard, John T. Stonick, Gabor C. Temes. 280-283 [doi]
• Bifurcation analysis in hybrid nonlinear dynamical systemsTakuji Kousaka, M. Matsumoto, Tetsushi Ueta, Hiroshi Kawakami, M. Abe. 281-284 [doi]
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• Phase tracking of CDMA spreading sequences using dynamic chaotic synchronizationDi He, Chen He, Ling-ge Jiang, Hong-Wen Zhu, Guang-Rui Hu. 282-285 [doi]
• An integrated H.263 video CODEC with protocol processorK. A. Jung, Y. S. Lee, H. S. Yang, W. S. Yang, J. H. Kim, S.-H. Lee, B. H. Kang. 283-286 [doi]
• Noise-reducing loop in multi-bit Sigma-Delta modulatorsZhenghong Wang, Xieting Ling. 284-287 [doi]
• Bifurcation in coupled BVP neurons with external impulsive forcesHiroyuki Kitajima, Hiroshi Kawakami. 285-288 [doi]
• Current mode realization of ear-type multisensorsM. T. Moskowitz, Louiza Sellami, Robert W. Newcomb, V. Rodellar. 285-288 [doi]
• Adaptive interference suppression with power control for CDMA systemsChin-Liang Wang, Ming-Hung Li, Kuo-Ming Wu, Kwei-Liang Hwang. 286-289 [doi]
• Intermediate view synthesis from binocular images for stereoscopic applicationsWen-Nung Lie, Bo-Er Wei. 287-290 [doi]
• Clock jitter effect in continuous-time oversampling convertersOmid Oliaei. 288-291 [doi]
• Frequency-domain steering for negative beamformers in speech enhancement and directional source separationP. Gómez, A. Alvarez, R. Martínez, V. Nieto, V. Rodellar. 289-292 [doi]
• Very low voltage power conversionM. Shepard, R. C. Williamson. 289-292 [doi]
• Numerical word-length optimization for CDMA demodulatorKyungtae Han, Iksu Eo, Kyungsu Kim, Hanjin Cho. 290-293 [doi]
• Using granulometries in processing images of malarial bloodAndrew G. Dempster, Cecilia Di Ruberto. 291-294 [doi]
• Continuous-time sigma-delta modulator with an arbitrary feedback waveformOmid Oliaei. 292-295 [doi]
• Switched-capacitor power converters with integrated low dropout regulatorsWei Chen, Wing-Hung Ki, Philip K. T. Mok, Mansun Chan. 293-296 [doi]
• Optimum discrete coefficient realization of FIR filtersWei-Yong Yan, Kok Lay Teo. 293-296 [doi]
• New AFC algorithm for a fully-digital MDPSK DS/CDMA receiverJing Lei, Tung-Sang Ng. 294-297 [doi]
• Efficient multiview image compression using quadtree disparity estimationD. R. Clewer, L. J. Luo, Cedric Nishan Canagarajah, David R. Bull, M. H. Barton. 295-298 [doi]
• A micro-power low noise log-domain amplifier for the sensing chain of a cardiac pacemakerAndrea Gerosa, Arianna Novo, A. Mengalli, Andrea Neviani. 296-299 [doi]
• Design of FIR filters with discrete coefficients: a semidefinite programming relaxation approachW.-S. Lu. 297-300 [doi]
• On the use of pseudo-coevolutionary genetic algorithms with adaptive migration for design of power electronics regulatorsJun Zhang, Angus K. M. Wu, Henry Shu-Hung Chung. 297-300 [doi]
• A near-optimal multiuser detector for CDMA channels using semidefinite programming relaxationX. M. Wang, Wu-Sheng Lu, Andreas Antoniou. 298-301 [doi]
• An embedded wavelet-based quadtree interframe coding algorithmLizhong Peng, Minghui Wang. 299-302 [doi]
• A CMOS OTA free from second order effects with a high input resistance Gm control terminalE. Ibaragi, S. Nishioka, Akira Hyogo, Keitaro Sekine. 300-303 [doi]
• Single-inductor multiple-output switching converters with bipolar outputsDongsheng Ma, Wing-Hung Ki, Philip K. T. Mok, Chi-Ying Tsui. 301-304 [doi]
• A study of SPT-term distribution of CSD numbers and its application for designing fixed-point linear phase FIR filtersChia-Yu Yao. 301-304 [doi]
• Customizable DSP architecture for ASIP core designY. Bajot, H. Mehrez. 302-305 [doi]
• Wireless video conferencing using multiple description codingAnshul Sehgal, Ashish Jagmohan, Narendra Ahuja. 303-306 [doi]
• CMOS transimpedance amplifier for DVD applicationsWen-Chi Wu, Chih-Chien Huang, Nai-Heng Tseng. 304-307 [doi]
• A new electrothermal dynamic macromodel of the power Darlington transistor for SPICEJanusz Zarebski. 305-308 [doi]
• Tradeoffs between residue number system and traditional FIR filtersAlberto Nannarelli, Marco Re, Gian-Carlo Cardarilli. 305-308 [doi]
• Register-based multi-port perfect shuffle networksT. S. Jarvinen, J. H. Takala, David Akopian, J. P. P. Saarinen. 306-309 [doi]
• Open ended dynamic ramping simulation of multi-discipline systemsLeonid B. Goldgeisser, Ernst Christen, Milan Vlach, Joachim Langenwalter. 307-310 [doi]
• Reversed nested Miller compensation with current followerRosario Mita, Gaetano Palumbo, Salvatore Pennisi. 308-311 [doi]
• Extended dimensional threshold filtering-a bridge between FIR filter and median type filterM. Kaneko, Y. Maekawa. 309-312 [doi]
• Chaos based modulations from an information theory perspectiveThomas Schimming. 309-312 [doi]
• Self-reorganising systems on VLSI circuitsHiroshi Nakada, Hideyuki Ito, Ryusuke Konishi, Akira Nagoya, Kiyoshi Oguri, Tsunemichi Shiozawa, Norbert Imlig. 310-313 [doi]
• A statistical methodology for the design of high-performance current steering DAC sPaolo Crippa, Massimo Conti, Claudio Turchetti. 311-314 [doi]
• Low-voltage continuous-time CMOS current amplifier with dynamic biasingGiovanni Palmisano, Salvatore Pennisi. 312-315 [doi]
• Quadrature chaos shift keyingZbigniew Galias, Gian Mario Maggio. 313-316 [doi]
• An integral image and text processing system for automatic generation of 3D sign-language animationsT. Ozawa. 313-316 [doi]
• A reconfigurable pipelined data converterS. Mortezapour, E. K. F. Lee. 314-317 [doi]
• On methods for ordering sparse matrices in circuit simulationG. Reissig. 315-318 [doi]
• A 2.7 V CMOS dual-mode baseband filter for GSM and WCDMAT. Hollman, Saska Lindfors, Teemu Salo, M. Lansirinne, Kari Halonen. 316-319 [doi]
• Arbitrarily scalable edge-preserving interpolation for 3-D graphics and video resizingYuan-Chung Lee, Chein-Wei Jen. 317-320 [doi]
• A multiple access technique for differential chaos shift keyingFrancis Chi-Moon Lau, M. M. Yip, C. K. Tse, S. F. Hau. 317-320 [doi]
• Novel radix-2k division algorithmA. E. Bashagha. 318-321 [doi]
• Top-down analog design methodology using Matlab and SimulinkN. Chandra, Gordon W. Roberts. 319-322 [doi]
• A high-speed frequency up-translated SC bandpass filter with auto-zeroing for DDFS systemsSeng-Pan U., Rui Paulo Martins, José E. Franca. 320-323 [doi]
• Cryptosystems based on space-discretization of chaotic mapsNaoki Masuda, Kazuyuki Aihara. 321-324 [doi]
• Shot classification for hard transitionWei Jyh Heng, King Ngi Ngan. 321-324 [doi]
• A parallel architecture for estimating 4th-order cumulantsJ. G. Lim, C. C. Lim. 322-325 [doi]
• Study and behavioural simulation of phase noise and jitter in oscillatorsAhmed Fakhfakh, N. Milet-Lewis, Yann Deval, H. Levi. 323-326 [doi]
• MMIC active floating gyrator design and accurate modellingGianfranco Avitabile, B. Chellini, G. Fedi, Antonio Luchetta, Stefano Manetti. 324-327 [doi]
• Monolithic chaotic communications systemP. Chiang, William J. Dally, E. Lee. 325-328 [doi]
• 3D talking head customization by adapting a generic model to one uncalibrated pictureAna C. Andrés del Valle, Jörn Ostermann. 325-328 [doi]
• Error resilient hybrid variable length codec with tough error synchronization for wireless image transmissionYew-San Lee, Cheng-Mou Yu, Chen-Yi Lee. 326-329 [doi]
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• A three-stage coupled ring oscillator with quadrature outputsA. Rezayee, K. Martin. 484-487 [doi]
• Hardware implementation of a CNN for analog simulation of reaction-diffusion equationsV. Bonaiuto, A. Maffucci, G. Miano, M. Salerno, F. Sargeni, P. Serra, C. Visone. 485-488 [doi]
• Compactly supported matrix valued wavelets-biorthogonal unconditional basesKonstantinos Slavakis, Isao Yamada. 485-488 [doi]
• A system-on-chip realization of a CMOS image sensor with programmable analog image preprocessingStefan Getzlaff, Jörg Schreiter, Achim Graupner, René Schüffny. 486-489 [doi]
• Parasitic extraction: current state of the art and future trendsW. H. Kao, Ch-Yuan Lo, R. Singh, M. Basel. 487-490 [doi]
• Monolithic tunable capacitors for RF applicationsKari Stadius, Risto Kaunisto, Veikko Porra. 488-491 [doi]
• Balanced spatial and frequency localised 2-D nonseparable wavelet filtersDavid B. H. Tay. 489-492 [doi]
• Hopfield networks with an infinite number of cellsB. D. Calvert. 489-492 [doi]
• An analogue SIMD focal-plane processor arrayPiotr Dudek, P. J. Hicks. 490-493 [doi]
• A novel subcircuit extraction algorithm by recursive identification schemeWei-Hsin Chang, Shuenn-Der Tzeng, Chen-Yi Lee. 491-494 [doi]
• Area efficient CMOS charge pump circuitsR. Perigny, Un-Ku Moon, Gabor C. Temes. 492-495 [doi]
• A robust and efficient universal CNN cell circuit using simplicial neuro-fuzzy inferences for fast image processingRadu Dogaru, Pedro Julián, Leon O. Chua. 493-496 [doi]
• Design of non-linear multi-resolution decompositions with applications to image compressionEduardo Cardoso Jr., Eduardo A. B. da Silva. 493-496 [doi]
• Low power techniques for flash memoriesRoberto Canegallo, D. Dozza, Roberto Guerrieri. 494-497 [doi]
• Trapezoid-to-simple polygon recomposition for resistance extractionQ. Li, Sung-Mo Kang. 495-498 [doi]
• Analog current-mode implementation of a one-cycle integrated controller for switching power convertersEduard Alarcón, Alberto Poveda, Eva Vidal, Herminio Martínez. 496-499 [doi]
• Discrete time analog polynomial type CNN with digital stateMika Laiho, Ari Paasio, Asko Kananen, Kari Halonen. 497-500 [doi]
• Stability of 2-D distributed processes with time-variant communication delaysPeter H. Bauer, Mihail L. Sichitiu, Kamal Premaratne. 497-500 [doi]
• Development of a low-power SRAM compilerM. Jagasivamani, Dong Sam Ha. 498-501 [doi]
• ESD design rule checkerQ. Li, Yoonjong Huh, Jau-Wen Chen, Peter Bendix, Sung-Mo Kang. 499-502 [doi]
• Sliding-mode control analog integrated circuit for switching DC-DC power convertersEduard Alarcón, A. Romero, Alberto Poveda, Sonia Porta, Luis Martinez-Salamero. 500-503 [doi]
• A dual pixel-type imager for imaging and motion centroid localizationMatthew A. Clapp, Ralph Etienne-Cummings. 501-504 [doi]
• Statistical sensitivity and minimum sensitivity structures of 2-D separable-denominator digital filtersS. Saito, M. Kawamata. 501-504 [doi]
• Fast system-level exploration of memory architectures driven by energy-delay metricsWilliam Fornaciari, Donatella Sciuto, Cristina Silvano, Vittorio Zaccaria. 502-505 [doi]
• Full chip ESD design rule checkingQ. Li, Yoonjong Huh, Jau-Wen Chen, Peter Bendix, Sung-Mo Kang. 503-506 [doi]
• New four-phase generation circuits for low-voltage charge pumpsHongchin Lin, Nai-Hsien Chen. 504-507 [doi]
• Low-bit motion estimation with edge enhanced images for lowpower MPEG encoderAyuko Takagi, Kiyoshi Nishikawa, Hitoshi Kiya. 505-508 [doi]
• High dynamic range, arbitrated address event representation digital imagerEugenio Culurciello, Ralph Etienne-Cummings, Kwabena Boahen. 505-508 [doi]
• Static power consumption management in CMOS memoriesA. Turier, L. Ben Ammar, Amara Amara. 506-509 [doi]
• Cycle-true leakage current modeling for CMOS gatesDaniel Eckerbert, Per Larsson-Edefors. 507-510 [doi]
• Capacitive voltage multipliers: a high efficiency method to generate multiple on-chip supply voltagesR. Balczewski, Ramesh Harjani. 508-511 [doi]
• Image restoration of JPEG coded images using mean removed classified vector quantizationYi-Ching Liaw, Winston Lo, Jim Z. C. Lai. 509-512 [doi]
• On-chip compensation of dark current in infrared focal plane arraysM. W. Ng, Y. H. Chee, Y. P. Xu, G. Karunasiri. 509-512 [doi]
• A low power charge-recycling ROM architectureByung-Do Yang, Lee-Sup Kim. 510-513 [doi]
• A novel physical based model of deep-submicron CMOS transistors mismatch for Monte Carlo SPICE simulationA. Maxim, M. Gheorghe. 511-514 [doi]
• Clock-jitter induced distortion in high speed CMOS switched-current segmented digital-to-analog convertersJosé Luis González, Eduard Alarcón. 512-515 [doi]
• Resource management of task oriented distributed sensor networksJ. Zhang, E. C. Kulasekere, Kamal Premaratne, Peter H. Bauer. 513-516 [doi]
• Error bounds for error diffusion and related digital halftoning algorithmsRoy L. Adler, Bruce Kitchens, Marco Martens, A. Nogueira, Charles Philippe Tresser, Chai Wah Wu. 513-516 [doi]
• Public-domain Matlab program to generate highly optimized VHDL for FPGA implementationKah-Howe Tan, Wen-Fung Leong, S. Kadam, Michael A. Soderstrand, Louis G. Johnson. 514-517 [doi]
• Implementation of hot-carrier reliability simulation in EldoMedhat Karam, Wael Fikry, Hisham Haddara, Hani Ragai. 515-518 [doi]
• High-resolution mismatch-shaping digital-to-analog convertersJesper Steensgaard. 516-519 [doi]
• Digital halftoning with optimized dither arrayY. Abe. 517-520 [doi]
• Magnetically-coupled tuneable inductor for wide-band variable frequency oscillatorsApisak Worapishet, S. Ninyawee. 517-520 [doi]
• Hardware implementation of the depth first search bit stream SPIHT systemLi-minn Ang, Hon Nin Cheung. 518-521 [doi]
• Low power driven re-synthesis algorithm for heterogeneous FPGA under delay constraintPo-Xun Chiu, Yu-Chung Lin, Yi-Ling Hsieh, Tsai-Ming Hsieh. 519-522 [doi]
• Segmented sine wave digital-to-analog converters for frequency synthesizerJiandong Jiang, E. K. F. Lee. 520-523 [doi]
• Frequency domain chaotic watermarkingAlessandra Giovanardi, Gianluca Mazzini. 521-524 [doi]
• An efficient algorithm for the formulation of state equations and output equations for networks with ideal switchesA. Massarini, U. Reggiani. 521-524 [doi]
• A low complexity FEC design for DABJu Byoung Kim, Young Jin Lim, Moon Ho Lee. 522-525 [doi]
• Synthesis of partition-codec architecture for low power and small area circuit designShanq-Jang Ruan, Jen-Chiun Lin, Po-Hung Chen, Kun-Lin Tsai, Feipei Lai. 523-526 [doi]
• Design of encoders for linear-coded D/A convertersMark Vesterbacka, J. Jacob Wikner. 524-527 [doi]
• Haar state equations for power electronics system modelingA. Gandelli, S. Leva. 525-528 [doi]
• Multi-wavelets from spline super-functions with approximation orderHüseyin Özkaramanli, Asim Bhatti, Bulent Bilgehan. 525-528 [doi]
• A microprocessor based system for ECG telemedicine and telecareS. L. Toral, J. M. Quero, M. E. Perez, Leopoldo García Franquelo. 526-529 [doi]
• Efficient computation of the area/power consumption versus delay tradeoff curve for circuit critical path optimizationJ. Sosa, Juan A. Montiel-Nelson, Saeid Nooshabadi. 527-530 [doi]
• An 8-bit 200 MSPS CMOS A/D converter for analog interface module of TFT-LCD driverSamgsuk Kim, Minkyu Song. 528-531 [doi]
• Efficient VLSI architectures for the biorthogonal wavelet transform by filter bank and lifting schemeJer Min Jou, Yeu-Horng Shiau, Chin-Chi Liu. 529-532 [doi]
• Compact DC/AC inverter for large electroluminescent lampItsda Boonyaroonate, S. Mori. 529-532 [doi]
• SIMD architecture for job shop scheduling problem solvingKuan-Hung Chen, Shi-Chung Chang, Tzi-Dar Chiueh, Peter B. Luh, Xing Zhao. 530-533 [doi]
• Fast low-power characterization of arithmetic units in DSM CMOSImed Ben Dhaou, N. Money, Hannu Tenhunen. 531-534 [doi]
• Understanding Wilson current mirror via the negative feedback approachJirayuth Mahattanakul, Sitthichai Pookaiyaudom, Chris Toumazou. 532-535 [doi]
• Power losses and efficiency of class E RF power amplifiers at any duty cycleD. J. Kessler, Marian K. Kazimierczuk. 533-536 [doi]
• Tree-structured IIR/FIR octave-band filter banks with very low-complexity analysis filtersElizabeth Elias, Per Löwenborg, Håkan Johansson, Lars Wanhammar. 533-536 [doi]
• A hardware design approach for merge-sorting networkChun-Yueh Huang, Gwo-Jeng Yu, Bin-Da Liu. 534-537 [doi]
• An optimization-based low-power voltage scaling technique using multiple supply voltagesYi-Jong Yeh, Sy-Yen Kuo. 535-538 [doi]
• Current mirror circuit with accurate mirror gain for low beta transistorsHuiting Chen, F. Whiteside, Randall L. Geiger. 536-539 [doi]
• Auditory filter bank inversionL. Lin, W. H. Holmes, Eliathamby Ambikairajah. 537-540 [doi]
• Buck PWM DC-DC converter with reference-voltage-modulation feedforward controlMarian K. Kazimierczuk, A. J. Edstrom, Alberto Reatti. 537-540 [doi]
• A low power asynchronous DESPui-Lam Siu, Chiu-sing Choy, Jan Butas, Cheong-fat Chan. 538-541 [doi]
• Generalized chopper stabilizationL. Toth, Yannis P. Tsividis. 540-543 [doi]
• A nonuniform filterbank structure for channel precodingC. W. Kok, Yingbo Hua, J. H. Manton. 541-544 [doi]
• Making a stable discrete-time system chaotic via small-amplitude output feedbackXiao Fan Wang, Guanrong Chen, Kim-Fung Man. 541-544 [doi]
• Reconfigurable and programmable minimum distance search engine for portable video compression systemsChang-Ki Kwon, Kwyro Lee. 542-545 [doi]
• Low power current comparator cell for weak current operationsChunyan Wang, M. Omair Ahmad, M. N. S. Swamy. 544-547 [doi]
• Non-singular terminal sliding mode control and its application for robot manipulatorsYong Feng, Xinghuo Yu, Zhihong Man. 545-548 [doi]
• A novel local state-space model for 2-D digital filters and its propertiesTakao Hinamoto. 545-548 [doi]
• A flexible multiplication unit for an FPGA logic blockK. Rajagopalan, P. Sutton. 546-549 [doi]
• Active guard band circuit for substrate noise suppressionShigetaka Takagi, N. R. Agung, Kazuyuki Wada, Nobuo Fujii. 548-551 [doi]
• Design of 2-D FIR filters with power-of-two coefficients: a semidefinite programming relaxation approachW.-S. Lu. 549-552 [doi]
• Chaos reproduction by dynamic neural networks: an inverse optimal control approachEdgar N. Sanchez, J. P. Perez, Guanrong Chen. 549-552 [doi]
• A retiming-based test pattern generator design for built-in self test of data path architecturesAiman H. El-Maleh, Yahya E. Osais. 550-553 [doi]
• Non-ideal amplifier effects on the accuracy of analog-to-digital capacitor ratio converterWooyoung Choi, Ramesh Harjani, Bapiraju Vinnakota. 552-555 [doi]
• Modal factorization of time-varying models for nonlinear circuits by the Riccati transformP. van der Kloet, F. L. Neerhoff. 553-556 [doi]
• A new method for the design of stable IIR 2-D digital filters using sequential semidefinite programmingWu-Sheng Lu, Andreas Antoniou. 553-556 [doi]
• Hybrid wavelet/spread-spectrum system for broadband wireless LANsV. K. Jain. 554-557 [doi]
• Stabilizing the transconductance in CMOS transconductors for application in gm-C filters556-559 [doi]
• Multi-stage approach for the design of 2-D half-band filters using the frequency response masking techniqueSeo-How Low, Yong Ching Lim. 557-560 [doi]
• Robust stability of a class of nonlinear time-varying discrete systemsDerong Liu, A. Molchanov. 557-560 [doi]
• Design of an OFDM receiver for high-speed wireless LANChien-Fang Hsu, Yuan-Hao Huang, Tzi-Dar Chiueh. 558-561 [doi]
• High-gain common-mode feedback circuits for differential log-domain filtersRobert M. Fox, H. J. Ko, William R. Eisenstadt. 560-563 [doi]
• An analog similarity evaluation circuit featuring variable functional formsT. Yamasaki, T. Shibata. 561-564 [doi]
• Efficient 1D and circular symmetric 2D FIR filters with variable cutoff frequencies using the Farrow structure and multiplier-blockC. K. S. Pun, Shing-Chow Chan, Ka-Leung Ho. 561-564 [doi]
• Peak-to-average power ratio reduction of an OFDM signal using data permutation with embedded side informationA. Dhammika S. Jayalath, Chintha Tellambura. 562-565 [doi]
• Two floating resistor circuits and their applications to synaptic weights in analog neural networksS. Tantry, T. Yoneyama, H. Asai. 564-567 [doi]
• Hardware combinatorial optimization problems solver by hysteresis neural networksT. Nakaguchi, K. Jin no, M. Tanaka. 565-568 [doi]
• Design of digital filters with general hardware constraints by mean field annealingPer Persson, Sven Nordebo, Ingvar Claesson. 565-568 [doi]
• Forward error correction codes to reduce intercarrier interference in OFDMK. Sathananathan, Chintha Tellambura. 566-569 [doi]
• Correction of operational amplifier gain error in pipelined A/D convertersA. M. A. Ali, K. Nagaraj. 568-571 [doi]
• Digital pulse mode neural network with simple synapse multiplierH. Hikawa. 569-572 [doi]
• An FPGA based Walsh Hadamard transformsAbbes Amira, Ahmed Bouridane, Peter Milligan. 569-572 [doi]
• Blind frequency offset estimation for PCC-OFDM with symbols overlapped in the time domainJinwen Shentu, J. Armstrong. 570-573 [doi]
• A low voltage 8-bit, 40 MS/s switched-current pipeline analog-to-digital converterJ. B. Hughes, M. Mec, W. Donaldson. 572-575 [doi]
• A programmable on-chip BP learning neural network with enhanced neuron characteristicsChun Lu, Bingxue Shi, Lu Chen. 573-576 [doi]
• Sampling-rate optimization of an interleaved-sampling front-endH. O. Johansson, M. Horowitz. 573-576 [doi]
• Custom VLSI design of efficient low latency and low power finite field multiplier for Reed-Solomon codecLijun Gao, Keshab K. Parhi. 574-577 [doi]
• A 10-bit, 2.5-V, 40 M sample/s, pipelined analog-to-digital converter in 0.6-um CMOSBabak Nejati, Omid Shoaei. 576-579 [doi]
• Rapid prototyping of orthonormal wavelet transforms on FPGAsMokhtar Nibouche, Ahmed Bouridane, Omar Nibouche, Danny Crookes. 577-580 [doi]
• A neural architecture for the parameter extraction of high frequency devices [MMICs]Gianfranco Avitabile, B. Chellini, G. Fedi, Antonio Luchetta, Stefano Manetti. 577-580 [doi]
• New bit-parallel systolic multipliers for a class of GF(2m)Chiou-Yng Lee, Erl-Huei Lu, Jau-Yien Lee. 578-581 [doi]
• A low power 10 bit, 80 MS/s CMOS pipelined ADC at 1.8 V power supplyYong-In Park, S. Karthikeyan, F. Tsay, E. Bartolome. 580-583 [doi]
• Fast iris detection for personal identification using modular neural networksHazem M. El-Bakry. 581-584 [doi]
• An efficient 0-1 linear programming for optimal PLA foldingKaamran Raahemifar, J. Ahmadi. 581-584 [doi]
• A low-power variable length decoder based on successive decoding of shoft codewordsSung-Won Lee, In-Cheol Park. 582-585 [doi]
• A single-amplifier 6-bit CMOS pipeline A/D converter for WCDMA receiversLauri Sumanen, Kari Halonen. 584-587 [doi]
• A novel method for discrete fractional Fourier transform computationSoo-Chang Pei, Min-Hung Yeh. 585-588 [doi]
• Further results on the global asymptotic stability of neural networksSabri Arik, Vedat Tavsanoglu. 585-588 [doi]
• Bit-level pipelined digit serial GF(2m) multiplierMohammad K. Ibrahim, A. Almulhem. 586-589 [doi]
• Algorithmic s-z transformations for continuous-time to discrete-time filter conversionDalibor Biolek, Viera Biolkova. 588-590 [doi]
• Real-valued discrete Gabor transform for image representationLiang Tao, Hon Keung Kwan. 589-592 [doi]
• On the stability of bilayer associative memoriesT. Sakaue, M. Matsuzaki, M. Miyata. 589-591 [doi]
• Multi-level low swing voltage values for low power design applicationsAbdoul Rjoub, M. Alrousan, O. Jarrah, Odysseas G. Koufopavlou. 590-593 [doi]
• Energy conservation in a circuit with single electron tunnel junctionsR. H. Klunder, J. Hoekstra. 591-594 [doi]
• Principal component analysis for classifying passive sonar signals