S. Ramesh - researchr profile publications

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Publications with a 'S. Ramesh' as author, editor, or advisor:

Static slicing of reactive programsKulkarni, A.R., Ramesh, S.. In Source Code Analysis and Manipulation, 2003. Proceedings. Third IEEE International Workshop on. 2003:
Languages for Reactive Specifications: Synchrony Vs AsynchronyR. K. Shyamasundar, S. Ramesh. ftrtft 1994: 621-640
Reliability of Mo as Word Line Metal in 3D NANDDavide Tierno, Kristof Croes, A. Ajaykumar, S. Ramesh, G. Van den bosch, M. Rosmeulen. irps 2021: 1-6 [doi]
When to stop verification?: Statistical trade-off between expected loss and simulation costSumit Kumar Jha, Christopher James Langmead, Swarup Mohalik, S. Ramesh. date 2011: 1309-1314 [doi]
A conceptual model for unifying variability in space and timeSofia Ananieva, Sandra Greiner, Thomas Kühn 0001, Jacob Krüger, Lukas Linsbauer, Sten Grüner, Timo Kehrer, Heiko Klare, Anne Koziolek, Henrik Lönn, Sebastian Krieter, Christoph Seidl 0001, S. Ramesh, Ralf H. Reussner, Bernhard Westfechtel. SPLC 2020: [doi]
Scenario-based verification in presence of variability using a synchronous approachJean-Vivien Millo, Frédéric Mallet, Anthony Coadou, S. Ramesh. fcsc, 7(5):650-672, 2013. [doi]
Automated Component Adaptation by Forced SimulationPartha S. Roop, Arcot Sowmya, S. Ramesh. APCSAC 2000: 74-81 [doi]
Management of QoS-oriented Adaptation in Automobile Cruise Control SystemsArun Adiththan, Kaliappa Ravindran, S. Ramesh. icac 2017: 79-80 [doi]
Towards a conceptual model for unifying variability in space and timeSofia Ananieva, Timo Kehrer, Heiko Klare, Anne Koziolek, Henrik Lönn, S. Ramesh, Andreas Burger, Gabriele Taentzer, Bernhard Westfechtel. SPLC 2019: [doi]
Automatic Component Matching Using Forced SimulationPartha S. Roop, Arcot Sowmya, S. Ramesh. vlsid 2000: 64-69 [doi]
Radio channel characteristics in an indoor corridor environment at 60 GHz for wireless networksT. Rama Rao, D. Murugesan, S. Ramesh, Vladimir A. Labay. IEEEants 2011: 1-5 [doi]
Trustworthy Cyber Physical SystemsAnuradha Annaswamy, Samarjit Chakraborty, Dip Goswami, S. Ramesh, Marilyn Wolf. vlsid 2016: 19-20 [doi]
Pointer Analysis of Multithreaded Java ProgramsMangala Gowri Nanda, S. Ramesh. SAC 2003: 1068-1075
Slicing concurrent programsMangala Gowri Nanda, S. Ramesh. ISSTA 2000: 180-190 [doi]
Vehicular network energy storage system with renewable analysis using deep learning architecturesS. Ramesh, T. Manikandan, R. Gnanajeyaraman, U. Arul, G. Michael, A. Selvakumar. cee, 110:108801, September 2023. [doi]
A Method and Tool for Test Optimization for Automotive ControllersAlexandre Petrenko, Arnaud Dury, S. Ramesh, Swarup Mohalik. icst 2013: 198-207 [doi]
Scalable model-checking for precise end-to-end latency computationSwarup Mohalik, Devesh B. Chokshi, Manoj G. Dixit, A. C. Rajeev, S. Ramesh. cacsd 2013: 19-24 [doi]
Impact of Interconnect Process Variations on Memory Performance and DesignAndres Teene, Bob Davis, R. Castagnetti, J. Brown, S. Ramesh. isqed 2005: 694-699 [doi]
k-time Forced Simulation: A Formal Verification Technique for IP ReusePartha S. Roop, Arcot Sowmya, S. Ramesh. iccd 2002: 50-55 [doi]
Taming the component timing: A CBD methodology for real-time embedded systemsManoj G. Dixit, Pallab Dasgupta, S. Ramesh. date 2010: 1649-1652 [doi]
Building an interactive test development environment for cyclic executive systemsGuillaume Langelier, Arnaud Dury, Alexandre Petrenko, S. Ramesh, Tameem Assaf. sies 2015: 127-135 [doi]
Autonomy-driven Emerging Directions in Software-defined VehiclesUnmesh D. Bordoloi, Samarjit Chakraborty, Markus Jochim, Prachi Joshi, Arvind Raghuraman, S. Ramesh. date 2023: 1-6 [doi]
Best Effort Session-Level Congestion ControlS. Ramesh, Sneha Kumar Kasera. icnp 2007: 236-245 [doi]
Verifying timing synchronization constraints in distributed embedded architecturesA. C. Rajeev, Swarup Mohalik, S. Ramesh. date 2012: 200-205 [doi]
Technologies for Safe and Intelligent Transportation SystemsSamarjit Chakraborty, S. Ramesh. vlsid 2016: 56-58 [doi]
Resolving uncertainty in automotive feature interactionsSilky Arora, Prahladavaradan Sampath, S. Ramesh. RE 2012: 21-30 [doi]
A Test Bed for Web Services ProtocolsPemadeep Ramsokul, Arcot Sowmya, S. Ramesh. aict 2007: 16 [doi]
Formal Modeling and Verification of a Victim DRAM CacheDebiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, S. Ramesh, Partha S. Roop. todaes, 24(2), 2019. [doi]
Efficient Translation of Statecharts to Hardware CircuitsS. Ramesh. vlsid 1999: 384-389 [doi]
A framework for mining hybrid automata from input/output tracesRamy Medhat, S. Ramesh, Borzoo Bonakdarpour, Sebastian Fischmeister. emsoft 2015: 177-186 [doi]
Power & variability test chip architecture and 45nm-generation silicon-based analysis for robust, power-aware SoC designR. Venkatraman, R. Castagnetti, Andres Teene, Benjamin Mbouombouo, S. Ramesh. isqed 2009: 27-32 [doi]
Application of modified NSGA-II algorithm to multi-objective reactive power planningS. Ramesh, S. Kannan, S. Baskar. asc, 12(2):741-753, 2012. [doi]
Schedulability and end-to-end latency in distributed ECU networks: formal modeling and precise estimationA. C. Rajeev, Swarup Mohalik, Manoj G. Dixit, Devesh B. Chokshi, S. Ramesh. emsoft 2010: 129-138 [doi]
Formal Modeling and Verification of Controllers for a Family of DRAM CachesDebiprasanna Sahoo, Swaraj Sha, Manoranjan Satpathy, Madhu Mutyam, S. Ramesh, Partha S. Roop. tcad, 37(11):2485-2496, 2018. [doi]
An Efficient Secure Routing for Intermittently Connected Mobile NetworksS. Ramesh. wpc, 94(4):2705-2718, 2017. [doi]
Multiple Mutation Testing from Finite State Machines with Symbolic InputsOmer Nguena-Timo, Alexandre Petrenko, S. Ramesh. pts 2017: 108-125 [doi]
Relating Requirement and Design VariabilitiesJean-Vivien Millo, S. Ramesh. apsec 2012: 35-42 [doi]
A Tool-Suite for Reachability Analysis of Concurrent Object-Oriented ProgramsSridhar Iyer, S. Ramesh. apsec 1997: 160 [doi]
Automated Deformation Detection System for Tubes and Rods in Manufacturing Industries Using Quasi Digital SensorsKarthik Pandaram, V. Manikandan, S. Ramesh, M. Sivaramakrishna. iccsce 2019: 89-93 [doi]
SymTest: A Framework for Symbolic Testing of Embedded SoftwareSujit Chakrabarti, S. Ramesh. indiaSE 2016: 48-58 [doi]
Implementation of communicating reactive processesS. Ramesh. pc, 25(6):703-727, 1999.
On the Completeness of Modular Proof SystemsS. Ramesh. ipl, 36(4):195-201, 1990.
Traceability Analyses between Features and Assets in Software Product LinesGanesh Khandu Narwane, José A. Galindo, Shankara Narayanan Krishna, David Benavides, Jean-Vivien Millo, S. Ramesh. entropy, 18(8):269, 2016. [doi]
Advanced resilient data consigning mechanism for mobile adhoc networksK. Karthikeyan, S. Ramesh, Namaskaram Kirubakaran, P. Uma Maheswari, R. Arun Prasath, M. Muthukumar. jaihc, 12(3):4255-4268, 2021. [doi]
Model-based testing of automotive software: some challenges and solutionsAlexandre Petrenko, Omer Nguena-Timo, S. Ramesh. dac 2015: 118 [doi]
Design and Use of Memory-Specific Test Structures to Ensure SRAM Yield and ManufacturabilityF. Duan, R. Castagnetti, R. Venkatraman, O. Kobozeva, S. Ramesh. isqed 2003: 119-124 [doi]
The Statistics of Device Variations and its Impact on SRAM Bitcell Performance, Leakage and StabilityR. Venkatraman, R. Castagnetti, S. Ramesh. isqed 2006: 190-195 [doi]
Scenario-Based Specification of Automotive Requirements With Quantitative Constraints and Synthesis of SL/SF MonitorsSilky Arora, Ambar A. Gadkari, S. Ramesh. esl, 3(2):62-65, 2011. [doi]
Detection of Runtime Errors in MISRA C Programs: A Deductive ApproachAjith K. John, Babita Sharma, A. K. Bhattacharjee, S. D. Dhodapkar, S. Ramesh. safecomp 2007: 491-504 [doi]
Modeling AUTOSAR Implementations in SimulinkJian Chen, Manar H. Alalfi, Thomas R. Dean, S. Ramesh. ECMDA-FA 2018: 279-292 [doi]
Slicing Synchronous Reactive ProgramsVinod Ganapathy, S. Ramesh. ENTCS, 65(5):50-64, 2002. [doi]
Slicing tools for synchronous reactive programsS. Ramesh, Aditya Rajeev Kulkarni, V. Kamat. ISSTA 2004: 217-220 [doi]
Concurrent Logic Programming and pi CalculusSameer Mahajan, S. Ramesh. ICLP 1997: 411
A dynamic assertion-based verification platform for validation of UML designsAnsuman Banerjee, Sayak Ray, Pallab Dasgupta, P. P. Chakrabarti, S. Ramesh, P. Vignesh V. Ganesan. sigsoft, 37(1):1-14, 2012. [doi]
Bridge Over Troubled Wrappers: Automated Interface SynthesisVijay D Silva, S. Ramesh, Arcot Sowmya. vlsid 2004: 189-194 [doi]
Evolving specifications formallyPrahladavaradan Sampath, Silky Arora, S. Ramesh. RE 2011: 5-14 [doi]
Specification, Verification and Design of Evolving Automotive Software: InvitedS. Ramesh, Birgit Vogel-Heuser, Wanli Chang, Debayan Roy, Licong Zhang, Samarjit Chakraborty. dac 2017: [doi]
CESC: a visual formalism for specification and verification of SoCsAmbar A. Gadkari, S. Ramesh, Rubin A. Parekhji. glvlsi 2004: 354-357 [doi]
Design and Implementation of Three-Winding Coupled Inductor and Switched Capacitor-Based DC-DC Converter Fed PV-TDVRM. Kumar, S. Ramesh. jcsc, 28(9):1950158, 2019. [doi]
Fault model-driven testing from FSM with symbolic inputsOmer Nguena-Timo, Alexandre Petrenko, S. Ramesh. sqj, 27(2):501-527, 2019. [doi]
A New Efficient Implementation of CSP with Output GuardsS. Ramesh. icdcs 1987: 266-273
An Improved Multi Objective Mayfly Algorithm for Solving Optimal Power Flow Problem Considering Different Loading ConditionsS. Ramesh, K. Vijaya Bhaskar, K. Karunanithi, M. Ettappan, P. Chandrasekar, S. P. Raja. jcsc, 31(10), 2022. [doi]
Model-based analysis, synthesis and testing of automotive hardware/software architecturesSamarjit Chakraborty, S. Ramesh, Jürgen Teich. emsoft 2010: 299-300 [doi]
An MBSE Approach for Development of Resilient Automated Automotive SystemsJoseph D'Ambrosio, Arun Adiththan, Edwin Ordoukhanian, Prakash Peranandam, S. Ramesh, Azad M. Madni, Padma Sundaram. systems, 7(1):1, 2019. [doi]
Static Slicing of Reactive ProgramsAditya Rajeev Kulkarni, S. Ramesh. SCAM 2003: 98-107 [doi]
Power aware scalable multicast routing protocol for MANETsR. Manoharan, P. Thambidurai, S. Ramesh. ijcomsys, 19(10):1089-1101, 2006. [doi]
CGLive - A Real Time Power Monitoring Solution for EnterprisesG. Subrahmanya V. R. K. Rao, S. Ramesh, V. Arun Muthuraj, Karthik Sundararaman, Jinka Parthasarathi. greencom 2011: 212-215 [doi]
Segmentation and classification of brain tumors using modified median noise filter and deep learning approachesS. Ramesh, S. Sasikala, Nirmala Paramanandham. mta, 80(8):11789-11813, 2021. [doi]
Formal Analysis of Predictable Data Flow in Fault-Tolerant Multicore SystemsBoris Madzar, Jalil Boudjadar, Juergen Dingel, Thomas E. Fuhrman, S. Ramesh. facs2 2017: 153-171 [doi]
A novel subspace method for precise carrier frequency offset estimation in multicarrier modulation scheme under multiuser environmentS. Chitra, N. Kumaratharan, S. Ramesh. ijcomsys, 33(17), 2020. [doi]
Synthesis of Synchronous InterfacesPurandar Bhaduri, S. Ramesh. acsd 2006: 208-216 [doi]
Systematic Development of Control Designs via Formal RefinementManoranjan Satpathy, Colin F. Snook, Silky Arora, S. Ramesh, Michael Butler. modelsward 2013: 143-148 [doi]
Optimal reactive power dispatch for real power loss minimization and voltage stability enhancement using Artificial Bee Colony AlgorithmM. Ettappan, V. Vimala, S. Ramesh, V. Thiruppathy Kesavan. mam, 76:103085, 2020. [doi]
Integration of IoT and edge cloud computing for smart microgrid energy management in VANET using machine learningU. Arul, R. Gnanajeyaraman, A. Selvakumar, S. Ramesh, T. Manikandan, G. Michael. cee, 110:108905, September 2023. [doi]
Guest Editorial Special Section on Automotive Embedded Systems and SoftwareSamarjit Chakraborty, S. Ramesh. tcad, 34(11):1701-1703, 2015. [doi]
Automatic Testing from Formal SpecificationsManoranjan Satpathy, Michael J. Butler, Michael Leuschel, S. Ramesh. tap 2007: 95-113 [doi]
Supervisory control for real-time systems based on conflict-tolerant controllersDeepak D'Souza, Madhu Gopinathan, S. Ramesh, Prahladavaradan Sampath. case 2009: 555-560 [doi]
Model checking based analysis of end-to-end latency in embedded, real-time systems with clock driftsSwarup Mohalik, A. C. Rajeev, Manoj G. Dixit, S. Ramesh, P. Vijay Suman, Paritosh K. Pandya, Shengbing Jiang. dac 2008: 296-299 [doi]
A Software-Based Heuristic Clustered (SBHC) Architecture for the Performance Improvement in MANETS. Ramesh, S. Smys. wpc, 97(4):6343-6355, 2017. [doi]
A Direct Characterization of CompletionS. Ramesh, Bommadevara N. Srinivas. TCS, 154(2):379-385, 1996. [doi]
Checking Sequence Generation for Symbolic Input/Output FSMs by Constraint SolvingOmer Nguena-Timo, Alexandre Petrenko, S. Ramesh. ictac 2018: 354-375 [doi]
High-K incorporated in a SiON tunnel layer for 3D NAND programming voltage reductionL. Breuil, L. Nyns, S. Rachidi, K. Banerjee, Antonio Arreghini, J. Bastos, S. Ramesh, G. Van den bosch, Maarten Rosmeulen. imw2 2022: 1-4 [doi]
A Dynamic Assertion-Based Verification Platform for Validation of UML DesignsAnsuman Banerjee, Sayak Ray, Pallab Dasgupta, Partha Pratim Chakrabarti, S. Ramesh, P. Vignesh V. Ganesan. ATVA 2008: 222-227 [doi]
Foundations of Software Technology and Theoretical Computer Science, 17th Conference, Kharagpur, India, December 18-20, 1997, ProceedingsS. Ramesh, G. Sivakumar, editors, Volume 1346 of Lecture Notes in Computer Science, Springer, 1997.
Apportioning: a technique for efficient reachability analysis of concurrent object-oriented programsSridhar Iyer, S. Ramesh. hipc 1998: 124-131 [doi]
Efficient coverage of parallel and hierarchical stateflow models for test case generationManoranjan Satpathy, Anand Yeolekar, Prakash Peranandam, S. Ramesh. stvr, 22(7):457-479, 2012. [doi]
Functional Verification of System on Chips-Practices, Issues and Challenges (Tutorial Abstract)Subir K. Roy, S. Ramesh, Supratik Chakraborty, Tsuneo Nakata, Sreeranga P. Rajan. vlsid 2002: 11-13 [doi]
A Compositional Axiomatization of StatechartsJozef Hooman, S. Ramesh, Willem P. de Roever. TCS, 101(2):289-335, 1992.
Semantics and Verification of Hierarchical CRP ProgramsR. K. Shyamasundar, S. Ramesh. hybrid 1995: 436-461
Synchronous Paradigm in Embedded SystemsAlain Girault, S. Ramesh, Jean-Pierre Talpin. ejes, 2007, 2007. [doi]
Randomized directed testing (REDIRECT) for Simulink/Stateflow modelsManoranjan Satpathy, Anand Yeolekar, S. Ramesh. emsoft 2008: 217-226 [doi]
Using Imprecise Test Oracles Modelled by FSMOmer Nguena-Timo, Alexandre Petrenko, S. Ramesh. icst 2019: 32-39 [doi]
Optimization of Retention in Ferroelectricity Boosted Gate Stacks for 3D NANDLaurent Breuil, Mihaela Popovici, J. Stiers, Antonio Arreghini, S. Ramesh, G. Van den bosch, Jan Van Houdt, Maarten Rosmeulen. imw2 2023: 1-4 [doi]
Rigorous model-based design & verification flow for in-vehicle softwareS. Ramesh, Ambar A. Gadkari. dac 2011: 13-16 [doi]
Model-based development and verification of control software for electric vehiclesDip Goswami, Martin Lukasiewycz, Matthias Kauer, Sebastian Steinhorst, Alejandro Masrur, Samarjit Chakraborty, S. Ramesh. dac 2013: 96 [doi]
Formal Verification of Fault-Tolerant Startup Algorithms for Time-Triggered Architectures: A SurveyIndranil Saha, Suman Roy, S. Ramesh. pieee, 104(5):904-922, 2016. [doi]
Assertion checking environment (ACE) for formal verification of C programsBabita Sharma, S. D. Dhodapkar, S. Ramesh. ress, 81(3):281-290, 2003. [doi]
The Liveness Property of On-the-Fly Garbage Collector - A ProofS. Ramesh, S. L. Mehndiratta. ipl, 17(4):189-195, 1983.
Grid integration of renewable energy sources (RES) for power quality improvement using adaptive fuzzy logic controller based series hybrid active power filter (SHAPF)C. Pazhanimuthu, S. Ramesh. jifs, 35(1):749-766, 2018. [doi]
Visual Modeling and Verification of Distributed Reactive SystemsA. Iqbal, A. K. Bhattacharjee, S. D. Dhodapkar, S. Ramesh. safecomp 2003: 22-34 [doi]
Languages for Reactive Specifications: Synchrony Vs AsynchronyR. K. Shyamasundar, S. Ramesh. ijfcs, 11(2):283-314, 2000.
Integrated analysis of software product lines: a constraint based framework for consistency, liveness, and commonness checkingJean-Vivien Millo, Swarup Mohalik, S. Ramesh. indiaSE 2011: 41-50 [doi]
Test case generation from formal models through abstraction refinement and model checkingManoranjan Satpathy, S. Ramesh. amost 2007: 85-94 [doi]
Time-budgeting: a component based development methodology for real-time embedded systemsManoj G. Dixit, S. Ramesh, Pallab Dasgupta. fac, 26(3):591-621, 2014. [doi]
Intelligent Green IT Management for Enterprises through System ProfilingG. Subrahmanya V. R. K. Rao, Jeyabalan Saravanakumar, Karthik Sundararaman, Jinka Parthasarathi, S. Ramesh. greencom 2011: 206-211 [doi]
Enabling 3D NAND Trench Cells for Scaled Flash MemoriesS. Rachidi, S. Ramesh, L. Breuil, Z. Tao, Devin Verreck, G. L. Donadio, Antonio Arreghini, G. Van den bosch, Maarten Rosmeulen. imw2 2023: 1-4 [doi]
Synchronous Protocol Automata: A Framework for Modelling and Verification of SoC Communication ArchitecturesVijay D Silva, S. Ramesh, Arcot Sowmya. date 2004: 390-395 [doi]
LCP Based Planar High Q Embedded BandPass Filter for Wireless ApplicationsV. Satheesh Kumar, S. Ramesh. jmm, 14(3):307-318, 2018. [doi]
Impossibility of Synchronization in the Presence of PreemptionS. Ramesh, Chandrashekar M. Shetty. ppl, 8(1):111-120, 1998.
Applying Declarative Analysis to Software Product Line Models: An Industrial StudyRamy Shahin, Robert Hackman, Rafael Toledo, S. Ramesh, Joanne M. Atlee, Marsha Chechik. MoDELS 2021: 145-155 [doi]
Reachability in hierarchical machinesOmer Nguena-Timo, Alexandre Petrenko, Arnaud Dury, S. Ramesh. iri 2014: 475-482 [doi]
Automated Synthesis of Assertion Monitors using Visual SpecificationsAmbar A. Gadkari, S. Ramesh. date 2005: 390-395 [doi]
Multiple Mutation Testing from FSMAlexandre Petrenko, Omer Nguena-Timo, S. Ramesh. forte 2016: 222-238 [doi]
CoGenTe: a tool for code generator testingA. C. Rajeev, Prahladavaradan Sampath, K. C. Shashidhar, S. Ramesh. ASE 2010: 349-350 [doi]
Forced simulation: A technique for automating component reuse in embedded systemsPartha S. Roop, Arcot Sowmya, S. Ramesh. todaes, 6(4):602-628, 2001. [doi]
Compositional modeling and analysis of automotive feature product linesShankara Narayanan Krishna, Ganesh Khandu Narwane, S. Ramesh, Ashutosh Trivedi. dac 2015: 57 [doi]
Apportioning: A Technique for Efficient Reachability Analysis of Concurrent Object-Oriented ProgramsSridhar Iyer, S. Ramesh. TSE, 27(11):1037-1056, 2001. [doi]
Compositional Verification of Software Product LinesJean-Vivien Millo, S. Ramesh, Shankara Narayanan Krishna, Ganesh Khandu Narwane. IFM 2013: 109-123 [doi]
Fully Abstract Semantics for Higher Order Communicating SystemsS. Ramesh. mfcs 1992: 463-471
De-noising of images from salt and pepper noise using hybrid filter, fuzzy logic noise detector and genetic optimization algorithm (HFGOA)A. Senthil Selvi, K. Pradeep Mohan Kumar, S. Dhanasekeran, P. Uma Maheswari, S. Ramesh, S. Senthil Pandi. mta, 79(5-6):4115-4131, 2020. [doi]
Pattern Recognition of Modulation Signal Classification Using Deep Neural NetworksD. Venugopal, V. Mohan, S. Ramesh, S. Janupriya, SangSoon Lim, Seifedine Nimer Kadry. csse, 43(2):545-558, 2022. [doi]
Existential abstractions for distributed reactive systems via syntactic transformationsVijay D Silva, Sampada Sonalkar, S. Ramesh. emsoft 2007: 240-248 [doi]
Extending Statecharts with Temporal LogicArcot Sowmya, S. Ramesh. TSE, 24(3):216-231, 1998. [doi]
Interface synthesis and protocol conversionPurandar Bhaduri, S. Ramesh. fac, 20(2):205-224, 2008. [doi]
Enhanced brain image retrieval using carrier frequency offset compensated orthogonal frequency division multiplexing for telemedicine applicationsS. Chitra, N. Kumaratharan, S. Ramesh. imst, 28(3):186-195, 2018. [doi]
A simulation condition for correct asynchronous implementation of synchronous designS. Xu, R. Kumar, S. Jiang, S. Ramesh. amcc 2008: 1728-1733 [doi]
Modelling of electric vehicle charging station and controlled by fuzzy logic controller with different modes of operationS. C. Vijaya Kumar, K. Karunanithi 0001, S. P. Raja 0001, S. Ramesh, P. Chandrasekar, R. Obulupathy. jcondec, 10(1):26-39, 2023. [doi]
Experimental Validation of Impedance Source Network Based Active Power Filter for Interconnection of PV System into GridP. Jamuna, S. Ramesh. jcsc, 27(14):1850215, 2018. [doi]
A Toolset for Modelling and Verification of GALS SystemsS. Ramesh, Sampada Sonalkar, Vijay D Silva, Naveen Chandra, B. Vijayalakshmi. cav 2004: 506-509 [doi]
Interprocedural slicing of multithreaded programs with applications to JavaMangala Gowri Nanda, S. Ramesh. TOPLAS, 28(6):1088-1144, 2006. [doi]
A New Class of High Level Programs for Distributed Computing SystemsS. Ramesh, S. L. Mehndiratta. fsttcs 1985: 42-72
A mixed approach to rigorous development of control designsManoranjan Satpathy, S. Ramesh, Colin F. Snook, Neeraj Kumar Singh, Michael Butler. cacsd 2013: 7-12 [doi]
Cross-layer analysis, testing and verification of automotive control softwareManfred Broy, Samarjit Chakraborty, Dip Goswami, S. Ramesh, Manoranjan Satpathy, Stefan Resmerita, Wolfgang Pree. emsoft 2011: 263-272 [doi]
Model-based engineering of cyber-physical software systems for smart worlds: A case study of automobile control systemsK. Ravindran, S. Ramesh. icacci 2013: 1710-1717 [doi]
A New and Efficient Implementation of Multiprocess SynchronizationS. Ramesh. parle 1987: 387-401
Provably correct on-chip communication: A formal approach to automatic protocol converter synthesisKarin Avnit, Vijay D Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran. todaes, 14(2), 2009. [doi]
Multi-Objective Optimal Power Flow Solutions Using Improved Multi-Objective Mayfly Algorithm (IMOMA)K. Vijaya Bhaskar, S. Ramesh, K. Karunanithi, S. P. Raja 0001. jcsc, 32(12), August 2023. [doi]
Cloud-assisted control of ground vehicles using adaptive computation offloading techniquesArun Adiththan, S. Ramesh, Soheil Samii. date 2018: 589-592 [doi]
Communicating Reactive ProcessesG. Berry, S. Ramesh, R. K. Shyamasundar. POPL 1993: 85-98
Conflict-Tolerant Real-Time FeaturesDeepak D Souza, Madhu Gopinathan, S. Ramesh, Prahladavaradan Sampath. qest 2008: 274-283 [doi]
Planning with Action Prioritization and New Benchmarks for Classical PlanningKamalesh Ghosh, Pallab Dasgupta, S. Ramesh. ausai 2012: 779-790 [doi]
Automatic test case generation from Simulink/Stateflow models using model checkingSwarup Mohalik, Ambar A. Gadkari, Anand Yeolekar, K. C. Shashidhar, S. Ramesh. stvr, 24(2):155-180, 2014. [doi]
Translation Validation for Stateflow to CPrahladavaradan Sampath, A. C. Rajeev, S. Ramesh. dac 2014: 1-6 [doi]
Assertion Checking Environment (ACE) for Formal Verification of C ProgramsBabita Sharma, S. D. Dhodapkar, S. Ramesh. safecomp 2002: 284-295 [doi]
Validation of Pipelined Processor Designs Using Esterel Tools: A Case StudyS. Ramesh, Purandar Bhaduri. cav 1999: 84-95 [doi]
A High-Performance SRAM Technology With Reduced Chip-Level Routing Congestion for SoCR. Castagnetti, R. Venkatraman, B. Bartz, C. Monzel, T. Briscoe, Andres Teene, S. Ramesh. isqed 2005: 193-196 [doi]
CAL Student Coaching Environment and Virtual Reality in Mechanical EngineeringManjit Singh Sidhu, N. Selvanathan, S. Ramesh. ijicte, 2(1):12-27, 2006. [doi]
Distributed Shared Memory on IBM SP2S. Ramesh, R. Lakshmi, R. Govindarajan. icpads 1997: 338-345 [doi]
Beyond-Si materials and devices for more Moore and more than Moore applicationsNadine Collaert, A. Alian, H. Arimura, Geert Boccardi, Geert Eneman, Jacopo Franco, Tsvetan Ivanov, D. Lin, Jérôme Mitard, S. Ramesh, R. Rooyackers, M. Schaekers, A. Sibaya-Hernandez, S. Sioncke, Q. Smets, Abhitosh Vais, A. Vandooren, A. Veloso, A. Verhulst, D. Verreck, N. Waldron, A. Walke, Liesbeth Witters, H. Yu, X. Zhou, Aaron Voon-Yew Thean. icicdt 2016: 1-5 [doi]
A Formal Approach To The Protocol Converter ProblemKarin Avnit, Vijay D Silva, Arcot Sowmya, S. Ramesh, Sri Parameswaran. date 2008: 294-299 [doi]
Test Generation by Constraint Solving and FSM Mutant KillingAlexandre Petrenko, Omer Nguena-Timo, S. Ramesh. pts 2016: 36-51 [doi]
Planar High Gain Dielectric Loaded Exponentially Tapered Slot Antenna for Millimeter Wave Wireless CommunicationsS. Ramesh, T. Rama Rao. wpc, 84(4):3179-3192, 2015. [doi]
Some results on Parametric Temporal LogicManoj G. Dixit, S. Ramesh, Pallab Dasgupta. ipl, 111(20):994-998, 2011. [doi]
Microgrid based VANET monitoring and energy management in 5G networks by reinforcement deep learning techniquesA. Selvakumar, S. Ramesh, Thirumalaisamy Manikandan, G. Michael, U. Arul, R. Gnanajeyaraman. cee, 111(Part A):108933, October 2023. [doi]
Experimental study on machining of titanium alloy (Ti64) by CVD and PVD coated carbide insertsS. Ramesh, L. Karunamoorthy, V. S. Senthilkumar, K. Palanikumar. ijmtm, 17(4):373-385, 2009. [doi]
A formal approach to component based development of synchronous programsPartha S. Roop, Arcot Sowmya, S. Ramesh. aspdac 2001: 421-424 [doi]
Automated Planning as an Early Verification Tool for Distributed ControlKamalesh Ghosh, Pallab Dasgupta, S. Ramesh. JAR, 54(1):31-68, 2015. [doi]
SmartTestGen+: A Test Suite Booster for Enhanced Structural CoverageSachin Raviram, Prakash Peranandam, Manoranjan Satpathy, S. Ramesh. ictac 2012: 164-167 [doi]
An integrated test generation tool for enhanced coverage of Simulink/Stateflow modelsPrakash Peranandam, Sachin Raviram, Manoranjan Satpathy, Anand Yeolekar, Ambar A. Gadkari, S. Ramesh. date 2012: 308-311 [doi]
A Methodology for Developing Distributed ProgramsS. Ramesh, S. L. Mehndiratta. TSE, 13(8):967-976, 1987.
Tracing SPLs precisely and efficientlySwarup Mohalik, S. Ramesh, Jean-Vivien Millo, Shankara Narayanan Krishna, Ganesh Khandu Narwane. SPLC 2012: 186-195 [doi]
Early Time-Budgeting for Component-Based Embedded Control SystemsManoj G. Dixit, S. Ramesh, Pallab Dasgupta. In Alberto L. Sangiovanni-Vincentelli, Haibo Zeng, Marco Di Natale, Peter Marwedel, editors, Embedded Systems Development, From Functional Models to Implementations. pages 123-137, Springer, 2014. [doi]
Investigations on Off-Grid Hybrid Renewable Energy Microgrid for Sustainable Development GrowthK. Karunanithi, S. P. Raja, S. Ramesh, K. Karthikumar, P. Chandrasekar, K. Aruna Rani. jcsc, 31(6), 2022. [doi]

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