Table of Contents

• Novel Weight Mapping Method for Reliable NVM based Neural NetworkL. X. Han, Y. C. Xiang, P. Huang, G. H. Yu, R. Z. Han, X. Y. Liu, J. F. Kang. 1-6 [doi]
• Reliability Characterization of a Flexible Interconnect for Cryogenic and Quantum ApplicationsEmma R. Schmidgall, Flavio Griggio, George H. Thiel, Sherman E. Peek, Bhargav Yelamanchili, Archit Shah, Vaibhav Gupta, John A. Sellers, Michael C. Hamilton, David B. Tuckerman, Samuel d'Hollosy. 1-7 [doi]
• Study of the microstructure and the mechanical properties of Pb-2.5Ag-2Sn solder jointK. Kariya, A. Yumiba, M. Ukita, T. Ikeda, M. Koganemaru, N. Masago. 1-4 [doi]
• Frequency, LET, and Supply Voltage Dependence of Logic Soft Errors at the 7-nm NodeY. Xiong, A. Feeley, Lloyd W. Massengill, Bharat L. Bhuva, S.-J. Wen, Rita Fung. 1-5 [doi]
• Impact of mechanical strain on wakeup of HfO2 ferroelectric memoryAnastasiia Kruv, S. R. C. McMitchell, Sergiu Clima, O. O. Okudur, N. Ronchi, Geert Van den bosch, M. Gonzalez, I. De Wolf, Jan Van Houdt. 1-6 [doi]
• A Reliable Triple-Level Operation of Resistive-Gate Flash Featuring Forming-Free and High Immunity to Sneak PathW.-Y. Yang, E. R. Hsieh, C. H. Cheng, B. Y. Chen, K. S. Li, Steve S. Chung. 1-6 [doi]
• Machine Learning On Transistor Aging Data: Test Time Reduction and Modeling for Novel DevicesNeel Chatterjee, John Ortega, Inanc Meric, Peng Xiao, Ilan Tsameret. 1-9 [doi]
• Characterization of Slow Traps in SiGe MOS Interfaces by TiN/Y2O3 Gate StacksT. E. Lee, Kasidit Toprasertpong, Mitsuru Takenaka, Shinichi Takagi. 1-4 [doi]
• Customized Parallel Reliability Testing Platform with Multifold Throughput Enhancement for Intel Stressing TestsP. Xiao, H. Hadziosmanovic, M. Klessens, R. Jiang, J. Ortega, D. Schroeder, James Palmer, I. Tsameret. 1-6 [doi]
• Moisture diffusion rate in an ultra-low-k dielectric and its effect on the dielectric reliabilityN. Duan, V. Subramanian, E. Olthof, P. Eggenkamp, M. van Soestbergen, R. Braspenning. 1-7 [doi]
• Process-induced charging damage in IGZO nTFTsGaspard Hiblot, Nouredine Rassoul, Lieve Teugels, Katia Devriendt, Adrian Vaisman Chasin, Michiel van Setten, Attilio Belmonte, Romain Delhougne, Gouri Sankar Kar. 1-8 [doi]
• Product Lifetime Estimation in 7nm with Large data of Failure Rate and Si-Based Thermal Coupling ModelJae-Gyung Ahn, Rhesa Nathanael, I-Ru Chen, Ping-Chin Yeh, Jonathan Chang. 1-6 [doi]
• Characterization of Early Breakdown of SiC MOSFET Gate Oxide by Voltage Ramp TestsYongju Zheng, Rahul R. Potera, Tony Witt. 1-5 [doi]
• BTI Arbitrary Stress Patterns Characterization & Machine-Learning optimized CET Maps SimulationsL. Gerrer, Jacques Cluzel, F. Gaillard, Xavier Garros, Xavier Federspiel, Florian Cacho, David Roy 0001, E. Vincent. 1-5 [doi]
• Mechanisms of Contact Formation and Electromigration Reliability in Wirebond PackagesAllison T. Osmanson, M. Tajedini Y. R. Kim, Hossein Madanipour, C. Kim, B. Glasscock, M. Khan. 1-6 [doi]
• Effects of Temperature and Supply Voltage on Soft Errors for 7-nm Bulk FinFET TechnologyA. Feeley, Y. Xiong, Bharat L. Bhuva, Balaji Narasimham, S.-J. Wen, Rita Fung. 1-5 [doi]
• Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet TechnologiesGerhard Rzepa, Markus Karner, Oskar Baumgartner, Georg Strof, Franz Schanovsky, F. Mitterbauer, Christian Kernstock, H. W. Karner, Pieter Weckx, Geert Hellings, Dieter Claes, Z. Wu, Y. Xiang, Thomas Chiarella, Bertrand Parvais, Jérôme Mitard, Jacopo Franco, Ben Kaczer, Dimitri Linten, Zlatan Stanojevic. 1-6 [doi]
• On the impact of buffer and GaN-channel thickness on current dispersion for GaN-on-Si RF/mmWave devicesVamsi Putcha, L. Cheng, AliReza Alian, M. Zhao, H. Lu, Bertrand Parvais, Niamh Waldron, Dimitri Linten, Nadine Collaert. 1-8 [doi]
• Aging models for n- and p-type LDMOS covering low, medium and high VGS operationGuido T. Sasse, Vignesh Subramanian, Ljubo Radic. 1-6 [doi]
• Quantifying Region-Specific Hot Carrier Degradation in LDMOS Transistors Using a Novel Charge Pumping TechniqueBikram Kishore Mahajan, Yen-Pu Chen, Dhanoop Varghese, Vijay Reddy, Srikanth Krishnan, Muhammad Ashraful Alam. 1-6 [doi]
• Dielectric Relaxation, Aging and Recovery in High-K MIM CapacitorsKonner E. K. Holden, Gavin D. R. Hall, Michael Cook, Chris Kendrick, Kaitlyn Pabst, Bruce Greenwood, Robin Daugherty, Jeff P. Gambino, Derryl D. J. Allman. 1-10 [doi]
• CV Stretch-Out Correction after Bias Temperature Stress: Work-Function Dependence of Donor-/Acceptor-Like Traps, Fixed Charges, and Fast StatesTibor Grasser, Barry J. O'Sullivan, Ben Kaczer, J. Franco, Bernhard Stampfer, Michael Waltl. 1-6 [doi]
• Study on Avalanche Uniformity in 1.2KV GaN Vertical PIN Diode with Bevel Edge-TerminationKe Zeng, Srabanti Chowdhury, Brendan Gunning, Robert Kaplar, Travis Anderson. 1-4 [doi]
• Multilevel Programming Reliability in Si-doped GeSbTe for Storage Class MemoryGiusy Lama, Mathieu Bernard, Nicolas Bernier, Guillaume Bourgeois, E. Nolot, Niccolo Castellani, J. Garrione, M. C. Cyrille, Gabriele Navarro, Etienne Nowak. 1-6 [doi]
• Conductance variations and their impact on the precision of in-memory computing with resistive switching memory (RRAM)Giacomo Pedretti, Elia Ambrosi, Daniele Ielmini. 1-8 [doi]
• Reliability of optoelectronic module An IntroductionJohn Osenbach. 1-9 [doi]
• Reliability aspects of ferroelectric hafnium oxide for application in non-volatile memoriesHalid Mulaosmanovic, Patrick D. Lomenzo, Uwe Schroeder, Stefan Slesazeck, Thomas Mikolajick, Benjamin Max. 1-6 [doi]
• Role of the AlGaN Cap Layer on the Trapping Behaviour of N-Polar GaN MISHEMTsFrancesca Chiocchetta, C. Calascione, Carlo De Santi, C. Sharma, Fabiana Rampazzo, Xun Zheng, Brian Romanczyk, Matthew Guidry, H. Li, Stacia Keller, Umesh K. Mishra, Gaudenzio Meneghesso, Matteo Meneghini, Enrico Zanoni. 1-2 [doi]
• Correlation between MOSFETs breakdown and 4H-SiC epitaxial defectsP. Fiorenza, S. Adamo, M. S. Alessandrino, C. Bottari, B. Carbone, C. Di Martino, A. Russo, M. Saggio, C. Venuto, E. Vitanza, E. Zanetti, F. Giannazzo, F. Roccaforte. 1-6 [doi]
• Off-state TDDB in FinFET Technology and its Implication for Safe Operating AreaMaria Toledano-Luque, Peter C. Paliwoda, M. Nour, Thomas Kauerauf, B. Min, G. Bossu, M. Siddabathula, Tanya Nigam. 1-6 [doi]
• Effect of interface and bulk charges on the breakdown of nitrided gate oxide on 4H-SiCB. Mazza, S. Patane, F. Cordiano, M. Giliberto, G. Renna, A. Severino, E. Zanetti, M. Boscaglia, G. Franco. 1-4 [doi]
• CMOS RF reliability for 5G mmWave applications - Challenges and OpportunitiesP. Srinivasan, F. Guarin. 1-7 [doi]
• Mitigating switching variability in carbon nanotube memristorsJ. Farmer, W. Whitehead, A. Hall, Dmitry Veksler, Gennadi Bersuker, David Z. Gao, Al-Moatasem El-Sayed, T. Durrant, Alexander L. Shluger, Thomas Rueckes, Lee Cleveland, Harry Luan, R. Sen. 1-4 [doi]
• Excellent Reliability of Xtacking™ Bonding InterfaceYan Ouyang, Suhui Yang, Dandan Yin, Xiang Huang, Zhiqiang Wang, Shengwei Yang, Kun Han, Zhongyi Xia. 1-6 [doi]
• Design Optimization of MV-NMOS to Improve Holding Voltage of a 28nm CMOS Technology ESD Power ClampSagar Premnath Karalkar, Vishal Ganesan, Milova Paul, Kyong Jin Hwang, Robert Gauthier. 1-5 [doi]
• Soft-Error Susceptibility in Flip-Flop in EUV 7 nm Bulk-FinFET TechnologyTaiki Uemura, Byungjin Chung, Jeongmin Jo, Mijoung Kim, Dalhee Lee, Gunrae Kim, Seungbae Lee, Taesjoong Song, Hwasung Rhee, Brandon Lee, Jaehee Choi. 1-7 [doi]
• Reliability of a DME Ru Semidamascene scheme with 16 nm wide AirgapsAlicja Lesniewska, O. Varela Pedreira, Melina Lofrano, Gayle Murdoch, Marleen H. van der Veen, A. Dangol, N. Horiguchi, Zsolt Tokei, Kris Croes. 1-6 [doi]
• Robustness of GaN Gate Injection Transistors under Repetitive Surge Energy and OvervoltageJoseph P. Kozak, Qihao Song, Ruizhe Zhang 0003, Jingcun Liu, Yuhao Zhang. 1-5 [doi]
• Runtime Variability Monitor for Data Retention Characteristics of Commercial NAND Flash MemoryMatchima Buddhanoy, Sadman Sakib, Biswajit Ray. 1-5 [doi]
• "Pinch to Detect": A Method to Increase the Number of Detectable RTN Traps in Nano-scale MOSFETsAngeliki Tataridou, Gérard Ghibaudo, Christoforos Theodorou. 1-5 [doi]
• Can Emerging Computing Paradigms Help Enhancing Reliability Towards the End of Technology Roadmap?Runsheng Wang, Zuodong Zhang, Yawen Zhang, Yixuan Hu, Yanan Sun, Weikang Qian, Ru Huang. 1-7 [doi]
• Comparison of Analog and Noise Performance between Buried Channel versus Surface Devices in HKMG I/O DevicesLuca Pirro, A. Jayakumar, Olaf Zimmerhackl, D. Lipp, R. Illgen, A. Muehlhoff, R. Pfuetzner, Alban Zaka, M. Otto, Jan Hoentschel, Y. Raffel, Konrad Seidel, Ricardo Olivo. 1-4 [doi]
• Stochastic and Deterministic Modeling Frameworks for Time Kinetics of Gate Insulator Traps During and After Hot Carrier Stress in MOSFETsSatyam Kumar, Tarun Samadder, Karansingh Thakor, Uma Sharma, Souvik Mahapatra. 1-5 [doi]
• ON-state reliability of GaN-on-Si Schottky Barrier Diodes: Si3N4 vs. Al2O3/SiO2 GET dielectricEliana Acurio, Lionel Trojman, Brice De Jaeger, Benoit Bakeroot, Stefaan Decoutere. 1-6 [doi]
• Investigation of the Failure Mechanism of InGaAs-pHEMT under High Temperature Operating Life TestsYasunori Tateno, Ken Nakata, Akio Oya, Keita Matsuda, Yoshihide Komatsu, Shinichi Osada, Masafumi Hirata, Shigeyuki Ishiyama, Toshiki Yoda, Atsushi Nitta, Tomio Sato. 1-4 [doi]
• A Study on System Level UFS M-PHY Reliability Measurement Method Using RDVSNamHyuk Yang, Jinhwan Kim, GeonGu Park, ChulHyuk Kwon, Seungtaek Lee, Sangwoo Pae, Hoosung Kim, Sangwon Hwang. 1-7 [doi]
• Simulation Study of the Origin of Ge High Speed Photodetector DegradationB. Arunachalam, Jean-Emmanuel Broquin, Q. Rafhay, D. Roy, A. Kaminski. 1-4 [doi]
• Overhead Reduction with Optimal Margining Using A Reliability Aware Design ParadigmSubrat Mishra, Pieter Weckx, Odysseas Zografos, Ji-Yung Lin, Alessio Spessot, Francky Catthoor. 1-7 [doi]
• Study on the difference between ID(VG) and C(VG) pBTI shifts in GaN-on-Si E-mode MOSc-HEMTA. G. Viey, William Vandendaele, M.-A. Jaud, Jean Coignus, J. Cluzel, Alexis Krakovinsky, S. Martin, Jérome Biscarrat, Romain Gwoziecki, V. Sousa, F. Gaillard, R. Modica, F. Iucolano, Matteo Meneghini, Gaudenzio Meneghesso, Gérard Ghibaudo. 1-8 [doi]
• Single Event Hard Error due to Terrestrial RadiationJin-Woo Han, M. Meyyappan, Jungsik Kim. 1-6 [doi]
• Reliability of STT-MRAM for various embedded applicationsS.-H. Han, J. H. Lee, K. S. Suh, K. T. Nam, D. E. Jeong, S. C. Oh, S.-H. Hwang, Y. Ji, K. Lee, K. Lee, Y. J. Song, Y. G. Hong, G. T. Jeong. 1-5 [doi]
• RF Reliability of SOI-based Power Amplifier FETs for mmWave 5G ApplicationsP. Srinivasan, F. Guarin, S. Syed, Joris Angelo Sundaram Jerome, W. Liu, S. Jain, D. Lederer, Stephen Moss, Paul Colestock, A. Bandyopadhyay, N. Cahoon, B. Min, M. Gall. 1-6 [doi]
• HCI Temperature sense effect from 180nm to 28nm nodesXavier Federspiel, A. Camara, Audrey Michard, Cheikh Diouf, Florian Cacho. 1-5 [doi]
• A straightforward electrical method to determine screening capability of GOX extrinsics in arbitrary, commercially available SiC MOSFETsJudith Berens, Thomas Aichinger. 1-5 [doi]
• A Fast DCIV Technique for Characterizing the Generation and Repassivation of Interface Traps Under DC/ AC NBTI Stress/Recovery Condition in Si p-FinFETsLongda Zhou, Zhaohao Zhang, Hong Yang, Zhigang Ji, Qianqian Liu, Qingzhu Zhang, Eddy Simoen, Huaxiang Yin, Jun Luo, Anyan Du, Chao Zhao, Wenwu Wang. 1-7 [doi]
• Aging of Current DACs and its Impact in Equalizer CircuitsTonmoy Dhar, Jitesh Poojary, Ramesh Harjani, Sachin S. Sapatnekar. 1-6 [doi]
• Nanosecond-scale and self-heating free characterization of advanced CMOS transistors utilizing wave reflectionWei Liu, Yaru Ding, Liang Zhao, Yi Zhao. 1-5 [doi]
• Low-Bit Precision Neural Network Architecture with High Immunity to Variability and Random Telegraph Noise based on Resistive MemoriesTommaso Zanotti, Francesco Maria Puglisi, Paolo Pavan. 1-6 [doi]
• A Generalized Approach to Determine the Switching Reliability of GaN HEMTs on-Wafer LevelNicola Modolo, Andrea Minetto, Carlo De Santi, Luca Sayadi, Sebastien Sicre, Gerhard Prechtl, Gaudenzio Meneghesso, Enrico Zanoni, Matteo Meneghini. 1-5 [doi]
• Analysis of the interactions of HCD under "On" and "Off" state modes for 28nm FDSOI AC RF modellingT. Garba-Seybou, X. Federspiel, Alain Bravaix, Florian Cacho. 1-5 [doi]
• Modeling and spectroscopy of ovonic threshold switching defectsRobin Degraeve, T. Ravsher, S. Kabuyanagi, Andrea Fantini, Sergiu Clima, D. Garbin, Gouri Sankar Kar. 1-5 [doi]
• Impact of Multilevel Retention Characteristics on RRAM based DNN Inference EngineWonbo Shim, Jian Meng, Xiaochen Peng, Jae-sun Seo, Shimeng Yu. 1-4 [doi]
• Progress and Current Topics of JEDEC JC-70.1 Power GaN Device Quality and Reliability Standards Activity: Or: What is the Avalanche capability of your GaN Transistor?Tim McDonald, Stephanie Watts Butler. 1-6 [doi]
• Guidelines for Space Qualification of GaN HEMTs and MMICsJohn Scarpulla. 1-11 [doi]
• Peculiar Current Instabilities & Failure Mechanism in Vertically Stacked Nanosheet ggN-FETM. Monishmurali, Mayank Shrivastava. 1-5 [doi]
• Universal Impacts of Local Electric Fields on the Projected Dielectric LifetimeLieyi Sheng, Ihsiu Ho. 1-6 [doi]
• A Novel High Voltage Drain Extended FinFET SCR for SoC ApplicationsM. Monishmurali, Mayank Shrivastava. 1-4 [doi]
• The properties, effect and extraction of localized defect profiles from degraded FET characteristicsMichiel Vandemaele, Ben Kaczer, Stanislav Tyaginov, Jacopo Franco, Robin Degraeve, Adrian Chasin, Zhicheng Wu, Erik Bury, Yang Xiang, Hans Mertens, Guido Groeseneken. 1-7 [doi]
• Characterization and Mitigation of Relaxation Effects on Multi-level RRAM based In-Memory ComputingWangxin He, Wonbo Shim, Shihui Yin, Xiaoyu Sun, Deliang Fan, Shimeng Yu, Jae-sun Seo. 1-7 [doi]
• Back End Of Line opportunities and reliability challenges for future technology nodesMauro J. Kobrinsky, Rahim Kasim. 1-2 [doi]
• Monitoring Setup and Hold Timing LimitsFlorian Cacho, L. Angbel, Xavier Federspiel. 1-6 [doi]
• Assessing SiCr resistor drift for automotive analog ICsK. A. Stewart, K. Kimura, M. Ring, K. Noldus, P. Hulse, R. C. Jerome, A. Hasegawa, J. P. Gambino, D. T. Price. 1-4 [doi]
• Reliability and Failure Analysis of 100 nm AlGaN/GaN HEMTs under DC and RF StressMaximilian Dammann, Martina Baeumler, Tobias Kemmer, Helmer Konstanzer, Peter Brückner, S. Krause, Andreas Graff, Michél Simon-Najasek. 1-7 [doi]
• Back gate bias effect and layout dependence on Random Telegraph Noise in FDSOI technologiesP. Srinivasan, D. Song, D. Rose, M. Lacroix, A. Dasgupta. 1-4 [doi]
• Effect of High Temperature on Recovery of Hot Carrier Degradation of scaled nMOSFETs in DRAMD. Son, G. J. Kim, J. Kim, N. Lee, K. Kim, S. Pae. 1-4 [doi]
• Comparative Study on the Energy Distribution of Defects under HCD and NBTI in Short Channel p-FinFETsHao Chang, Longda Zhou, Hong Yang, Zhigang Ji, Qianqian Liu, Eddy Simoen, Huaxiang Yin, Wenwu Wang. 1-5 [doi]
• An All BTI (N-PBTI, N-NBTI, P-PBTI, P-NBTI) Odometer based on a Dual Power Rail Ring Oscillator ArrayGyusung Park, Hanzhao Yu, Minsu Kim, Chris H. Kim. 1-5 [doi]
• Estimation of Oxide Breakdown Voltage During a CDM Event Using Very Fast Transmission Line Pulse and Transmission Line Pulse MeasurementsChloe Troussier, Johan Bourgeat, Blaise Jacquier, Emmanuel Simeu, Jean-Daniel Arnould. 1-5 [doi]
• Charge pumping source-drain current for gate oxide interface trap density in MOSFETs and LDMOSJifa Hao, Yuhang Sun, Amartya Ghosh. 1-4 [doi]
• A BSIM-Based Predictive Hot-Carrier Aging Compact ModelY. Xiang, Stanislav Tyaginov, Michiel Vandemaele, Z. Wu, Jacopo Franco, Erik Bury, B. Truijen, Bertrand Parvais, Dimitri Linten, Ben Kaczer. 1-9 [doi]
• Reliability of Wafer-Level Ultra-Thinning down to 3 µm using 20 nm-Node DRAMsZhwen Chen, Young-Suk Kim, Tadashi Fukuda, Koji Sakui, Takayuki Ohba, Tatsuji Kobayashi, Takashi Obara. 1-6 [doi]
• Advancing Static Performance and Ruggedness of 600 V SiC MOSFETs: Experimental Analysis and Simulation StudyDongyoung Kim, Nick Yun, WoongJe Sung. 1-4 [doi]
• Transient Investigation of Metal-oxide based, CMOS-compatible ECRAMPaul M. Solomon, Douglas M. Bishop, Teodor K. Todorov, Simon Dawes, Damon B. Farmer, Matthew Copel, Ko-Tao Lee, John Collins, John Rozen. 1-7 [doi]
• Investigation on VTH and RON Slow/Fast Drifts in SiC MOSFETsM. Cioni, Alessandro Bertacchini, A. Mucci, Giovanni Verzellesi, Paolo Pavan, Alessandro Chini. 1-5 [doi]
• Efficient Data Recovery Technique for 3D TLC NAND Flash Memory based on WL InterferenceLiu Yang, Qi Wang, Qianhui Li, Xiaolei Yu, Jing He, Zongliang Huo. 1-5 [doi]
• Challenges toward Low-Power SOT-MRAMShy Jay Lin, Yen-Lin Huang, MingYaun Song, Chien-Ming Lee, Fen Xue, Guan-Long Chen, Shan-Yi Yang, Yao-Jen Chang, I-Jung Wang, Yu-Chen Hsin, Yi-Hui Su, Jeng-Hua Wei, Chi-Feng Pai, Shan X. Wang, Carlos H. Diaz. 1-7 [doi]
• Robust RRAM-based In-Memory Computing in Light of Model StabilityGokul Krishnan, Jingbo Sun, Jubin Hazra, Xiaocong Du, Maximilian Liehr, Zheng Li 0020, Karsten Beckmann, Rajiv V. Joshi, Nathaniel C. Cady, Yu Cao 0001. 1-5 [doi]
• Optimized programming algorithms for multilevel RRAM in hardware neural networksValerio Milo, Francesco Anzalone, Cristian Zambelli, Eduardo Pérez, Mamathamba Kalishettyhalli Mahadevaiah, Oscar Gonzalez Ossorio, Piero Olivo, Christian Wenger, Daniele Ielmini. 1-6 [doi]
• Chip to Package Interaction Risk Assessment of FCBGA Devices using FEA Simulation, Meta-Modeling and Multi-Objective Genetic Algorithm Optimization TechniqueMoon-Soo Lee, Inhak Baick, Min Kim, Seo Hyun Kwon, Myeong Soo Yeo, Hwasung Rhee, Euncheol Lee. 1-6 [doi]
• Bias Temperature Instability Depending on Body Bias through Buried Oxide (BOX) Layer in a 65 nm Fully-Depleted Silicon-On-Insulator ProcessRyo Kishida, Ikuo Suda, Kazutoshi Kobayashi. 1-6 [doi]
• Is there a perfect SiC MosFETs Device on an imperfect crystal?T. Neyer, M. Domeij, H. Das, S. Sunkari. 1-6 [doi]
• Traps Based Reliability Barrier on Performance and Revealing Early Ageing in Negative Capacitance FETAniket Gupta, Govind Bajpai, Priyanshi Singhal, Navjeet Bagga, Om Prakash, Shashank Banchhor, Hussam Amrouch, Nitanshu Chauhan. 1-6 [doi]
• A Theoretical Framework for Trap Generation and Passivation in NAND Flash Tunnel Oxide During Distributed Cycling and Retention BakeTarun Samadder, Satyam Kumar, Karansingh Thakor, Souvik Mahapatra. 1-6 [doi]
• Edge-induced reliability & performance degradation in STT-MRAM: an etch engineering solutionSimon Van Beek, Siddharth Rao, Shreya Kundu, Woojin Kim, Barry J. O'Sullivan, Stefan Cosemans, Farrukh Yasin, Robert Carpenter, Sebastien Couet, Shamin H. Sharifi, Nico Jossart, Davide Crotti, Gouri Sankar Kar. 1-5 [doi]
• Evaluation methodology for assessment of dielectric degradation and breakdown dynamics using time-dependent impedance spectroscopy (TDIS)Tomohiro Kuyama, Keiichiro Urabe, Koji Eriguchi. 1-7 [doi]
• Large Signal RF Reliability of 45-nm RFSOI Power Amplifier Cell for Wi-Fi6 ApplicationsAarti Rathi, P. Srinivasan, Fernando Guarin, Abhisek Dixit. 1-6 [doi]
• Compact Model of ESD Diode Suitable for Subnanosecond Switching TransientsShudong Huang, Elyse Rosenbaum. 1-7 [doi]
• Electromigration limits of copper nano-interconnectsHouman Zahedmanesh, Olalla Varela Pedreira, Zsolt Tokei, Kristof Croes. 1-6 [doi]
• The Characterization of Degradation on various SiON pMOSFET transistors under AC/DC NBTI stressGang-Jun Kim, Moonjee Yoon, Sunghwan Kim, Myeongkyu Eo, Shinhyung Kim, Taehun You, Namhyun Lee, Kijin Kim, Sangwoo Pae. 1-4 [doi]
• Robust Brain-Inspired Computing: On the Reliability of Spiking Neural Network Using Emerging Non-Volatile SynapsesMing-Liang Wei, Hussam Amrouch, Cheng-Lin Sung, Hang-Ting Lue, Chia-Lin Yang, Keh-Chung Wang, Chih-Yuan Lu. 1-8 [doi]
• Composition Segregation of Ge-Rich GST and Its Effect on ReliabilityYung-Huei Lee, P. J. Liao, Vincent Hou, Dawei Heh, Chih-Hung Nien, Wen-Hsien Kuo, Gary T. Chen, Shao-Ming Yu, Yu-Sheng Chen, Jau-Yi Wu, Xinyu Bao, Carlos H. Diaz. 1-6 [doi]
• TDDB Reliability in Gate-All-Around NanosheetHuimei Zhou, Miaomiao Wang, Ruqiang Bao, Tian Shen, Ernest Wu, Richard G. Southwick, Jingyun Zhang, Veeraraghavan S. Basker, Dechao Guo. 1-6 [doi]
• Silicon lifecycle management (SLM) with in-chip monitoringRajesh Kashyap. 1-4 [doi]
• Assessing the pre-breakdown carriers' multiplication in SiC power MOSFETs by soft gamma radiation and its correlation to the Terrestrial Cosmic Rays failure rate data as measured by neutron irradiationMauro Ciappa, Marco Pocaterra. 1-8 [doi]
• Reliability-Conscious MOSFET Compact Modeling with Focus on the Defect-Screening Effect of Hot-Carrier InjectionPratik B. Vyas, Ninad Pimparkar, Robert Tu, Wafa Arfaoui, Germain Bossu, Mahesh Siddabathula, Steffen Lehmann, Jung-Suk Goo, Ali B. Icel. 1-4 [doi]
• Accuracy of Thermal Analysis for SiC Power DevicesS. Race, Thomas Ziemann, S. Tiwari, Ivana Kovacevic-Badstuebner, Ulrike Grossner. 1-5 [doi]
• Mushroom-Type phase change memory with projection liner: An array-level demonstration of conductance drift and noise mitigationR. L. Bruce, S. Ghazi Sarwat, Irem Boybat, C. W. Cheng, W. Kim, S. R. Nandakumar, Charles Mackin, T. Philip, Z. Liu, K. Brew, Nanbo Gong, I. Ok, Praneet Adusumilli, Katie Spoon, Stefano Ambrogio, Benedikt Kersting, T. Bohnstingl, Manuel Le Gallo, A. Simon, N. Li, I. Saraf, J.-P. Han, L. M. Gignac, J. M. Papalia, T. Yamashita, N. Saulnier, Geoffrey W. Burr, H. Tsai, Abu Sebastian, Vijay Narayanan, Matthew BrightSky. 1-6 [doi]
• Time series modeling of the cycle-to-cycle variability in h-BN based memristorsJuan Bautista Roldán, David Maldonado, F. J. Alonso, Andrés M. Roldán, Fei Hui, Yuanyuan Shi, Francisco Jiménez-Molinos, Ana M. Aguilera, Mario Lanza. 1-5 [doi]
• New Developments in SiGe HBT Reliability for RF Through mmW CircuitsJohn D. Cressler. 1-6 [doi]
• A new test procedure to realistically estimate end-of-life electrical parameter stability of SiC MOSFETs in switching operationP. Salmen, M. W. Feil, Katja Waschneck, Hans Reisinger, Gerald Rescher, Thomas Aichinger. 1-7 [doi]
• An efficient methodology to evaluate BEOL and MOL TDDB in advanced nodesS. Jose, C. Yin, Y. Chen, C. M. Hong, M. D. Shroff, X. L. Zhao, F. Zhang. 1-4 [doi]
• Challenges of Flash Memory for Next DecadeKazunari Ishimaru. 1-5 [doi]
• Variability sources and reliability of 3D - FeFETsMilan Pesic, Bastien Beltrando, Andrea Padovani, Shruba Gangopadhyay, Muthukumar Kaliappan, Michael Haverty, Marco A. Villena, Enrico Piccinini, Matteo Bertocchi, Tony Chiang, Luca Larcher, Jack Strand, Alexander L. Shluger. 1-7 [doi]
• Failure Mechanisms of Cascode GaN HEMTs Under Overvoltage and Surge Energy EventsQihao Song, Ruizhe Zhang 0003, Joseph P. Kozak, Jingcun Liu, Qiang Li, Yuhao Zhang. 1-7 [doi]
• Methodology to improve Safety Critical SoC based platform: a case studyOoi Michael, Loo Tung Lun, Koay Eng Keong. 1-4 [doi]
• Modeling of HKMG Stack Process Impact on Gate Leakage, SILC and PBTIDimple Kochar, Tarun Samadder, Subhadeep Mukhopadhyay 0003, Souvik Mahapatra. 1-7 [doi]
• Characterization of NMOS-based ESD Protection for Wide-range Pulse ImmunityYasuyuki Morishita, Satoshi Maeda. 1-4 [doi]
• A defect characterization technique for the sidewall surface of Nano-ridge and Nanowire based Logic and RF technologiesAbhitosh Vais, B. Hsu, O. Syshchyk, H. Yu, AliReza Alian, Y. Mols, K. V. Kodandarama, B. Kunert, Niamh Waldron, Eddy Simoen, Nadine Collaert. 1-5 [doi]
• Vertical stack reliability of GaN-on-Si buffers for low-voltage applicationsElena Fabris, Matteo Borga, Niels Posthuma, M. Zhao, Brice De Jaeger, Shuzhen You, Stefaan Decoutere, Matteo Meneghini, Gaudenzio Meneghesso, Enrico Zanoni. 1-8 [doi]
• Study on the Guard Rings for Latchup Prevention between HV-PMOS and LV-PMOS in a 0.15-µm BCD ProcessChao-Yang Chen, Jian-Hsing Lee, Karuna Nidhi, Tzer-Yaa Bin, Geeng-Lih Lin, Ming-Dou Ker. 1-4 [doi]
• Intrinsic Reliability of BEOL interlayer dielectricJames Palmer, G. W. Zhang, J. R. Weber, Cheyun Lin, C. Perini, R. Kasim. 1-2 [doi]
• Embedded emerging memory technologies for neuromorphic computing: temperature instability and reliabilityYao-Feng Chang, Ilya Karpov, Reed Hopkins, David Janosky, Jacob Medeiros, Benjamin Sherrill, Jiahan Zhang, Yifu Huang, Tanmoy Pramanik, Albert B. Chen, Tony Acosta, Abdullah Guler, James A. O'Donnell, Pedro A. Quintero, Nathan Strutt, Oleg Golonzka, Chris Connor, Jack C. Lee, Jeffrey Hicks. 1-5 [doi]
• Ultrathin Ferroelectricity and Its Application in Advanced Logic and Memory DevicesSayeef Salahuddin. 1-4 [doi]
• Drastic reliability improvement using H2O2/UV treatment of HfO2 for heterogeneous integrationS.-M. Kim, T. M. H. Nyugen, J. W. Oh, Y. S. Lee, S. C. Kang, H. I. Lee, C. H. Kim, S. Some, H. J. Hwang, B. H. Lee. 1-6 [doi]
• Considerations in High Voltage Lateral ESD PNP DesignMilan Shah, Yujie Zhou, David LaFonteese, Elyse Rosenbaum. 1-10 [doi]
• Reliability of Mo as Word Line Metal in 3D NANDDavide Tierno, Kristof Croes, A. Ajaykumar, S. Ramesh, G. Van den bosch, M. Rosmeulen. 1-6 [doi]
• Gate Driver Protection Methods for SiC MOSFET Short Circuit TestingJairo Nevarez, Anthony Olmedo, Rachel Williams, Polina Pechnikova. 1-4 [doi]
• Scaling Trends in the Soft Error Rate of SRAMs from Planar to 5-nm FinFETBalaji Narasimham, V. Chaudhary, M. Smith, L. Tsau, D. Ball, Bharat L. Bhuva. 1-5 [doi]
• Investigation of Gate Leakage Current Behavior for Commercial 1.2 kV 4H-SiC Power MOSFETsShengnan Zhu, Tianshi Liu, Marvin H. White, Anant K. Agarwal, Arash Salemi, David Sheridan. 1-7 [doi]
• Analysis of Sheet Dimension (W, L) Dependence of NBTI in GAA-SNS FETsNilotpal Choudhury, Tarun Samadder, Ravi Tiwari, Huimei Zhou, Richard G. Southwick, Miaomiao Wang, Souvik Mahapatra. 1-8 [doi]
• Physics-based device aging modelling framework for accurate circuit reliability assessmentZhicheng Wu, Jacopo Franco, Brecht Truijen, Philippe Roussel, Stanislav Tyaginov, Michiel Vandemaele, Erik Bury, Guido Groeseneken, Dimitri Linten, Ben Kaczer. 1-6 [doi]
• Time-Efficient Characterization of Time-Dependent Gate Oxide Breakdwon Using Tunable Ramp Voltage Stress (TRVS) Method for Automotive ApplicationsS. C. Hung, S. C. Chen, P. S. Chien, Y. S. Cho, Y. H. Lee, W. S. Hung. 1-6 [doi]
• Strategy to Characterize Electromigration Short Length Effects in Cu/low-k InterconnectsZ. Zhang, M. Kraatz, M. Hauschildt, S. Choi, André Clausner, Ehrenfried Zschech, Martin Gall. 1-5 [doi]
• Time Dependent Variability in Advanced FinFET Technology for End-of-Lifetime Reliability PredictionHai Jiang 0005, Jinju Kim, Kihyun Choi, Hyewon Shim, Hyunchul Sagong, Junekyun Park, Hwasung Rhee, Euncheol Lee. 1-6 [doi]
• Impacts of Depth and Lateral Profiles of Fluorine Atoms in Gate Oxide Films on ReliabilityShuntaro Fujii, Shohei Hamada, Tatsushi Yagi, Isao Maru, Shogo Katsuki, Toshiro Sakamoto, Atsushi Okamoto, Soichi Morita, Tsutomu Miyazaki. 1-5 [doi]
• Space Radiation Effects on SiC Power Device ReliabilityJean-Marie Lauenstein, Megan C. Casey, Ray L. Ladbury, Hak S. Kim, Anthony M. Phan, Alyson D. Topper. 1-8 [doi]
• Systematic Study of Process Impact on FinFET ReliabilityRakesh Ranjan, Ki-Don Lee, Md Iqbal Mahmud, Mohammad Shahriar Rahman, Pavitra Ramadevi Perepa, Charles Briscoe LaRow, Caleb Dongkyun Kwon, Maihan Nguyen, Minhyo Kang, Ashish Kumar Jha, Ahmed Shariq, Shamas Musthafa Ummer, Susannah Laure Prater, Hyunchul Sagong, Hwasung Rhee. 1-5 [doi]
• Elucidating 1S1R operation to reduce the read voltage margin variability by stack and programming conditions optimizationJ. Minguet Lopez, L. Hudeley, L. Grenouillet, Diego Alfaro Robayo, J. Sandrini, G. Navarro, Mathieu Bernard, C. Carabasse, Damien Deleruyelle, Niccolo Castellani, Marc Bocquet, Jean Michel Portal, Etienne Nowak, Gabriel Molas. 1-6 [doi]
• Investigation of the bipolar degradation of SiC MOSFET body diodes and the influence of current densityShanmuganathan Palanisamy, Thomas Basler, Josef Lutz, C. Künzel, L. Wehrhahn-Kilian, R. Elpelt. 1-6 [doi]
• Impact of spacer interface charges on performance and reliability of low temperature transistors for 3D sequential integrationT. Mota Frutuoso, J. Lugo-Alvarez, Xavier Garros, Laurent Brunet, Joris Lacord, L. Gerrer, Mikaël Casse, E. Catapano, Claire Fenouillet-Béranger, François Andrieu, F. Gaillard, Philippe Ferrari. 1-5 [doi]