Journal: Microelectronics Reliability

Volume 41, Issue 9-10

1273 -- 1278Lifeng Wu, Zhihong Liu. Full-Chip Reliability Simulation for VDSM Integrated Circuits
1289 -- 1293A. Muehlhoff. An Extrapolation Model for Lifetime Prediction for Off-State - Degradation of MOS-FETs
1295 -- 1300F. Monsieur, E. Vincent, D. Roy, S. Bruyère, G. Pananakakis, G. Ghibaudo. Determination of Dielectric Breakdown Weibull Distribution Parameters Confidence Bounds for Accurate Ultrathin Oxide Reliability Predictions
1301 -- 1305Young-Pil Kim, Beom Jun Jin, Young Wook Park, Joo Tae Moon, Sang U. Kim. Analysis of retention tail distribution induced by scaled shallow trench isolation for high densityDRAMs
1307 -- 1312N. Revil, X. Garros. Hot-Carrier Reliability for Si and SiGe HBTs: Aging Procedure, Extrapolation Model Limitations and Applications
1313 -- 1318A. Bravaix, D. Goguenheim, N. Revil, E. Vincent. Injection Mechanisms and Lifetime Prediction with the Substrate Voltage in 0.15mum Channel-Length N-MOSFETs
1319 -- 1324H. Puchner, Y.-C. Liu, W. Kong, F. Duan, R. Castagnetti. Substrate Engineering to Improve Soft-Error-Rate Immunity for SRAM Technologies
1325 -- 1329Hamid Toutah, Jean-François Llibre, Boubekeur Tala-Ighil, Taieb Mohammed-Brahim, Youri Helen, G. Gautier, Olivier Bonnaud. Improved Stability of Large Area Excimer Laser Crstallised Polysilicon Thin Film Transistors under DC and AC Operating
1331 -- 1334Yannick Rey-Tauriac, M. Taurin, Olivier Bonnaud. Wafer Level Accelerated test for ionic contamination control on VDMOS transistors in Bipolar/CMOS/DMOS
1335 -- 1340Xavier Gagnard, Yannick Rey-Tauriac, Olivier Bonnaud. Polysilicon oxide quality optimization at Wafer level of a Bipolar/CMOS/DMOS technology
1341 -- 1346M. Nakabayashi, H. Ohyama, E. Simoen, M. Ikegami, C. Claeys, K. Kobayashi, M. Yoneoka, K. Miyahara. Reliability of polycrystalline silicon thin film resistors
1347 -- 1354A. Ghetti, M. Alam, J. Bude. Anode hole generation mechanisms
1355 -- 1360D. Zander, F. Saigné, A. Meinertzhagen. Creation and thermal annealing of interface states induced by uniform or localized injection in 2.3nm thick oxides
1361 -- 1366M. Fadlallah, A. Szewczyk, C. Giannakopoulos, B. Cretu, F. Monsieur, T. Devoivre, J. Jomaah, G. Ghibaudo. Low frequency noise and reliability properties pf 0.12 mum CMOS devices with Ta::2::O::5:: as gate dielectrics
1367 -- 1372S. Bruyère, F. Monsieur, D. Roy, E. Vincent, G. Ghibaudo. Failures in ultrathin oxides: Stored energy or carrier energy driven?
1373 -- 1378Ninoslav Stojadinovic, I. Manic, S. Djoric-Veljkovic, V. Davidovic, S. Golubovic, S. Dimitrijev. Mechanisms of positive gate bias stress induced instabilities in power VDMOSFETs
1379 -- 1383K. Gonf, H. G. Feng, R. Y. Zhan, A. Z. Wang. ESD-Induced Circuit Performance Degradation in RFICs
1385 -- 1390Martin Litzenberger, R. Pichler, Scrgey Bychikhin, Dionyz Pogany, E. Gornik, K. Esmark, Harald Gossner. Effect of pulse risetime on trigger homogeneity in single finger grounded gate nMOSFET electrostatic discharge protection devices
1391 -- 1396N. Tosic Golo, S. van der Wal, Fred G. Kuper, Ton J. Mouthaan. The time-voltage trade-off for ESD damage threshold in amorphous silicon hydrogenated thin-film transistors
1397 -- 1401Joachim C. Reiner, Thomas Keller. Relevance of contact reliability in HBM-ESD test equipment
1403 -- 1407Jan Ackaert, Z. Wang, Eddy De Backer, P. Colson, Peter Coppens. Non Contact Surface Potential Measurements for Charging Reduction During Manufacturing of Metal-Insulator-Metal Capacitors
1409 -- 1416S. Yokogawa, N. Okada, Y. Kakuhara, H. Takizawa. Electromigration Performance of Multi-level Damascene Copper Interconnects
1417 -- 1420F. Dieudonné, F. Daugé, J. Jomaah, C. Raynaud, F. Balestra. An overview of hot-carrier induced degradation in 0.25 mum Partially and Fully Depleted SOI N-MOSFET s
1421 -- 1425F. Lime, G. Ghibaudo, G. Guégan. Stress induced leakage current at low field in ultra thin oxides
1427 -- 1431G. Chen, M. F. Li, Y. Jin. Electric passivation of interface traps at drain junction space charge region in p-MOS transistors
1433 -- 1437A. Guilhaume, P. Galy, J. P. Chante, B. Foucher, F. Blanc. Simulation and experimental comparison of GGNMOS and LVTSCR protection cells under ElectroStatic Discharges
1439 -- 1442K. Croes, R. Dreesen, J. Manca, Ward De Ceuninck, Luc De Schepper, L. Tielemans, P. van Der Wel. High-resolution in-situ of gold electromigration: test time reduction
1443 -- 1448H. Ohyama, M. Nakabayashi, E. Simoen, C. Claeys, T. Tanaka, T. Hirao, S. Onada, K. Kobayashi. Radiation damages of polycrystalline silicon films and npn Si transistors by high-energy particle irradiation
1449 -- 1458Bernd Ebersberger, Alexander Olbrich, Christian Boit. Application of Scanning Probe Microscopy techniques in Semiconductor Failure Analysis
1459 -- 1463H. Yabuhara, Mauro Ciappa, Wolfgang Fichtner. Diamond-Coated Cantilevers for Scanning Capacitance Microscopy Applications
1465 -- 1470J. C. Tsang, Massimo V. Fischetti. Why hot carrier emission based timing probes will work for 50 nm, 1V CMOS technologies
1471 -- 1476D. Lewis, V. Pouget, T. Beauchêne, Hervé Lapuyade, Pascal Fouillat, A. Touboul, Felix Beaudoin, Philippe Perdu. Front Side and Backside OBIT Mappings applied to Single Event Transient Testing
1477 -- 1482Felix Beaudoin, X. Chauffleur, J. P. Fradin, Philippe Perdu, Romain Desplats, D. Lewis. Modeling Thermal Laser Stimulation
1483 -- 1488C.-C. Tsao, Q. S. Wang, P. Bouchet, P. Sudraud. Coaxial Ion-Photon System
1489 -- 1494Katsuyoshi Miura, Koji Nakamae, Hiromu Fujioka. Development of an EB/FIB Integrated Test System
1495 -- 1499Romain Desplats, Philippe Perdu, Felix Beaudoin. A New Versatile Testing Interface for Failure Analysis in Integrated Circuits
1501 -- 1506Scrgey Bychikhin, Martin Litzenberger, R. Pichler, Dionyz Pogany, E. Gornik, G. Groos, M. Stecher. Thermal and free carrier laser interferometric mapping and failure analysis of anti-serial smart power ESD protection structures
1507 -- 1512Norman Goldblatt, Martin Leibowitz, William Lo. Unique and Practical IC Timing Analysis Tool Utilizing Intrinsic Photon Emission
1513 -- 1518V. Pouget, Hervé Lapuyade, Pascal Fouillat, D. Lewis, S. Buchner. Theoretical Investigation of an Equivalent Laser LET
1519 -- 1524M. Zmeck, J. Phang, A. Bettiol, T. Osipowicz, F. Watt, L. Balk, F.-J. Niedernostheide, H.-J. Schulze, E. Falck, R. Barthelmess. Analysis of high-power devices using proton beam induced charge microscopy
1525 -- 1533Kazuko Ikeda. Evaluation method for the control of process induced defect in deep sub-micron device fabrication
1535 -- 1537M. Leicht, G. Fritzer, B. Basnar, S. Golka, J. Smoliner. A reliable course of Scanning Capacitance Microscopy analysis applied for 2D-Dopant Profilings of Power MOSFET Devices
1539 -- 1544Romain Desplats, Felix Beaudoin, Philippe Perdu, P. Poirier, D. Trémouilles, M. Bafleur, D. Lewis. Backside Localization of Current Leakage Faults Using Thermal Laser Stimulation
1545 -- 1549T. Lundquist, E. Delenia, J. Harroun, E. LeRoy, C.-C. Tsao. Ultra-Thinning of C4 Integrated Circuits for Backside Analysis during First Silicon Debug
1551 -- 1556Jon C. Lee, David Su, J. H. Chuang. A Novel Application of the FIB Lift-out Technique for 3-D TEM Analysis
1557 -- 1561Felix Beaudoin, Philippe Perdu, Romain Desplats, S. Rigo, D. Lewis. Silicon Thinning and Polishing on Packaged Devices
1563 -- 1566A. Scavennec. Introduction of InP high speed electronics into optical fiber transmission systems and current technological limits
1567 -- 1571Cezary Sydlo, Bastian Mottet, Husin Ganis, Hans L. Hartnagel, Viktor Krozer, S. L. Delage, Simone Cassette, Eric Chartier, D. Floriot, Steven Bland. Defect detection and modelling using pulsed electrical stress for reliability investigations of InGaP HBT
1573 -- 1578B. Lambert, N. Malbert, N. Labat, F. Verdier, A. Touboul, P. Huguet, R. Bonnet, G. Pataut. Evolution of LF noise in Power PHEMT s submitted to RF and DC Step Stresses
1579 -- 1584Gaudenzio Meneghesso, Gaudenzio Chini, Enrico Zanoni. Long Term Stability of InGaAs/AlInAs/GaAs Methamorphic HEMTs
1585 -- 1589Mattia Borgarino, Giovanna Sozzi, Andrea Mazzanti, Giovanni Verzellesi. Gate-lag effects in AlGaAs/GaAs power HFET's
1591 -- 1596R. Petersen, Ward De Ceuninck, Luc De Schepper, Olivier Vendier, Hervé Blanck, Dominique Pons. Determination of the thermal resistance and current exponent of heterojunction bipolar transistors for reliability evaluation
1597 -- 1601Stefan Dilhaire, Stéphane Grauby, Sébastien Jorez, Luis David Patiño Lopez, Emmanuel Schaub, Wilfrid Claeys. Laser diode COFD analysis by thermoreflectance microscopy
1603 -- 1607Paola Furcas, Rosaria De Palo, Maria Elena Patella, Giulia Salmini, Massimo Vanzi. Damp Heat test on LiNbO optical modulators
1609 -- 1614Gaudenzio Meneghesso, Simona Podda, Massimo Vanzi. Investigation on ESD-stressed GaN/InGaN-on-sapphire blue LEDs
1615 -- 1624Michael W. Lane, Jeffrey M. Snodgrass, Reinhold H. Dauskardt. Environmental Effects on Interfacial Adhesion
1625 -- 1630David Dalleau, Kirsten Weide-Zaage. Three-Dimensional Voids Simulation in chip Metallization Structures: a Contribution to Reliability Evaluation
1631 -- 1635Valeriy Sukharev, Ben P. Shieh, Ratan K. Choudhury, Chong W. Park, Krishna C. Saraswat. Reliability Studies on Multilevel Interconnection with Intermetal Dielectric Air Gaps
1637 -- 1641Alan Mathewson, Carlos Montes de Oca, Sean Foley. Thermomechanical stress analysis of Cu/low-k dielectric interconnect schemes
1643 -- 1648Risto Rautioaho, Olli Nousiainen, Seppo Leppävuori, Jaakko Lenkkeri, Tuomo Jaakola. Thermal fatigue in solder joints of Ag-Pd and Ag-Pt metallized LTCC modules
1649 -- 1656Claude Drevon. RF Packaging for Space Applications: from Micropackage to SOP - "System On a Package"
1657 -- 1662Ulrich Wagner, J. Franz, M. Schweiker, Winfried Bernhard, Roland Müller-Fiedler, Bernd Michel, Oliver Paul. Mechanical Reliability of MEMS-structures under shock load
1663 -- 1669Guy Lefranc, Gerhard Mitic, H.-J. Schultz. Thermal management and reliability of multi-chip power modules
1671 -- 1676J. M. Bosc. Integrated power transistor size optimisation
1677 -- 1682Stéphane Forster, Thierry Lequeu, Robert Jérisian. Operation of power semiconductors under transient thermal conditions: thermal fatigue reliability and mechanical aspects
1683 -- 1687Luca Sponton, Lorenzo Cerati, Giuseppe Croce, Francesco Chrappan, Claudio Contiero, Gaudenzio Meneghesso, Enrico Zanoni. ESD protection structures for BCD5 smart power technologies
1689 -- 1694Reinhard Schlegel, E. Herr, F. Richter. Reliability of non-hermetic pressure contact IGBT modules
1695 -- 1700Gerard Coquery, S. Carubelli, J. P. Ousten, Richard Lallemand, Frederic Lecoq, Dominique Lhotellier, V. de Viry, Ph. Dupuy. Power module lifetime estimation from chip temperature direct measurement in an automotive traction inverter
1701 -- 1705G. Simon, G. Guffroy. A pragmatic methodology for the monitoring of the electronic components ageing: The case of power thyristors at EDF
1707 -- 1712Yannick Rey-Tauriac, M. Taurin, Olivier Bonnaud. High reliability power VDMOS Transistors in Bipolar/CMOS/DMOS technology
1713 -- 1718Uwe Scheuermann, E. Herr. A Novel Power Module Design and Technology for Improved Power Cycling Capability
1719 -- 1723M. Thoben, X. Xie, D. Silber, J. Wilde. Reliability of Chip/DCB Solder Joints in AlSiC Base Plate Power Modules: Influence of Chip Size
1725 -- 1729Giovanni Busatto, Francesco Iannuzzo, Francesco Velardi, Jeffery Wyss. Non-destructive tester for single event burnout of power diodes
1731 -- 1736Stephane Azzopardi, Atsuo Kawamura, Hideo Iwamoto, Olivier Briat, Jean-Michel Vinassa, Eric Woirgard, Christian Zardini. Local lifetime control IGBT structures: turn-off performances comparison for hard- and soft-switching between 1200V trench and new planar PT-IGBTs

Volume 41, Issue 8

1101 -- 0Wallace T. Anderson, Roberto Menozzi. Editorial
1103 -- 1108Joachim Würfl, Paul Kurpas, Frank Brunner, Michael Mai, Matthias Rudolph, Markus Weyers. Degradation properties of MOVPE-grown GaInP/GaAs HBTs under combined temperature and current stressing
1109 -- 1113W. T. Anderson, J. A. Roussos, J. A. Mittereder, D. E. Ioannou, C. Moglestue. Pseudomorphic high electron mobility transistor monolithic microwave integrated circuits reliability study
1115 -- 1122B. M. Paine, R. C. Wong, A. E. Schmitz, R. H. Walden, L. D. Nguyen, M. J. Delaney, K. C. Hum. Ka-band InP high electron mobility transistor monolithic microwave integrated circuit reliability
1123 -- 1127William J. Roesch. Volume impacts on GaAs reliability improvement
1129 -- 1135S. Thomas III, C. H. Fields, M. Madhav. RF modeling approach to determining end-of-life reliability for InP-based HBTs
1137 -- 1141Peter Dai, Philip Canfield. Location of defective cells in HBT power amplifier arrays using IR emission microscopy
1143 -- 1144Daniel L. Barton, Shigeru Nakajima, Massimo Vanzi. Editorial
1145 -- 1159Edward I. Cole Jr.. Global fault localization using induced voltage alteration
1161 -- 1169Ingrid De Wolf, Mahmoud Rasras. Spectroscopic photon emission microscopy: a unique tool for failure analysis of microelectronics devices
1171 -- 1183Yasuhiro Mitsui, Fumiko Yano, Hiroshi Kakibayashi, Hiroyasu Shichi, Takashi Aoyama. Developments of new concept analytical instruments for failure analyses of sub-100 nm devices
1185 -- 1191K. Krieg, D. J. Thomson, Gregory E. Bridges. Electrical probing of deep sub-micron integrated circuits using scanning probes
1193 -- 1201Silke Liebert. Failure analysis from the back side of a die
1203 -- 1209Chisato Hashimoto, Takamitsu Takizawa, Sigeru Nakajima, Mitsuru Shinagawa, Tadao Nagatsuma. Observation of the internal waveforms in high-speed high-density LSIs using an EOS prober
1211 -- 1229L. A. Knauss, A. B. Cawthorne, N. Lettsome, S. Kelly, S. Chatraphorn, E. F. Fleet, F. C. Wellstood, W. E. Vanderlinde. Scanning SQUID microscopy for current imaging
1231 -- 1236Bernd Ebersberger, Alexander Olbrich, Christian Boit. Scanning probe microscopy in semiconductor failure analysis
1237 -- 1242J. M. Chin, J. C. H. Phang, D. S. H. Chan, M. Palaniappan, G. Gilfeather, C. E. Soh. Single contact optical beam induced currents
1243 -- 1253T. Koyama, M. Umeno, K. Sonoda, J. Komori, Y. Mashiko. Locally delineating of junctions and defects by local cross-section electron-beam-induced-current technique
1255 -- 1258Yuan Ji, Ziguo Li, Dong Wang, Yaohai Cheng, Dong Luo, Bin Zong. Scanning thermal microscopy studies of local temperature distribution of micron-sized metallization lines
1259 -- 1264M. K. Mazumder, S. Yamamoto, H. Maeda, J. Komori, Y. Mashiko. Mechanism of pre-annealing effect on electromigration immunity of Al-Cu line
1265 -- 1272Hide Murayama, Makoto Yamazaki, Shigeru Nakajima. Electromigration and electrochemical reaction mixed failure mechanism in gold interconnection system

Volume 41, Issue 7

935 -- 0Andreas Martin. Editorial
937 -- 945Gerald Lucovsky, Gilbert B. Rayner, Robert S. Johnson. Chemical and physical limits on the performance of metal silicate high-k gate dielectrics
947 -- 950T. Mikolajick, C. Dehm, W. Hartner, I. Kasko, M. J. Kastner, N. Nagel, M. Moert, C. Mazure. FeRAM technology for high density applications
951 -- 957P. O Sullivan, R. Clerc, Kevin G. McCarthy, Alan Mathewson, G. Ghibaudo. Direct tunnelling models for circuit simulation
959 -- 965G. Reimbold, T. Poiroux. Plasma charging damage mechanisms and impact on new technologies
967 -- 971R. Falster, F. Bonoli, V. V. Voronkov. Dielectric breakdown distributions for void containing silicon substrates
973 -- 975G. Innertsberger, T. Pompl, M. Kerber. The influence of p-polysilicon gate doping on the dielectric breakdown of PMOS devices
977 -- 980A. Stadler, I. Genchev, A. Bergmaier, G. Dollinger, V. Petrova-Koch, Walter Hansch, H. Baumgärtner, I. Eisele. Nitrogen implantations for rapid thermal oxinitride layers
981 -- 985L. Jalabert, Pierre Temple-Boyer, G. Sarrabayrouse, F. Cristiano, B. Colombeau, F. Voillot, C. Armand. Reduction of boron penetration through thin silicon oxide with a nitrogen doped silicon layer
987 -- 990M. P. M. Jank, Martin Lemberger, Anton J. Bauer, Lothar Frey, Heiner Ryssel. Electrical reliability aspects of through the gate implanted MOS structures with thin oxides
991 -- 994H. J. Osten, J. P. Liu, H.-J. Müssig, P. Zaumseil. Epitaxial, high-K dielectrics on silicon: the example of praseodymium oxide
995 -- 998C. Zhao, G. Roebben, H. Bender, E. Young, S. Haukka, M. Houssa, M. Naili, Stefan De Gendt, Marc M. Heyns, O. Van Der Biest. In situ crystallisation in ZrO::2:: thin films during high temperature X-ray diffraction
999 -- 1002N. Galbiati, G. Ghidini, C. Cremonesi, L. Larcher. Impact of the As dose in 0.35 mum EEPROM technology: characterization and modeling
1003 -- 1006D. Brazzelli, G. Ghidini, C. Riva. Optimization of WSi::2:: by SiH::4:: CVD: impact on oxide quality
1007 -- 1010Udo Schwalke, Martin Pölzl, Thomas Sekinger, Martin Kerber. Ultra-thick gate oxides: charge generation and its impact on reliability
1011 -- 1013R. Rodríguez, M. Porti, M. Nafría, X. Aymerich. Influence of a low field with opposite polarity to the stress on the degradation of 4.5 nm thick SiO::2:: films
1015 -- 1018M. Badila, Philippe Godignon, J. Millán, S. Berberich, G. Brezeanu. The electron irradiation effects on silicon gate dioxide used for power MOS devices
1019 -- 1022Gunnar Diestel, Andreas Martin, Martin Kerber, Alfred Schlemm, Horst Erlenmaier, Bernhard Murr, Andreas Preussger. Quality assessment of thin oxides using constant and ramped stress measurements
1023 -- 1026D. Zander, C. Petit, F. Saigné, A. Meinertzhagen. High field stress at and above room temperature in 2.3 nm thick oxides
1027 -- 1030R. Clerc, A. S. Spinelli, G. Ghibaudo, C. Leroux, G. Pananakakis. Electrical characterization and quantum modeling of MOS capacitors with ultra-thin oxides (1.4-3 nm)
1031 -- 1034S. Bruyère, D. Roy, E. Robilliart, E. Vincent, G. Ghibaudo. Body effect induced wear-out acceleration in ultra-thin oxides
1035 -- 1039F. Monsieur, E. Vincent, G. Pananakakis, G. Ghibaudo. Wear-out, breakdown occurrence and failure detection in 18-25 Å ultrathin oxides
1041 -- 1044M. Porti, X. Blasco, M. Nafría, X. Aymerich, Alexander Olbrich, Bernd Ebersberger. Local current fluctuations before and after breakdown of thin SiO::2:: films observed with conductive atomic force microscope
1045 -- 1048Nihar R. Mohapatra, A. Dutta, G. Sridhar, Madhav P. Desai, V. Ramgopal Rao. Sub-100 nm CMOS circuit performance with high-K gate dielectrics
1049 -- 1051A. Kumar, S. Mahapatra, R. Lal, V. Ramgopal Rao. Multi-frequency transconductance technique for interface characterization of deep sub-micron SOI-MOSFETs
1053 -- 1056B. J. O Sullivan, P. K. Hurley, F. N. Cubaynes, P. A. Stolk, F. P. Widdershoven. Flat band voltage shift and oxide properties after rapid thermal annealing
1057 -- 1061V. Mikhelashvili, G. Eisenstein. Optical and electrical characterization of the electron beam gun evaporated TiO::2:: film
1063 -- 1066G. Borsoni, N. Béchu, M. Gros-Jean, M. L. Korwin-Pawlowski, R. Laffitte, V. Le Roux, L. Vallier, N. Rochat, C. Wyon. Ultra-thin oxides on silicon fabricated using ultra-slow multicharged ion beams
1067 -- 1069J.-W. Zahlmann-Nowitzki, L. Nebrich, P. Seegebrecht. On the influence of the variation of measurement conditions on the FNT characteristics of stressed thin silicon oxides
1071 -- 1076N. Asli, M. I. Vexler, A. F. Shulekin, P. D. Yoder, I. V. Grekhov, P. Seegebrecht. Threshold energies in the light emission characteristics of silicon MOS tunnel diodes
1077 -- 1079D. Hill, X. Blasco, M. Porti, M. Nafría, X. Aymerich. Characterising the surface roughness of AFM grown SiO::2:: on Si
1081 -- 1083D. Weber, F. Höhnsdorf, A. Hausmann, A. Klipp, Z. Stavreva, J. Herrmann, L. Bauch, M. Junack, H. Neef, M. Nichterwitz, S. Finsterbusch. Impact of substituting SiO::2:: ILD by low k materials into AlCu RIE metallization
1085 -- 1088S. Strobel, Anton J. Bauer, Matthias Beichele, Heiner Ryssel. Suppression of boron penetration through thin gate oxides by nitrogen implantation into the gate electrode in PMOS devices
1089 -- 1092Matthias Beichele, Anton J. Bauer, Heiner Ryssel. Reliability of ultrathin nitrided oxides grown in low pressure N::2::O ambient
1093 -- 1096J. Dabrowski, V. Zavodinsky, A. Fleszar. Pseudopotential study of PrO::2:: and HfO::2:: in fluorite phase
1097 -- 1100B. Lanchava, P. Baumgartner, A. Martin, A. Beyer, E. Mueller. Oxide reliability: influence of interface roughness, structure layout, and depletion layer formation

Volume 41, Issue 6

779 -- 0Brian K. Jones. In the memory of Yisong Dai
781 -- 788Stephen O Reilly, Maeve Duffy, Thomas Ott, Terence O Donnell, Paul McCloskey, S. Cian O Mathuna. Characterisation of embedded filters in advanced printed wiring boards
789 -- 795Roland Sorge, Bernd Heinemann. Recombination current measurements in the space charge region of MOS field-induced pn junctions
797 -- 804Mark Zwolinski. A technique for transparent fault injection and simulation in VHDL
805 -- 814Michael J. Dion. Improved understanding of metal ion reservoirs within barrier-metal systems
815 -- 822Michael Schenkel, Paul Pfäffli, Wolfgang Wilkening, D. Aemmer, Wolfgang Fichtner. Substrate potential shift due to parasitic minority carrier injection in smart-power ICs: measurements and full-chip 3D device simulation
823 -- 835Mirko Jakovljevic, Peter A. Fotiu, Zeljko Mrcarica, Vanco B. Litovski, Helmut Detter. Electro-thermal simulation of microsystems with mixed abstraction modelling
837 -- 845Slobodan Mijalkovic. A new finite element approach to stress analysis in microfabrication technology
847 -- 854M. J. Martín-Martínez, S. Pérez, D. Pardo, T. González. High injection effects on noise characteristics of Si BJTs and SiGe HBTs
855 -- 860S. Haendler, J. Jomaah, G. Ghibaudo, F. Balestra. Improved analysis of low frequency noise in dynamic threshold MOS/SOI transistors
861 -- 869Michael Scheffler, Didier Cottet, Gerhard Tröster. A simplified yield modeling method for design rule trade-off in interconnection substrates
871 -- 879G. Golan, A. Axelevitch, E. Rabinovitch. Effects of electron beam generated in vacuum photo-thermal processing on metal-silicon contacts
881 -- 886Martin Sandén, B. Gunnar Malm, Jan V. Grahn, Mikael Östling. Lateral base design rules for optimized low-frequency noise of differentially grown SiGe heterojunction bipolar transistors
887 -- 899J. Barton, G. McCarthy, R. Doyle, K. Delaney, Enric Cabruja, M. Lozano, A. Collado, J. Santander. Reliability evaluation of a silicon-on-silicon MCM-D package
901 -- 912F. N. Masana. A new approach to the dynamic thermal modelling of semiconductor packages
913 -- 917W. Y. Ho, C. Surya. Study of light-induced annealing effects in a-Si: H thin films
919 -- 925Yisong Dai. Generation-recombination noise in bipolar transistors
927 -- 931Lingfeng Mao, Changhua Tan, Mingzhen Xu. The effect of image potential on electron transmission and electric current in the direct tunneling regime of ultra-thin MOS structures

Volume 41, Issue 5

625 -- 632Elyse Rosenbaum, Jie Wu. Trap generation and breakdown processes in very thin gate oxides
633 -- 638Petteri Palm, Jarmo Määttänen, Aulis Tuominen, Eero Ristolainen. Reliability of 80 mum pitch flip chip attachment on flex
639 -- 647Shatil Haque, Guo-Quan Lu. Effects of device passivation materials on solderable metallization of IGBTs
661 -- 668Jaakko Lenkkeri, Tuomo Jaakola. Rapid power cycling of flip-chip and CSP components on ceramic substrates
669 -- 676Andrzej Dziedzic, Leszek J. Golonka, Jaroslaw Kita, Heiko Thust, Karl-Heinz Drue, Reinhard Bauer, Lars Rebenklau, Klaus-Jürgen Wolter. Electrical and stability properties and ultrasonic microscope characterisation of low temperature co-fired ceramics resistors
677 -- 687S. C. Hung, P. J. Zheng, S. H. Ho, S. C. Lee, H. N. Chen, J. D. Wu. Board level reliability of PBGA using flex substrate
689 -- 696Yung-Huei Lee, Tom Linton, Ken Wu, Neal Mielke. Effect of trench edge on pMOSFET reliability
697 -- 704Takayuki Yamada, Masaru Moriwaki, Yoshinao Harada, Shinji Fujii, Koji Eriguchi. Effects of the sputtering deposition process of metal gate electrode on the gate dielectric characteristics
705 -- 713Greg Hotchkiss, Gonzalo Amador, Darvin Edwards, Paul Hundt, Les Stark, Roger Stierman, Gail Heinen. Wafer level packaging of a tape flip-chip chip scale packages
715 -- 733Harry K. Charles Jr.. Tradeoffs in multichip module yield and cost with known good die probability and repair
735 -- 744Frank Stepniak. Conversion of the under bump metallurgy into intermetallics: the impact on flip chip reliability
745 -- 749Kin P. Cheung. Impact of ESD protection device trigger transient on the reliability of ultra-thin gate oxide
751 -- 765Terence B. Hook, David Harmon, Chuan Lin. Plasma process-induced damage on thick (6.8 nm) and thin (3.5 nm) gate oxide: parametric shifts, hot-carrier response, and dielectric integrity degradation
767 -- 771D. Manic, J. Petr, R. S. Popovic. Die stress drift measurement in IC plastic packages using the piezo-Hall effect
773 -- 777O. Mrooz, A. Kovalski, J. Pogorzelska, O. Shpotyuk, M. Vakiv, Bohdan S. Butkiewicz, J. Maciak. Thermoelectrical degradation processes in NTC thermistors for in-rush current protection of electronic circuits

Volume 41, Issue 4

481 -- 0Ninoslav Stojadinovic, Michael G. Pecht. In memory of D. Stewart Peck
483 -- 490Udo Schwalke. Progress in device isolation technology
491 -- 498Roland Reicher, Walter Smetana, Julius C. Schuster, Alexander Adlaßnig. A fritless copper conductor system for power electronic applications
499 -- 510Dale W. Swanson, Leonard R. Enlow. Stress effects of epoxy adhesives on ceramic substrates and magnetics
511 -- 515Kai F. Dombrowski, B. Dietrich, I. De Wolf, R. Rooyackers, G. Badenes. Investigation of stress in shallow trench isolation using UV micro-Raman spectroscopy
517 -- 523M. P. Rodriguez, N. Y. A. Shammas. Finite element simulation of thermal fatigue in multilayer structures: thermal and mechanical approach
525 -- 530Yutaka Kumano, Yoshihiro Tomura, Minehiro Itagaki, Yoshihiro Bessho. Development of chip-on-flex using SBB flip-chip technology
531 -- 542Dubravka Rocak, Darko Belavic, Marko Hrovat, Josef Sikula, Pavel Koktavy, Jan Pavelka, Vlasta Sedlakova. Low-frequency noise of thick-film resistors as quality and reliability indicator
543 -- 551T. Pompl, C. Engel, H. Wurzer, M. Kerber. Soft breakdown and hard breakdown in ultra-thin oxides
553 -- 562Quan Qi. Reliability studies of two flip-chip BGA packages using power cycling test
571 -- 578D. G. Walker, T. S. Fisher, J. Liu, R. D. Schrimpf. Thermal modeling of single event burnout failure in semiconductor power devices
579 -- 585R. Kolarova, Thomas Skotnicki, J. A. Chroboczek. Low frequency noise in thin gate oxide MOSFETs
587 -- 595Koji Eriguchi, Yoshinao Harada, Masaaki Niwa. Effects of base layer thickness on reliability of CVD Si::3::N::4:: stack gate dielectrics
597 -- 604Hongxia Ren, Yue Hao. Study on the degradation induced by donor interface state in deep-sub-micron grooved-gate P-channel MOSFET s
605 -- 610Magali Estrada, Antonio Cerdeira, Adelmo Ortiz-Conde, Francisco García. Determination of trap cross-section in a-Si: H p-i-n diodes parameters using simulation and parameter extraction
611 -- 615Valentin Videkov, Slavka Tzanova, Radosvet Arnaudov, Nikolai Iordanov. New assembling technique for BGA packages without thermal processes
617 -- 621Ammar M. Sarhan, A. M. Abouammoh. Reliability of k-out-of-n nonrepairable systems with nonindependent components subjected to common shocks
623 -- 624Milan Jevtic. Optimal Reliability Design: Fundamentals and Applications; Way Kuo, Rajendra Prasad, Frank A. Tillman, Ching-Lai Mwang. Cambridge University Press, Cambridge, 2001, 389+XXI pp. ISBN: 0-521-78127-2 (hardbound)

Volume 41, Issue 3

333 -- 0Koen G. Verhaege. Editorial
335 -- 348S. Voldman, W. Anderson, R. Ashton, M. Chaine, C. Duvvury, T. Maloney, E. Worley. A strategy for characterization and evaluation of ESD robustness of CMOS semiconductor technologies
349 -- 357Jeremy C. Smith. An anti-snapback circuit technique for inhibiting parasitic bipolar conduction during EOS/ESD events
359 -- 366Timothy J. Maloney, Wilson Kan. Stacked PMOS clamps for high voltage power supply protection
367 -- 373Warren R. Anderson, William M. Gonzalez, Sheera S. Knecht, Wendy Fowler. Reliability considerations for ESD protection under wire bonding pads
375 -- 383K. Bock, Bart Keppens, V. De Heyn, Guido Groeseneken, L. Y. Ching, A. Naem. Influence of gate length on ESD-performance for deep submicron CMOS technology
385 -- 393Harald Gossner, T. Müller-Lynch, K. Esmark, M. Stecher. Wide range control of the sustaining voltage of electrostatic discharge protection elements realized in a smart power technology
395 -- 405Gianluca Boselli, Stan Meeuwsen, Ton J. Mouthaan, Fred G. Kuper. Investigations on double-diffused MOS transistors under ESD zap conditions
407 -- 415L. G. Henry, M. A. Kelly, T. Diep, J. Barth. Issues concerning charged device model ESD verification modules - the need to move to alumina
417 -- 429Ming-Dou Ker, Yu-Yu Sung. Hardware/firmware co-design in an 8-bits microcontroller to solve the system-level ESD issue on keyboard
431 -- 436P. Schauer, Josef Sikula, P. Moravec. Transport and noise properties of CdTe(Cl) crystals
437 -- 443R. Dreesen, K. Croes, J. Manca, Ward De Ceuninck, Luc De Schepper, A. Pergoot, Guido Groeseneken. A new degradation model and lifetime extrapolation technique for lightly doped drain nMOSFETs under hot-carrier degradation
445 -- 453A. H. Fischer, A. Abel, M. Lepper, A. E. Zitzelsberger, A. von Glasow. Modeling bimodal electromigration failure distributions
455 -- 459Keizo Yamada, Toyokazu Nakamura, Tohru Tsujide. An in-line process monitoring method using electron beam induced substrate current
461 -- 469Thomas D. Moore, John L. Jarvis. Improved reliability in small multichip ball grid arrays
471 -- 480Christian Rembe, Harald Aschemann, Stefan aus der Wiesche, Eberhard P. Hofer, Hélèn Debéda, Jürgen Mohr, Ulrike Wallrabe. Testing and improvement of micro-optical-switch dynamics

Volume 41, Issue 2

145 -- 168F. Schwierz, Juin J. Liou. Semiconductor devices for RF applications: evolution and current status
169 -- 177M. M. De Souza, J. Wang, S. K. Manhas, E. M. Sankara Narayanan, A. S. Oates. A comparison of early stage hot carrier degradation behaviour in 5 and 3 V sub-micron low doped drain metal oxide semiconductor field effect transistors
179 -- 184Hei Wong, P. G. Han, M.-C. Poon, Y. Gao. Investigation of the surface silica layer on porous poly-Si thin films
185 -- 191M. N. Levin, V. R. Gitlin, S. G. Kadmensky, S. S. Ostrouhov, V. S. Pershenkov. X-ray and UV controlled adjustment of MOS VLSI circuits threshold voltages
193 -- 199Kin P. Cheung. Unifying the thermal-chemical and anode-hole-injection gate-oxide breakdown models
201 -- 209C. T. Hsu, M. M. Lau, Y. T. Yeow. Analysis of the gate capacitance measurement technique and its application for the evaluation of hot-carrier degradation in submicrometer MOSFETs
211 -- 218Robert C. Baumann, Eric B. Smith. Neutron-induced :::10:::B fission as a major source of soft errors in high density SRAMs
219 -- 228Alexander N. Bubennikov, Andrey V. Zykov. Investigations of impact ionization phenomena in advanced transistors and speed-power improvement of BiMOS SRAM cells based on reverse base current effect
229 -- 237Gábor Harsányi, George Inzelt. Comparing migratory resistive short formation abilities of conductor systems applied in advanced interconnection systems
239 -- 252Constance E. Schuster, Mark G. Vangel, Harry A. Schafft. Improved estimation of the resistivity of pure copper and electrical determination of thin copper film dimensions
253 -- 263L. Militaru, A. Souifi, M. Mouis, A. Chantre, G. Brémond. Investigation of deep traps in silicon-germanium epitaxial base bipolar transistors with a single polysilicon quasi self-aligned architecture
265 -- 271Nicolas Valdaperez, Jean-Marc Routoure, Daniel Bloyet, Régis Carin, Serge Bardy, Jacques Lebailly. Low-frequency noise in single-poly bipolar transistors at low base current density
273 -- 279A. C. Lamb, J. F. W. Schiz, J. M. Bonar, F. Cristiano, P. Ashburn, S. Hall, P. L. F. Hemment. Characterisation of emitter/base leakage currents in SiGe HBTs produced using selective epitaxy
281 -- 286Jingsong Xie, Michael G. Pecht, David DeDonato, Ali Hassanzadeh. An investigation of the mechanical behavior of conductive elastomer interconnects
287 -- 293P. L. Tu, Y. C. Chan, K. C. Hung, J. K. L. Lai. Study of micro-BGA solder joint reliability
295 -- 305Shatil Haque, Kalyan Siddabattula, Mike Craven, Sihua Wen, Xingsheng Liu, Dusan Boroyevich, Guo-Quan Lu. Design issues of a three-dimensional packaging scheme for power modules
307 -- 315L. Y. Sheng, C. De Tandt, Willy Ranson, Roger Vounckx. Reliability aspects of thermal micro-structures implemented on industrial 0.8 mum CMOS chips
317 -- 322Loren J. Wise, Ronald D. Schrimpf, Harold G. Parks, Kenneth F. Galloway. A generalized model for the lifetime of microelectronic components, applied to storage conditions
323 -- 332Asad A. Ismaeel, Rajan Mathew, R. Bhatnagar. Module allocation with idle-time utilization for on-line testability

Volume 41, Issue 12

1915 -- 1921Alexander Ambatiello, Josef Deichler. Low and high temperature device reliability investigations of buried p-channel MOSFETs of a 0.17 mum technology
1923 -- 1931Gennadi Bersuker, Yongjoo Jeon, Howard R. Huff. Degradation of thin oxides during electrical stress
1933 -- 1938M. Da Rold, E. Simoen, Sofie Mertens, Marc Schaekers, G. Badenes, Stefaan Decoutere. Impact of gate oxide nitridation process on 1/f noise in 0.18 mum CMOS
1939 -- 1945Zhenqiu Ning, Yuri Sneyders, Wim Vanderbauwhede, Renaud Gillon, Marnix Tack, Paul Raes. A compact test structure for characterisation of leakage currents in sub-micron CMOS technologies
1953 -- 1957Jin He, Xing Zhang, Ru Huang, Yangyuan Wang. Extraction of the lateral distribution of interface traps in MOSFETs by a novel combined gated-diode technique
1959 -- 1963B. P. Yan, Y. F. Yang, C. C. Hsu, H. B. Lo, E. S. Yang. A reliability comparison of InGaP/GaAs HBTs with and without passivation ledge
1965 -- 1970D. Fedasyuk, E. Levus, D. Petrov. Flip-chip structure transient thermal model
1971 -- 1978Piotr Dziurdzia, Andrzej Kos. Monitoring of power dissipated in microelectronic structures
1979 -- 1992Xingsheng Liu, Shuangyan Xu, Guo-Quan Lu, David A. Dillard. Stacked solder bumping technology for improved solder joint reliability
1993 -- 2000P. L. Tu, Y. C. Chan, K. C. Hung. Reliability of microBGA assembly using no-flow underfill
2001 -- 2009Shyh-Ming Chang, Jwo-Huei Jou, Adam Hsieh, Tai-Hong Chen, Ching-Yun Chang, Yung-Hao Wang, Chun-Ming Huang. Characteristic study of anisotropic-conductive film for chip-on-film packaging
2011 -- 2021W. D. Zhuang, P. C. Chang, F. Y. Chou, R. K. Shiue. Effect of solder creep on the reliability of large area die attachment
2023 -- 2040Mykola Blyzniuk, Irena Kazymyra, Wieslaw Kuzmicz, Witold A. Pleskacz, Jaan Raik, Raimund Ubar. Probabilistic analysis of CMOS physical defects in VLSI circuits for test coverage improvement
2041 -- 2049S. Dordevic, P. Petkovic. A hierarchical approach to large circuit symbolic simulation
2051 -- 2065Robert I. Damper, Richard L. B. French, Tom W. Scutt. The Hi-NOON neural simulator and its applications
2067 -- 2070Bharatwaj Ramakrishnan, Peter Sandborn, Michael G. Pecht. Process capability indices and product reliability
2071 -- 2074M.-C. Poon, Y. Gao, T. C. W. Kok, A. M. Myasnikov, Hei Wong. SIMS study of silicon oxynitride prepared by oxidation of silicon-rich silicon nitride layer

Volume 41, Issue 11

1737 -- 0Markus P. J. Mergens. Foreword - On-Chip ESD
1739 -- 1749Koen G. Verhaege, Christian C. Russ. Novel fully silicided ballasting and MFT design techniques for ESD protection in advanced deep sub-micron CMOS technologies
1751 -- 1760James W. Miller, Michael G. Khazhinsky, James C. Weldon. Layout and bias options for maximizing V::t1:: in cascoded NMOS output buffers
1761 -- 1770K. Esmark, Wolfgang Stadler, M. Wendel, Harald Gossner, X. Guggenmos, Wolfgang Fichtner. Advanced 2D/3D ESD device simulation - a powerful tool already used in a pre-Si phase
1771 -- 1779Jie Wu, Patrick Juliano, Elyse Rosenbaum. Breakdown and latent damage of ultra-thin gate oxides under ESD stress conditions
1781 -- 1787Yu Wang, Patrick Juliano, Sopan Joshi, Elyse Rosenbaum. Electrothermal model for simulation of bulk-Si and SOI diodes in ESD protection circuits
1789 -- 1800Leo G. Henry, Mark A. Kelly, Tom Diep, Jon Barth. The importance of standardizing CDM ESD test head parameters to obtain data correlation
1801 -- 1808Franco Stellari, F. Zappa, S. Cova, L. Vendrame. Tools for contactless testing and simulation of CMOS circuits
1809 -- 1813Fernanda Irrera. Electrical degradation and recovery of dielectrics in n:::++:::-poly-Si/SiO::x::/SiO::2::/p-sub structures designed for application in low-voltage non-volatile memories
1815 -- 1822F. A. Stam, E. Davitt. Effects of thermomechanical cycling on lead and lead-free (SnPb and SnAgCu) surface mount solder joints
1823 -- 1828Kendall D. Hester, Matthew P. Koehler, Hanna Kanciak-Chwialkowski, Brian H. Jones. An assessment of the value of added screening of electronic components for commercial aerospace applications
1829 -- 1839Dominique Wojciechowski, Moses Chan, Fabrizio Martone. Lead-free plastic area array BGAs and polymer stud grid arrays:::TM::: package reliability
1841 -- 1846X. Tang, X. Baie, J. P. Colinge, P. Loumaye, C. Renaux, V. Bayot. Influence of device geometry on SOI single-hole transistor characteristics
1847 -- 1855Deborah M. Mechtel, Harry K. Charles Jr., Arthur S. Francomacaro. The development of poled polyimide dielectric layers for simultaneous testing and light guiding applications in MCM-Ds
1857 -- 1866Mahamane Kader, Michel Lenczner, Zeljko Mrcarica. Distributed control based on distributed electronic circuits: application to vibration control
1867 -- 1875Y. C. Chan, P. L. Tu, K. C. Hung. Study of the self-alignment of no-flow underfill for micro-BGA assembly
1877 -- 1887Piotr Bratek, Andrzej Kos. A method of thermal testing of microsystems
1889 -- 1896Bing-Yue Tsui, Tsung-Ju Yang, Tzu-Kun Ku. Impact of interface nature on deep sub-micron Al-plug resistance
1897 -- 1902Kun-Wei Lin, Kuo-Hui Yu, Wen-Lung Chang, Chih-Kai Wang, Wen-Huei Chiou, Wen-Chau Liu. On the InGaP/In::x::Ga::1-x::As pseudomorphic high electron-mobility transistors for high-temperature operations
1903 -- 1907Lingfeng Mao, Yao Yang, Jian-Lin Wei, Heqiu Zhang, Mingzhen Xu, Changhua Tan. Effect of SiO::2::/Si interface roughness on gate current
1909 -- 1913Fuchen Mu, Mingzhen Xu, Changhua Tan, Xiaorong Duan. A new lifetime prediction method for hot-carrier degradation in n-MOSFETs with ultrathin gate oxides under V::g::=V::d::

Volume 41, Issue 1

1 -- 0Ninoslav Stojadinovic, Michael G. Pecht. Editorial
3 -- 12S. Deleonibus. Alternative CMOS or alternative to CMOS?
13 -- 19Joachim N. Burghartz. Status and trends of silicon RF technology
21 -- 30M. Borgarino, Roberto Menozzi, D. Dieci, L. Cattani, Fausto Fantini. Reliability physics of compound semiconductor transistors for microwave applications
31 -- 35Wim Magnus, Wim Schoenmaker. On the calculation of gate tunneling currents in ultra-thin metal-insulator-semiconductor capacitors
37 -- 46Nian Yang, Jimmie J. Wortman. A study of the effects of tunneling currents and reliability of sub-2 nm gate oxides on scaled n-MOSFETs
47 -- 52A. Teramoto, H. Umeda, K. Azamawari, K. Kobayashi, K. Shiga, J. Komori, Y. Ohno, A. Shigetomi. Time-dependent dielectric breakdown of SiO::2:: films in a wide electric field range
53 -- 57Peter Coppens, Guido Vanhorebeek, Eddy De Backer. Correlation between predicted cause of SRAM failures and in-line defect data
59 -- 66Milan Jevtic, Z. Stanimirovic, I. Stanimirovic. Evaluation of thick-film resistor structural parameters based on noise index measurements
67 -- 72G. Golan, E. Rabinovich, A. Inberg, A. Axelevitch, G. Lubarsky, P. G. Rancoita, M. Demarchi, A. Seidman, N. Croitoru. Inversion phenomenon as a result of junction damages in neutron irradiated silicon detectors
73 -- 77Javier Mateos, Tomás González, Daniel Pardo, Virginie Hoel, Alain Cappy. Monte Carlo simulation of electronic characteristics in short channel delta-doped AlInAs/GaInAs HEMTs
79 -- 85H. Ohyama, E. Simoen, S. Kuroda, C. Claeys, Y. Takami, T. Hakata, K. Kobayashi, M. Nakabayashi, H. Sunaga. Degradation and recovery of AlGaAs/GaAs p-HEMT irradiated by high-energy particle
87 -- 97B. K. Jones, C. N. Graham, A. Konczakowska, L. Hasse. The coherence of the gate and drain noise in stressed AlGaAs-InAlGaAs PHEMTs
99 -- 104Gaetano Ferrante, Dominique Persano Adorno. A wavelet analysis of 1/f and white noise in microwave transistors
105 -- 110X. Y. Chen, A. Pedersen, A. D. van Rheenen. Effect of electrical and thermal stress on low-frequency noise characteristics of laser diodes
111 -- 118H. Oohashi, M. Fukuda, Y. Kondo, M. Yamamoto, Y. Kadota, Y. Kawaguchi, K. Kishi, Y. Tohmori, K. Yokoyama, Y. Itaya. Highly reliable spot-size converter integrated laser diodes over a wide temperature range for access network systems
119 -- 128Chern-Sheng Lin, Li Wen Lue. An image system for fast positioning and accuracy inspection of ball grid array boards
129 -- 131Fuchen Mu, Changhua Tan, Mingzhen Xu. Proportional difference estimate method of determining characteristic parameters of normal and log-normal distributions
133 -- 136Klaus-Willi Pieper, Martin Sauter. Direct temperature measurement of integrated microelectronic devices by thermally induced leakage currents
137 -- 140M. M. Shahidul Hassan, A. H. Khandoker. New expression for base transit time in a bipolar transistor for all levels of injection
141 -- 142Milan Jevtic. Guidebook for Managing Silicon Chip Reliability; Michael G. Pecht, Riko Radojcic, Gopal Rao. CRC Press LLC, Boca Raton, 1999, 224 pp. ISBN: 0-8493-9624-7
142 -- 143Ninoslav Stojadinovic. Understanding Semiconductor Devices; Sima Dimitrijev. Oxford University Press, New York. 2000. ISBN: 0-19-513186-X