Abstract is missing.
- Asymmetric halo CMOSFET to reduce static power dissipation with improved performanceAditya Bansal, Kaushik Roy. 1-4 [doi]
- Limits to performance spread tuning using adaptive voltage and body biasingMaurice Meijer, Francesco Pessolano, José Pineda de Gyvez. 5-8 [doi]
- Adaptive circuit techniques to minimize variation impacts on microprocessor performance and powerJames Tschanz, Siva Narendra, Ali Keshavarzi, Vivek De. 9-12 [doi]
- Device technology for body biasing schemeKiyotaka Imai, Yasushi Yamagata, Sadaaki Masuoka, Naohiko Kimuzuka, Yuri Yasuda, Mitsuhiro Togo, Masahiro Ikeda, Yasutaka Nakashiba. 13-16 [doi]
- Optimum threshold-voltage tuning for low-power, high-performance microprocessorMasayuki Miyazaki, Goichi Ono, Takayuki Kawahara. 17-20 [doi]
- Minimizing power with flexible voltage islandsRuchir Puri, David S. Kung, Leon Stok. 21-24 [doi]
- Robust VLSI architecture for system-on-chip design and its implementation in Viterbi decoderYasuyuki Hatakawa, Shingo Yoshizawa, Yoshikazu Miyanaga. 25-28 [doi]
- A systematic framework for high throughput MAP decoder VLSI architecturesMahmoud Elassal, Ashok Kumar, Magdy Bayoumi. 29-32 [doi]
- System on chip FPGA design of an FM demodulator using a Kalman band-pass sigma-delta architectureSaman S. Abeysekera, Charoensak Charayaphan. 33-36 [doi]
- High level hardware/software communication estimation in shared memory architectureSujan Pandey, Heiko Zimmer, Manfred Glesner, Max Mühlhäuser. 37-40 [doi]
- A novel low-power reconfigurable FFT processorYutian Zhao, Ahmet T. Erdogan, Tughrul Arslan. 41-44 [doi]
- Concentrator access networks for programmable logic cores on SoCsBradley R. Quinton, Steven J. E. Wilton. 45-48 [doi]
- A collision-based model for multi user interference in impulse radio UWB networksMaria-Gabriella Di Benedetto, Guerino Giancola. 49-52 [doi]
- On the acquisition time for serial and parallel code search in UWB impulse radioLuca Reggiani, Gian Mario Maggio. 53-56 [doi]
- Ultra-low power UWB for real time biomedical wireless sensingChun-Yi Lee, Christofer Toumazou. 57-60 [doi]
- Digitizing of UWB signals based on frequency channelizationWon Namgoong, Lei Feng. 61-64 [doi]
- Quasi-cyclic low-density parity-check coded multi-band-OFDM UWB systemsSang-Min Kim, Jun Tang, Keshab K. Parhi. 65-68 [doi]
- A novel covalent redundant binary Booth encoderYajuan He, Chip-Hong Chang, Jiangmin Gu, Hossam A. H. Fahmy. 69-72 [doi]
- A 32×24-bit multiplier-accumulator with advanced rectangular styled Wallace-tree structureNiichi Itoh, Yasumasa Tsukamoto, Takeshi Shibagaki, Koji Nii, Hidehiro Takata, Hiroshi Makino. 73-76 [doi]
- A design methodology for hybrid carry-lookahead/carry-select adders with reconfigurabilityJin-Fu Li, Jiunn-Der Yu, Yu-Jen Huang. 77-80 [doi]
- A framework for the design of error-aware power-efficient fixed-width Booth multipliersMin-An Song, Lan-Da Van, Chih-Chyau Yang, Shih-Chieh Chiu, Sy-Yen Kuo. 81-84 [doi]
- A novel multiplexer based truncated array multiplierChip-Hong Chang, Ravi Kumar Satzoda, Swaminathan Sekar. 85-88 [doi]
- A combined two s complement and floating-point comparatorJames E. Stine, Michael J. Schulte. 89-92 [doi]
- A global interconnect optimization algorithm under accurate delay model using solution space smoothingYici Cai, Yibo Wang, Xianlong Hong. 93-96 [doi]
- An efficient algorithm for buffered routing tree construction under fixed buffer locations with accurate delay modelsYiqian Zhang, Xianlong Hong, Yici Cai. 97-100 [doi]
- Zero skew clock routing with tree topology construction using simulated annealing methodXinjie Wei, Yici Cai, Xianlong Hong. 101-104 [doi]
- A sparsified vector potential equivalent circuit model for massively coupled interconnectsHao Yu, Lei He. 105-108 [doi]
- An efficient algorithm for simultaneous wire permutation, inversion, and spacingShanq-Jang Ruan, Edwin Naroska, Uwe Schwiegelshohn. 109-112 [doi]
- Power-optimal simultaneous buffer insertion/sizing and uniform wire sizing for single long wiresRuiming Li, Dian Zhou, Jin Liu, Xuan Zeng. 113-116 [doi]
- An electron mobility independent pulse skipping regulator for a programmable CMOS charge pumpAlberto Saiz-Vela, Pedro Luis Miribel-Català, Manuel Puig-Vidal, Josep Samitier. 117-120 [doi]
- High-efficiency control structure for CMOS flash memory charge pumpsChiara Boffino, Alessandro Cabrini, Osama Khouri, Guido Torelli. 121-124 [doi]
- Integration of high voltage charge-pumps in a submicron standard CMOS process for programming analog floating-gate circuitsMark Hooper, Matt Kucic, Paul E. Hasler. 125-128 [doi]
- Optimum quiescent point of integrated power CMOS transistor for wireless portable applicationsHeng-Ming Hsu, Tai-Hsing Lee. 129-132 [doi]
- Design technique of an on-chip, high-voltage charge pump in SOIMohammad R. Hoque, T. Ahmad, Todd McNutt, H. Alan Mantooth, Mohommad M. Mojarradi. 133-136 [doi]
- A monolithic isolation amplifier in silicon-on-insulator CMOSEugenio Culurciello, Philippe O. Pouliquen, Andreas G. Andreou, Kim Strohbehn, Steven E. Jaskulek. 137-140 [doi]
- A specific integrated controller for nanomicroscopy and cellular manipulationRaimon Casanova, Junajo Lacort, Ángel Dieguez, Anna Arbat, Manel Puig, Josep Samitier, Marc Nierlich, Oliver Steinmetz, Oliver Scholz. 141-144 [doi]
- A distributed neural signal sensor systemChris Clarke, John Taylor, Robert Rieger, Nick Donaldson. 145-148 [doi]
- Automatic detection of region of interest and center point of left ventricle using watershed segmentationJierong Cheng, Say Wei Foo, Shankar M. Krishnan. 149-151 [doi]
- Assessment of driver s driving performance and alertness using EEG-based fuzzy neural networksChin-Teng Lin, Yu-Chieh Chen, Ruei-Cheng Wu, Sheng-Fu Liang, Teng-Yi Huang. 152-155 [doi]
- Classification of driver s cognitive responses from EEG analysisSheng-Fu Liang, Chin-Teng Lin, Ruei-Cheng Wu, Teng-Yi Huang, Wen-Hung Chao. 156-159 [doi]
- Partitioning graphs of supply and demandTakehiro Ito, Xiao Zhou, Takao Nishizeki. 160-163 [doi]
- Advances in QoS path(s) selection problemKrishnaiyan Thulasiraman, Ying Xiao, Guoliang Xue. 164-167 [doi]
- On generating elementary T-invariants of Petri nets by linear programmingTomiyuki Fukunaga, Qi-Wei Ge, Mitsuru Nakata. 168-171 [doi]
- Hierarchical extraction of a spanning planar subgraph maintaining clockwise directedness of cyclesDaisuke Takafuji, Toshimasa Watanabe. 172-175 [doi]
- Scheduling problems for a class of parallel distributed systemsHiroshi Tamura, Futoshi Tasaki, Masakazu Sengoku, Shoji Shinoda. 176-179 [doi]
- On the three-dimensional channel routingSatoshi Tayu, Patrik Hurtig, Yoshiyasu Horikawa, Shuichi Ueno. 180-183 [doi]
- An energy-efficient charge recycling approach for a SAR converter with capacitive DACBrian P. Ginsburg, Anantha P. Chandrakasan. 184-187 [doi]
- Novel successive-approximation algorithmsHarri Lampinen, Pauli Perälä, Olli Vainio. 188-191 [doi]
- A 1V supply successive approximation ADC with rail-to-rail input voltage rangeTakeshi Yoshida, Miho Akagi, Mamoru Sasaki, Atsushi Iwata. 192-195 [doi]
- . A new switch compensation technique for inverted R-2R ladder DACsD. Marche, Yves Gagnon, Yvon Savaria. 196-199 [doi]
- A new offset cancellation technique for folding ADCHamid Movahedian, Mehrdad Sharif Bakhtiar. 200-203 [doi]
- Characterization and noise analysis of a 12-bit current steering digital-to-analog converterTomás Lahoz, Enrique Barajas, José Luis González. 204-207 [doi]
- High linear digitally programmable gain amplifierBelén Calvo, Maria Teresa Sanz, Santiago Celma. 208-211 [doi]
- Impact of bias schemes on Doherty power amplifiersChih-Yun Liu, Yi-Jan Emery Chen, Deuk Hyoun Heo. 212-215 [doi]
- High current CMOS operational amplifierMikko Loikkanen, Juha Kostamovaara. 216-219 [doi]
- Design of a 0.8 Volt fully differential CMOS OTA using the bulk-driven techniqueYasutaka Haga, Hashem Zare-Hoseini, Laurence Berkovi, Izzet Kale. 220-223 [doi]
- Design and analysis of a micropower low-voltage bang-bang control class D amplifierTong Ge, Meng Tong Tan, Joseph Sylvester Chang. 224-227 [doi]
- Op amp tuning for high accuracy deep sub-micron CMOS analog circuits [voltage regulator example]Christian Falconi, Giuliano Guarino, Arnaldo D Amico. 228-231 [doi]
- Formal synthesis of circuits using linear matrix inequalitiesJeffrey Harrison. 232-235 [doi]
- Multiple resonance networks with incomplete energy transfer and operating with zero-state responseAntônio Carlos M. de Queiroz. 236-239 [doi]
- The separability, reducibility and controllability of RLCM networks over F(z)Kai-Sheng Lu, Xiao-Yu Feng, Guo-Zhang Gao. 240-243 [doi]
- Symbolic passive-RC circuit synthesis by admittance matrix expansionDavid G. Haigh, Paul M. Radmore. 244-247 [doi]
- Symbolic active-RC circuit synthesis by admittance matrix expansionDavid G. Haigh. 248-251 [doi]
- Generation of equivalent circuits by FTFN relocationRogelio Palomera-Garcia. 252-255 [doi]
- An active noise control system based on simultaneous equations method without auxiliary filtersMitsuji Muneyasu, Osamu Hisayasu, Kensaku Fujii, Takao Hinamoto. 256-259 [doi]
- A filtered-X RLS based narrowband active noise control system in the presence of frequency mismatchYegui Xiao, Liying Ma, Khashayar Khorasani, Akira Ikuta, Li Xu. 260-263 [doi]
- A method for online secondary path modeling in active noise control systemsMuhammad Tahir Akhtar, Masahide Abe, Masayuki Kawamata. 264-267 [doi]
- Active noise cancellation headsetSay Wei Foo, T. N. Senthilkumar, C. Averty. 268-271 [doi]
- A new noise reduction system based on ALE and noise reconstruction filterNaoto Sasaoka, Keisuke Sumi, Yoshio Itoh, Kensaku Fujii. 272-275 [doi]
- Adaptive noise equalizer with equal-loudness compensationWoon S. Gan, Sen M. Kuo, Jin Wei Feng. 276-279 [doi]
- Chaotic and periodic spreading dynamics in discrete small-world networksXiang Li, Hildegard Meyer-Ortmanns, Xiaofan Wang. 280-283 [doi]
- Pinning control of scale-free complex networksZhengping Fan, Guanrong Chen. 284-287 [doi]
- On-off intermittency in small-world networks of chaotic mapsChunguang Li, Jin-Qing Fang. 288-291 [doi]
- Agreement and consensus problems in groups of autonomous agents with linear dynamicsChai Wah Wu. 292-295 [doi]
- 3D dynamical networks to emulate complex neural phenomenaMaide Bucolo, Francesca Conti, Luigi Fortuna, Mattia Frasca. 296-299 [doi]
- Synchronization: a fundamental phenomenon in complex dynamical networksJinhu Lu, Henry Leung. 300-303 [doi]
- Linear transform based motion compensated prediction for luminance intensity changesDebing Liu, Yuwen He, Shipeng Li, Qingming Huang, Wen Gao. 304-307 [doi]
- A feature-based approach to fast H.264 intra/inter mode decisionChangsung Kim, C. C. Jay Kuo. 308-311 [doi]
- An improved rate control algorithm for H.264Hongtao Yu, Zhiping Lin, Feng Pan. 312-315 [doi]
- The technique of pre-scaled integer transformCixun Zhang, Jian Lou, Lu Yu, Jie Dong, Wai-kuen Cham. 316-319 [doi]
- An improved error concealment algorithm for intra-frames in H.264/AVCPanos Nasiopoulos, Lino Coria-Mendoza, Hassan Mansour, Adarsh Golikeri. 320-323 [doi]
- Quantization offsets for video codingThomas Wedi, Stefan Wittmann. 324-327 [doi]
- Iterative tri-stage decoding for turbo codes in partial response channelsMeng-Guang Tsai, Kuen-Suey Hou, Hen-Wai Tsao. 328-331 [doi]
- . Analog slice turbo decodingMatthieu Arzel, Cyril Lahuec, Fabrice Seguin, David Gnaedig, Michel Jézéquel. 332-335 [doi]
- A memory-based architecture for FPGA implementations of low-density parity-check convolutional decodersStephen Bates, Gary Block. 336-339 [doi]
- Low complexity parallel Chien search architecture for RS decoderQingsheng Hu, Zhigong Wang, Jun Zhang, Jie Xiao. 340-343 [doi]
- Area and power efficient trellis computational blocks in 0.13µm CMOSMatthias Kamuf, John B. Anderson, Viktor Öwall. 344-347 [doi]
- S-code: new distance-3 MDS array codesRajendra S. Katti, Xiaoyu Ruan. 348-351 [doi]
- Design of low complexity high-speed pulse-shaping IIR filters for mobile communication receiversA. Prasad Vinod, Edmund Ming-Kit Lai. 352-355 [doi]
- Wideband 70dB CMOS digital variable gain amplifier design for DVB-T receiver s AGCChua-Chin Wang, Ching-Li Lee, Li-Ping Lin, Yih-Long Tseng. 356-359 [doi]
- Multi-user receiver using conjugate gradient method for wideband CDMAYumi Takizawa, Cindy Bernadeth Tjitrosoewarno, Atsushi Fukasawa. 360-363 [doi]
- An ultra wideband low complexity circuit transceiver architecture for sensor networksLucian-Vasile Stoica, Sakari Tiuraniemi, Heikki Repo, Ian Oppermann. 364-367 [doi]
- A 15 mW 69 dB 2 Gsamples/s CMOS analog front-end for low-band UWB applicationsHua-Chin Lee, Chien-Chih Lin, Chia-Hsin Wu, Shen-Iuan Liu, Chorng-Kuang Wang, Hen-Wai Tsao. 368-371 [doi]
- Design of a fully integrated array of high-voltage digital-to-analog convertersEhab Shoukry, Madeleine Mony, David V. Plant. 372-375 [doi]
- A novel methodology for the design of LC tank VCO with low phase noiseLin Jia, Jianguo Ma, Kiat Seng Yeo, Manh Anh Do. 376-379 [doi]
- A novel low-power input-independent MOS AC/DC charge pumpYuan Yao, Yin Shi, Foster F. Dai. 380-383 [doi]
- Large tuning band range of high frequency filter for wireless applicationsZhiqiang Gao, Jianguo Ma, Yizheng Ye, Mingyan Yu. 384-387 [doi]
- Behavioral analysis and dimensioning of UMTS transmitters baseband blocksNicola Ghittori, Andrea Vigna, Piero Malcovati, Stefano D Amico, Andrea Baschirotto. 388-391 [doi]
- A frequency up-conversion and two-step channel selection embedded CMOS D/A interfaceKa-Hou Ao Ieong, Chong-Yin Fok, Pui-In Mak, Seng-Pan U., Rui Paulo Martins. 392-395 [doi]
- A novel DC-offset cancelling circuit for DCRJiangnan Yan, Yuanjin Zheng, Yong Ping Xu. 396-399 [doi]
- A digitally programmable on-chip RC-oscillator in 0.25µm CMOS logic processChiara Ghidini, J. G. Aranda, Danilo Gerna, K. Kelliher, Christoph Baumhof. 400-403 [doi]
- A novel microstrip bandpass filter design using asymmetric parallel coupled-lineSi-Weng Fok, Phillip Ngai Cheong, Kam-Weng Tam, Rui Paulo Martins. 404-407 [doi]
- Pipelining Tomlinson-Harashima precodersYongru Gu, Keshab K. Parhi. 408-411 [doi]
- Low cost efficient architecture for H.264 motion estimationSebastián López, Félix Tobajas, A. Villar, V. de Armas, José Francisco López, Roberto Sarmiento. 412-415 [doi]
- Novel electrostatic discharge protection structure for a monolithic gas sensor systems-on-a-chipJavier A. Salcedo, Juin J. Liou, Muhammad Yaqub Afridi, Allen R. Hefner. 416-419 [doi]
- On-board fault-tolerant SAR processor for spaceborne imaging radar systemsWai-Chi Fang, C. Le, S. Taft. 420-423 [doi]
- Binary Taylor diagrams: an efficient implementation of Taylor expansion diagramsArash Hooshmand, Saeed Shamshiri, Mohammad Alisafaee, Bijan Alizadeh, Pejman Lotfi-Kamran, Mostafa Naderi, Zainalabedin Navabi. 424-427 [doi]
- Design space exploration on heterogeneous network-on-chipRodrigo Ferrugem Cardoso, Márcio Eduardo Kreutz, Luigi Carro, Altamiro Amadeu Susin. 428-431 [doi]
- A simple and cost effective video encoder with memory-reducing CAVLCYeong-Kang Lai, Chih-Chung Chou, Yu-Chieh Chung. 432-435 [doi]
- An integrated current flattening module for embedded cryptosystemsXuequn Li, Haleh Vahedi, Radu Muresan, Stefano Gregori. 436-439 [doi]
- A pseudo-differential CMOS receiver insensitive to input common mode levelNam-Seog Kim, Uk-Rae Cho, Hyun-Geun Byun. 440-443 [doi]
- Noise-tolerant XOR-based conditional keeper for high fan-in dynamic circuitsChung-Hsien Hua, Wei Hwang, Chih-Kai Chen. 444-447 [doi]
- High-speed CMOS-to-ECL pad driver in 0.18µm CMOSFrancesco Centurelli, G. Lulli, Piero Marietti, Pietro Monsurrò, Giuseppe Scotti, Alessandro Trifiletti. 448-451 [doi]
- A high-speed domino CMOS full adder driven by a new unified-BiCMOS inverterToshiro Akino, Kei Matsuura, Akiyoshi Yasunaga. 452-455 [doi]
- Case study of interconnect analysis for standing wave oscillator designMeigen Shen, Li-Rong Zheng, Esa Tjukanoff, Jouni Isoaho, Hannu Tenhunen. 456-459 [doi]
- Asynchronous pulse logic cell for threshold logic and Boolean networksJohan Lambie, Francesc Moll Echeto, José Luis González, Antonio Rubio. 460-463 [doi]
- Cascode buffer for monolithic voltage conversion operating at high input supply voltagesVolkan Kursun, Gerhard Schrom, Vivek De, Eby G. Friedman, Siva Narendra. 464-467 [doi]
- Characteristics and programming of floating-gate pFET switches in an FPAA crossbar networkDavid N. Abramson, Jordan D. Gray, Christopher M. Twigg, Paul E. Hasler. 468-471 [doi]
- A high-throughput and memory efficient 2D discrete wavelet transform hardware architecture for JPEG2000 standardGrigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis, Athanasios Milidonis. 472-475 [doi]
- Quaternary arithmetic helix transforms based on Kronecker productBogdan J. Falkowski, Cheng Fu. 476-479 [doi]
- Generalized fastest linearly independent arithmetic transformsBogdan J. Falkowski, Cicilia C. Lozano, Susanto Rahardja. 480-483 [doi]
- Fixed sign Walsh transform and its iterative hardware architectureBogdan J. Falkowski, Shixing Yan. 484-487 [doi]
- Generation of linearly independent transforms over GF(4)Bogdan J. Falkowski, Cheng Fu. 488-491 [doi]
- A high performance architecture of EBCOT encoder in JPEG 2000Xiaolang Yan, Ying Qin, Ye Yang, Haitong Ge. 492-495 [doi]
- Comparison of the horizontal and the vertical common subexpression elimination methods for realizing digital filtersA. Prasad Vinod, Edmund Ming-Kit Lai. 496-499 [doi]
- Complex-coefficient variable filter design using successive vector-array-decompositionTian-Bo Deng. 500-503 [doi]
- Non-iterative WLS design of allpass variable fractional-delay digital filtersTian-Bo Deng. 504-507 [doi]
- Discrete optimization for error feedback network using lower bound estimationMasayoshi Nakamoto, Yuji Maejima, Takao Hinamoto. 508-511 [doi]
- Design of a square-root-raised-cosine FIR filter by a recursive methodChia-Yu Yao, Chiang-Ju Chien. 512-515 [doi]
- Pole deviation analysis for digital systems based on second order perturbation theory [digital filter example]Jinxin Hao, Gang Li, Jun Wu. 516-519 [doi]
- A hybrid GA for the design of multiplication-free frequency response masking filters [FIR digital filters]Ling Cen, Yong Lian. 520-523 [doi]
- Pulse shaping with bireciprocal wave digital lattice filtersDirk S. Waldhauser, Christoph Saas, Josef A. Nossek. 524-527 [doi]
- Design and FPGA implementation of a structure of evolutionary digital filters for hardware implementationMasahide Abe, Hiroki Arai, Masayuki Kawamata. 528-531 [doi]
- A novel 2D filter design methodologyChristos-Savvas Bouganis, George A. Constantinides, Peter Y. K. Cheung. 532-535 [doi]
- Synthesis of reconfigurable multiplier blocks: part I - fundamentalsSüleyman Sirri Demirsoy, Izzet Kale, Andrew G. Dempster. 536-539 [doi]
- Synthesis of reconfigurable multiplier blocks: part - II algorithmSüleyman Sirri Demirsoy, Izzet Kale, Andrew G. Dempster. 540-543 [doi]
- A hardware-efficient FIR architecture with input-data and tap foldingLi-Hsun Chen, Oscal T.-C. Chen. 544-547 [doi]
- Residue number system implementations of complex heterodyne tunable filtersGrace Y. Cho, Louis G. Johnson, Michael A. Soderstrand. 548-551 [doi]
- Low complexity decimation filter for multi-standard digital receiversAshok Kumar, J. Luis Tecpanecatl-Xihuitl, Magdy A. Bayoumi. 552-555 [doi]
- Stability of a shift-variant 2-D state-space digital filterGlen W. Mabey, Tamal Bose, Mei Chen. 556-559 [doi]
- A time-to-digital-converter-based CMOS smart temperature sensorChun-Chi Chen, Wen-Fu Lu, Chin-Chung Tsai, Poki Chen. 560-563 [doi]
- High-speed sensing system for depth estimation based on depth-from-focus by using smart imagerTakashi Yoshida, Arimitsu Yokota, Hideki Kashiyama, Takayuki Hamamoto. 564-567 [doi]
- A CMOS imager for light blobs detection and processingJ. L. D. Gonzalez, D. Sadowski, Karan V. I. S. Kaler, Martin P. Mintchev, Orly Yadid-Pecht. 568-571 [doi]
- Design of electro-optical demodulating pixel in CMOS technologyFabrizio De Nisi, David Stoppa, Mauro Scandiuzzo, Lorenzo Gonzo, Lucio Pancheri, Gian-Franco Dalla Betta. 572-575 [doi]
- Digital measurement of human proximity to electrical power circuit by a novel amplitude-shift-keying radio-frequency receiverShengke Zeng, John R. Powers, Larry L. Jackson, David L. Conover. 576-579 [doi]
- Low-power global/rolling shutter image sensors in silicon on sapphire technologyAlexander Fish, Evgeny Avner, Orly Yadid-Pecht. 580-583 [doi]
- Low power current mode ADC for CMOS sensor ICYoungbok Kim, Anuj Agarwal, Sameer R. Sonkusale. 584-587 [doi]
- A wide dynamic range CMOS active pixel sensor with frame differenceVadim Alexander Milirud, Leonid Fleshel, Wenjing Zhang, Graham A. Jullien, Orly Yadid-Pecht. 588-591 [doi]
- Skewing adjacent line repeaters to reduce the delay and energy dissipation of on-chip busesYehea I. Ismail, Muhammad M. Khellah, Maged Ghoneima, James Tschanz, Yibin Ye, Vivek De. 592-595 [doi]
- Low power repeaters driving RLC interconnects with delay and bandwidth constraintsGuoqing Chen, Eby G. Friedman. 596-599 [doi]
- Low-leakage repeaters for NoC interconnectsArkadiy Morgenshtein, Israel Cidon, Ran Ginosar, Avinoam Kolodny. 600-603 [doi]
- Power-aware global signaling strategiesRahul M. Rao, Kanak Agarwal, Dennis Sylvester, Himanshu Kaul, Richard B. Brown, Sani R. Nassif. 604-607 [doi]
- Designing optimized pipelined global interconnects: algorithms and methodology impactVidyasagar Nookala, Sachin S. Sapatnekar. 608-611 [doi]
- Managing substrate and interconnect noise from high performance repeater insertion in a mixed-signal environmentRadu M. Secareanu, S. K. Banerjee, Olin L. Hartin, Francisco V. Fernández, Eby G. Friedman. 612-615 [doi]
- Battery-aware dynamic voltage scaling in multiprocessor embedded systemYuan Cai, Sudhakar M. Reddy, Irith Pomeranz, Bashir M. Al-Hashimi. 616-619 [doi]
- Noise coupling in multi-voltage power distribution systems with decoupling capacitorsMikhail Popovich, Eby G. Friedman. 620-623 [doi]
- A 16-bit low-power microcontroller with monolithic MEMS-LC clockingRobert M. Senger, Eric D. Marsman, Michael S. McCorquodale. 624-627 [doi]
- A fast chip-scale power estimation method for large and complex LSIs based on hierarchical analysisYuichi Nakamura, Takeshi Yoshimura. 628-631 [doi]
- An LSI system with locked in temperature insensitive state achieved by using body bias techniqueGoichi Ono, Masayuki Miyazaki, Kazuki Watanabe, Takayuki Kawahara. 632-635 [doi]
- An energy-efficient circuit technique for single event transient noise-toleranceMing Zhang, Naresh R. Shanbhag. 636-639 [doi]
- Decentralized energy-conserving and coverage-preserving protocols for wireless sensor networksChi-Fu Huang, Li-Chu Lo, Yu-Chee Tseng, Wen-Tsuen Chen. 640-643 [doi]
- Event-based imaging with active illumination in sensor networksEugenio Culurciello, Thiago Teixeira, Andreas G. Andreou. 644-647 [doi]
- On the construction of efficient data gathering tree in wireless sensor networksNiwat Thepvilojanapong, Yoshito Tobe, Kaoru Sezaki. 648-651 [doi]
- A RF map-based localization algorithm for indoor environmentsCesare Alippi, Alan Mottarella, Giovanni Vanini. 652-655 [doi]
- A new formulation of fast diminished-one multioperand modulo 2/sup n/+1 adderBin Cao, Chip-Hong Chang, Thambipillai Srikanthan. 656-659 [doi]
- Non-interleaving architecture for hardware implementation of modular multiplicationQiang Liu, Dong Tong, Xu Cheng. 660-663 [doi]
- A new design method to modulo 2/sup n/-1 squaringBin Cao, Thambipillai Srikanthan, Chip-Hong Chang. 664-667 [doi]
- Constant addition utilizing flagged prefix structuresJames E. Stine, Christopher R. Babb, Vibhuti B. Dave. 668-671 [doi]
- Efficient VLSI implementation of N/N integer divisionKei-Yong Khoo, Alan N. Willson Jr.. 672-675 [doi]
- A novel design of leading zero anticipation circuit with parallel error detectionGe Zhang, Zichu Qi, Weiwu Hu. 676-679 [doi]
- High-level synthesis under I/O timing and memory constraintsPhilippe Coussy, Gwenolé Corre, Eric Senn, Pierre Bomel, Eric Martin. 680-683 [doi]
- A low power scheduling method using dual V/sub dd/ and dual V/sub th/Kun-Lin Tsai, Szu-Wei Chaung, Feipei Lai, Shanq-Jang Ruan. 684-687 [doi]
- A synthesis scheme for simultaneous scheduling, binding, partitioning and placement with resources operating at multiple voltagesLing Wang, Yingtao Jiang, Yu Zhang, Ru Chen. 688-691 [doi]
- A heuristic approach for multiple restricted multiplicationNalin Sidahao, George A. Constantinides, Peter Y. K. Cheung. 692-695 [doi]
- Lower-bound estimation for multi-bitwidth schedulingJunjuan Xu, Jason Cong, Xu Cheng. 696-699 [doi]
- Statistical schedule length analysis in asynchronous datapath synthesisKoji Ohashi, Mineo Kaneko. 700-703 [doi]
- Comparison of two class E amplifiers for EER transmitterAntti Heiskanen, Timo Rahkonen. 704-707 [doi]
- Steady-state behavior of class E amplifier outside designed conditionsTadashi Suetsugu, Marian K. Kazimierczuk. 708-711 [doi]
- Voltage-clamped class E amplifier with transmission-line transformerTadashi Suetsugu, Marian K. Kazimierczuk. 712-715 [doi]
- Optimum design of very low distortion class E power amplifiersSiu Chung Wong, Chi K. Michael Tse. 716-719 [doi]
- Resonant DC/DC converter with class E oscillatorHiroyuki Hase, Hiroo Sekiya, Jianming Lu, Takashi Yahagi. 720-723 [doi]
- Planar inductors with interleaved conductors for integrated power applicationsAlain Salles, Bruno Estibals, David Bourrier, Corinne Alonso. 724-727 [doi]
- A novel correlated double sampling poly-Si circuit for readout systems in large area X-ray sensorsAleksandra Rankov, Esther Rodríguez-Villegas, Michael J. Lee. 728-731 [doi]
- On-chip active power rectifiers for biomedical applicationsTorsten Lehmann, Yashodhan Moghe. 732-735 [doi]
- A 1.8 V, 0.3 mW, 10-bit SA-ADC with new self-timed timing control for biomedical applicationsHwang-Cherng Chow, Bo-Wei Chen, Hsiao-Chen Chen, Wu-Shiung Feng. 736-739 [doi]
- A 0.9-V 67-µW analog front-end using adaptive-SNR technique for digital hearing aidSunyoung Kim, Jae-Youl Lee, Seong-Jun Song, Namjun Cho, Hoi-Jun Yoo. 740-743 [doi]
- A BiCMOS ENG amplifier with high SIR outputIasonas F. Triantis, Andreas Demosthenous. 744-747 [doi]
- 10-channel very low noise ENG amplifier system using CMOS technologyRobert Rieger, Dipankar Pal, John Taylor, Chris Clarke, Peter Langlois, Nick Donaldson. 748-751 [doi]
- Minimum augmentation to bi-connect specified vertices of a graph with upper bounds on vertex-degreeToshiya Mashima, Takanori Fukuoka, Satoshi Taoka, Toshimasa Watanabe. 752-755 [doi]
- A modeling method of a rule based control system with hierarchical Petri netMamoru Sakamoto, Toshiyuki Miyamoto, Sadatoshi Kumagai. 756-759 [doi]
- Minimal time reachability problem of some subclasses of timed Petri netsAtsushi Ohta, Kohkichi Tsuji, Tomiji Hisamura. 760-763 [doi]
- The node voltage equations and structural conditions of observability for RLC networks over F(z)Kai-Sheng Lu, Guo-Zhang Gao. 764-767 [doi]
- Graph-theoretic approach to the design of four-switch DC-DC convertersTetsuo Nishi, Masato Ogata. 768-771 [doi]
- Simplified algorithm to determine break point realys and relay coordination based on network topology [for realys read relays]Sastry Mks. 772-775 [doi]
- A low-distortion 1.2 V DAC+filter for transmitters in wireless applicationsNicola Ghittori, Andrea Vigna, Piero Malcovati, Stefano D Amico, Andrea Baschirotto. 776-779 [doi]
- Adjustable gamma correction circuit for TFT LCDPo-Ming Lee, Hung-Yi Chen. 780-783 [doi]
- A segmented thermometer coded DAC with deterministic dynamic element matching for high resolution ADC testBeatriz Olleta, Hanjun Jiang, Degang Chen, Randall L. Geiger. 784-787 [doi]
- A start-up calibration method for generic current-steering D/A converters with optimal area solutionGeorgi I. Radulov, Patrick J. Quinn, J. A. Hegt, Arthur H. M. van Roermund. 788-791 [doi]
- Pipeline ADC linearity testing with dramatically reduced data capture timeZhongjun Yu, Degang Chen, Randall L. Geiger, Ioannis Papantonopoulos. 792-795 [doi]
- On-chip built-in self-test of video-rate ADCs using Gaussian noiseJoão Goes, Nuno F. Paulino, Guiomar Evans. 796-799 [doi]
- A 0.18µm CMOS low-noise elliptic low-pass continuous-time filterJuan Francisco Fernández-Bootello, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez. 800-803 [doi]
- Low sensitivity single-ended-input OTA and grounded capacitor elliptic filter structure with the minimum componentsShu-Hui Tu, J. Neil Ross. 804-807 [doi]
- Low-sensitivity active-RC filters using impedance tapering of symmetrical bridged-T and twin-T networksDrazen Jurisic, Neven Mijat, George S. Moschytz. 808-811 [doi]
- A widely tunable Gm-C filter using tail current offset in two differential pairsTomoyuki Tanaka, Sungwoo Cha, Shinsaku Shimizu, Tsukasa Ida, Hiroaki Ishihara, Toshimasa Matsuoka, Kenji Taniguchi, Akashi Sugimori, Hiroki Hihara. 812-815 [doi]
- A comparison approach of lowpass type wave active filter using unified circuit blockS. Hirano, A. Sato, T. Kitamura. 816-819 [doi]
- Single amplifier bi-quadratic filter topologies in transimpedance configurationG. Chandra, Preetam Tadeparthy, P. Easwaran. 820-823 [doi]
- Quantum circuit design of discrete Hartley transform using recursive decomposition formulaChien-Cheng Tseng, Tsung-Ming Hwang. 824-827 [doi]
- Quantum circuit design of 8×8 discrete cosine transform using its fast computation flow graphChien-Cheng Tseng, Tsung-Ming Hwang. 828-831 [doi]
- Hermite-Gaussian-like eigenvectors of the DFT matrix generated by the eigenanalysis of an almost tridiagonal matrixMagdy T. Hanna, Nabila P. Attalla Seif, M. Waleed Abd El Maguid Ahmed. 832-835 [doi]
- An approach for computing the radix-2/4 DIT FHT and FFT algorithms using a unified structureSaad Bouguezel, M. Omair Ahmad, M. N. S. Swamy. 836-839 [doi]
- Design of wavelet filters based on digital complex allpass filtersAlfonso Fernández-Vázquez, Gordana Jovanovic-Dolecek. 840-843 [doi]
- Block time-recursive discrete Gabor transform implemented by unified parallel lattice structuresLiang Tao, Hon Keung Kwan. 844-847 [doi]
- Rate determination based on perceptual loudnessAndreas Spanias, Venkatraman Atti. 848-851 [doi]
- A mixed analog-digital hybrid for speech enhancement purposesBenny Sallberg, Mattias Dahl, Henrik Akesson, Ingvar Claesson. 852-855 [doi]
- Adaptive beamformer for hands-free communication system in noisy environmentsHai Quang Dam, Sven Nordholm, Hai Huyen Dam, Siow Yong Low. 856-859 [doi]
- Audio classification and scene recognition and for hearing aidsSourabh Ravindran, David V. Anderson. 860-863 [doi]
- A versatile speech enhancement system based on perceptual wavelet denoisingYu Shao, Chip-Hong Chang. 864-867 [doi]
- Improved voice activity detection via contextual information and noise suppressionAbhijeet Sangwan, Wei-Ping Zhu, M. Omair Ahmad. 868-871 [doi]
- Approximations for bit error probabilities in SSMA communication systems using spreading sequences of Markov chainsHiroshi Fujisaki, Gerhard Keller. 872-875 [doi]
- Optimal spreading in multi-user non-coherent binary chaos-shift-keying communication systemsJi Yao, Anthony J. Lawrance. 876-879 [doi]
- Cryptanalysis of a multistage encryption systemChengqing Li, Xinxiao Li, Shujun Li, Guanrong Chen. 880-883 [doi]
- Design of code-matched receiver for DS/CDMA communicationsYutaka Jitsumatsu, Tohru Kohda. 884-887 [doi]
- Coded modulation based on higher dimensional chaotic mapsSlobodan Kozic, Thomas Schimming. 888-891 [doi]
- Long period pseudo random bit generators derived from a discretized chaotic mapTommaso Addabbo, Massimo Alioto, Ada Fort, Santina Rocchi, Valerio Vignoli. 892-895 [doi]
- Frame size selection in video downsizing transcoding applicationHaiyan Shu, Lap-Pui Chau. 896-899 [doi]
- A novel algorithm for reducing computational complexity of MC-DCT in frequency-domain video transcodersDeepak P. Nayak, Dipan B. Mehta, Uday B. Desai. 900-903 [doi]
- Efficient video transcoding between H.263 and H.264/AVC standardsViet Anh Nguyen, Yap-Peng Tan. 904-907 [doi]
- Low complexity H.263 to H.264 video transcoding using motion vector decompositionKai-Tat Fung, Wan-Chi Siu. 908-911 [doi]
- Consideration of transcoding using updatable scalability for selective quality video content delivery methodMei Kodama, Shunya Suzuki. 912-915 [doi]
- Flexible resizing algorithms for video transcodingCarlos Salazar-Lazaro, Trac D. Tran. 916-919 [doi]
- A low-power, 20-Gb/s continuous-time adaptive passive equalizerRuifeng Sun, Jaejin Park, Frank O Mahony, C. Patrick Yue. 920-923 [doi]
- Adaptive decision-feedback equalization for band-limited high-speed serial linksNorbert Neurohr, Matthias Schoebinger, Edoardo Prete, Anthony Sanders. 924-927 [doi]
- Joint carrier recovery and adaptive equalization for high-order QAMJunhua Tian, Bo Shen, Zheng Li, Jianing Su, Qianling Zhang. 928-931 [doi]
- Hardware realization of fuzzy adaptive filters for non linear channel equalizationMiguel A. Melgarejo, Fredy Olarte, Pedro Ladino. 932-935 [doi]
- Jitter equalization for binary baseband communicationAnthony Chan Carusone. 936-939 [doi]
- Predictive equalizer design for DVB-T systemTing-An Lin, Chen-Yi Lee. 940-943 [doi]
- Progressive coding of 3D dynamic mesh sequences using spatiotemporal decompositionJeong-Hyu Yang, Chang-Su Kim, Sang Uk Lee. 944-947 [doi]
- Progressive lossless 3D mesh encoder with octree-based space partitioningJingliang Peng, Sheng Yang, C. C. Jay Kuo. 948-951 [doi]
- Fast region-of-interest transcoding for JPEG 2000 imagesHao-Song Kong, Anthony Vetro, Toshihiko Hata, Naoki Kuwahara. 952-955 [doi]
- Construction of regular 3D point clouds using octree partitioning and resamplingJae-Young Sim, Sang Uk Lee, Chang-Su Kim. 956-959 [doi]
- Slice group based multiple description video coding with three motion compensation loopsDong Wang, Cedric Nishan Canagarajah, David R. Bull. 960-963 [doi]
- Improving classification of video shots using information-theoretic co-clusteringPeng Wang, Rui Cai, Shi-Qiang Yang. 964-967 [doi]
- The upper bound of the second-order modes of linear state-space systems [digital filter example]Shunsuke Koshita, Masahide Abe, Masayuki Kawamata. 968-971 [doi]
- A novel property of the second-order modes of discrete-time systems under variable transformationShunsuke Koshita, Masahide Abe, Masayuki Kawamata. 972-975 [doi]
- Special singularity integrals encountered in electric circuits [RLC circuit examples]Aziz S. Inan, Peter M. Osterberg. 976-979 [doi]
- Identification of electric circuits: problems and methods of solution accuracy enhancementAlexei S. Adalev, Nikolai V. Korovkin, Masashi Hayakawa. 980-983 [doi]
- On the effect of time delays in negative feedback amplifiersLuis Nero Alves, Rui L. Aguiar. 984-987 [doi]
- Jittered uniform sampling - examplesSvante Signell. 988-991 [doi]
- Testability evaluation for analog linear circuits via transfer function analysisBarbara Cannas, Alessandra Fanni, Augusto Montisci. 992-995 [doi]
- Synthesis of MITE log-domain filters with unique operating pointsShyam Subramanian, David V. Anderson, Paul E. Hasler, Bradley A. Minch. 996-999 [doi]
- Low voltage high current gain CMOS digitally controlled fully differential CCII [variable gain amplifier application example]Soliman A. Mahmoud. 1000-1003 [doi]
- A new NMOS four-quadrant analog multiplierBoonchai Boonchu, Wanlop Surakampontorn. 1004-1007 [doi]
- Class-AB rail-to-rail CMOS analog bufferJuan M. Carrillo, J. Francisco Duque-Carrillo, Antonio B. Torralba, Ramón González Carvajal. 1008-1011 [doi]
- IC design of an analog tunable crossover networkEduardo Rapoport, Fernando Antonio Pinto Baruqui, Antonio Petraglia. 1012-1015 [doi]
- A ± 1.5 V high frequency four quadrant current multiplierVarakorn Kasemsuwan, Teerawat Arthansiri, Hyung Keun Ahn. 1016-1019 [doi]
- CMOS analog current-mode multiplier based on the advanced compact MOSFET modelFábio A. Pereira, Mário C. G. de Oliveira, Ana Isabela Araújo Cunha. 1020-1023 [doi]
- On-chip temperature sensor with high tolerance for process and temperature variationT. Yasuda. 1024-1027 [doi]
- A current mode Palmo cell for programmable analogue signal processingYaxiong Zhang, Alister Hamilton. 1028-1031 [doi]
- A memory-reduced log-MAP kernel for turbo decoderTsung-Han Tsai, Cheng-Hung Lin, An-Yeu Wu. 1032-1035 [doi]
- An ultra high-speed Reed-Solomon decoderHanho Lee. 1036-1039 [doi]
- A new low-power turbo decoder using HDA-DHDD stopping iterationWen-Ta Lee, San-Ho Lin, Chia-Chun Tsai, Trong-Yen Lee, Yuh-Shyan Hwang. 1040-1043 [doi]
- Communication subsystem synthesis and analysis tool using bus architecture generation and stochastic arbitration policiesSankalp Kallakuri, Nattawut Thepayasuwan, Alex Doboli, Simona Doboli. 1044-1047 [doi]
- Efficient implementation of trace-back unit in a reconfigurable Viterbi decoder fabricCheng Zhan, Tughrul Arslan, Sami Khawam, Iain Lindsay. 1048-1050 [doi]
- A new reconfigurable modem architecture for 3G multi-standard wireless communication systemsJung Ho Kim, Dong Sam Ha, Jeffrey H. Reed. 1051-1054 [doi]
- A 12.5 Gbps CMOS input sampler for serial link receiver front endShyh-Jye Jou, Chih-Hsien Lin, Yen-I Wang. 1055-1058 [doi]
- Low-power current mode logic for improved DPA-resistance in embedded systemsZeynep Toprak Deniz, Yusuf Leblebici. 1059-1062 [doi]
- A new level-up shifter for high speed and wide range interface in ultra deep sub-micronKyoung-Hoi Koo, Jin-Ho Seo, Myeong-Lyong Ko, Jae-Whui Kim. 1063-1065 [doi]
- A novel CMOS logic style with data independent power consumptionManfred Josef Aigner, Stefan Mangard, Renato Menicocci, Mauro Olivieri, Giuseppe Scotti, Alessandro Trifiletti. 1066-1069 [doi]
- A phase-detect synchronous mirror delay for clock skew-compensation circuitsKuo-Hsing Cheng, Chen-Lung Wu, Yu-lung Lo, Chia-Wei Su. 1070-1073 [doi]
- A 2Gb/s high-speed scalable shift-register based on-chip serial communication design for SoC applicationsI-Chyn Wey, Lung-Hao Chang, You-Gang Chen, Shih-Hung Chang, An-Yeu Wu. 1074-1077 [doi]
- A linear model for high-level delay estimation in VDSM on-chip interconnectsAlberto García Ortiz, Tudor Murgan, Mihail Petrov, Manfred Glesner. 1078-1081 [doi]
- A closed-form delay formula for on-chip RLC interconnects in current-mode signalingMingcui Zhou, Wentai Liu, Mohanasankar Sivaprakasam. 1082-1085 [doi]
- Two dimensional nonuniform perfect reconstruction filter bank with irrational down-sampling matricesSoo-Chang Pei, Meng-Ping Kao. 1086-1089 [doi]
- Multidimensional filter banks design by direct optimizationTruong T. Nguyen, Soontorn Oraintara. 1090-1093 [doi]
- On the theory and design of a class of PR causal-stable IIR non-uniform recombination cosine modulated filter banksS. C. Chan, S. S. Yin. 1094-1097 [doi]
- Design of two-channels FIR filterbanks with rational sampling factors using the FRM techniqueRobert Bregovic, Tapio Saramäki. 1098-1101 [doi]
- Programmable power-of-two RNS scaler and its application to a QRNS polyphase filterGian-Carlo Cardarilli, Andrea Del Re, Alberto Nannarelli, Marco Re. 1102-1105 [doi]
- : Optimized transmultiplexers for multirate systemsPilar Martín-Martín, Fernando Cruz-Roldán, Tapio Saramäki. 1106-1109 [doi]
- A class of directional filter banks [image processing applications]Truong T. Nguyen, Soontorn Oraintara. 1110-1113 [doi]
- Filter bank design for an adaptive subband structure with critical sampling using a new adaptation schemeMariane R. Petraglia, Paulo B. Batalheiro. 1114-1117 [doi]
- Architectural design of fractal image coder based on kick-out conditionHau-Jie Liang, Shuenn-Shyang Wang. 1118-1121 [doi]
- Dictionary-based program compression on transport triggered architecturesJari Heikkinen, Andrea G. M. Cilio, Jarmo Takala, Henk Corporaal. 1122-1125 [doi]
- Techniques for efficient DCT/IDCT implementation on generic GPUBo Fang, Guobin Shen, Shipeng Li, Huifang Chen. 1126-1129 [doi]
- High-performance systolic arrays for band matrix multiplicationYun Yang, Wenqing Zhao, Yasuaki Inoue. 1130-1133 [doi]
- Block-level parallel processing for scaling evenly divisible framesEero Aho, Jarno Vanne, Kimmo Kuusilinna, Timo Hämäläinen. 1134-1137 [doi]
- Parallel FFT computation with a CDMA-based network-on-chipDaewook Kim, Manho Kim, Gerald E. Sobelman. 1138-1141 [doi]
- Hardware accelerator design for video segmentation with multi-modal background modellingHongtu Jiang, Håkan Ardö, Viktor Öwall. 1142-1145 [doi]
- Multiplier-free structures for exact generation of natural powers of integersSaed Samadi, M. Omair Ahmad, M. N. S. Swamy. 1146-1149 [doi]
- A 0.18-µm CMOS 1-Gb/s serial link transceiver by using PWM and PAM techniquesChing-Yuan Yang, Yu Lee. 1150-1153 [doi]
- 3.125 Gb/s power efficient line driver with 2-level pre-emphasis and 2 kV HBM ESD protectionKrzysztof Iniewski, Valery Axelrad, Andrei Shibkov, Artur Balasinski, Sebastian Magierowski, Rafal Dlugosz, A. Dabrowski. 1154-1157 [doi]
- A 0.18µm CMOS transceiver design for high-speed backplane data communicationsMiao Li, Wenjie Huang, Tad A. Kwasniewski, Shoujun Wang. 1158-1161 [doi]
- A 10-Gbps, 8-PAM parallel interface with crosstalk cancellation for future hard disk drive channel ICsJaejin Park, Ruifeng Sun, L. Rick Carley, C. Patrick Yue. 1162-1165 [doi]
- An electrically adjustable distributed pulse shaping filter for 40 Gbit/s optical linksMiguel Ângelo M. Madureira, Paulo M. P. Monteiro, Rui L. Aguiar, Manuel Violas. 1166-1169 [doi]
- Dual-loop control of laser drivers for 3.125GHz optical transceiversMona M. Hella, Richard Panock. 1170-1173 [doi]
- A 2GHz fully differential DLL-based frequency multiplier for high speed serial link circuitKuo-Hsing Cheng, Shu-Ming Chang, Shu-Yu Jiang, Wei-Bin Yang. 1174-1177 [doi]
- An high speed integrated equalizer for dispersion compensation in 10Gb/s fiber networksVasanth Kakani, Foster F. Dai, Richard C. Jaeger. 1178-1181 [doi]
- ESD protection design for I/O cells in sub-130-nm CMOS technology with embedded SCR structureKun-Hsien Lin, Ming-Dou Ker. 1182-1185 [doi]
- A novel substrate-triggered ESD protection structure for a bus switch IC with on-chip substrate-pumpPaul C. F. Tong, Ping-Ping Xu, Wensong Chen, John Hui, Patty Z. Q. Liu. 1190-1193 [doi]
- ESD protection circuit design for ultra-sensitive IO applications in advanced sub-90nm CMOS technologiesMarkus P. J. Mergens, Geert Wybo, Bart Keppens, Benjamin Van Camp, Frederic De Ranter, Koen G. Verhaege, John Armer, Phillip Jozwiak, Christian C. Russ. 1194-1197 [doi]
- A new pre-driver design for improving the ESD performance of the high voltage tolerant I/OJian-Hsing Lee, Jiaw-Ren Shih, Yi-Hsun Wu, Kuo-Feng Yu, Tong-Chern Ong. 1198-1201 [doi]
- On-chip ESD protection for RF I/Os: devices, circuits and modelsElyse Rosenbaum, Sami Hyvonen. 1202-1205 [doi]
- A methodology for partitioning DSP applications in hybrid reconfigurable systemsMichalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis. 1206-1209 [doi]
- A new approach based on LFF for optimization of dynamic hardware reconfigurationsZhe Zhou, Sheqin Dong, Xianlong Hong, Yuliang Wu, Yoji Kajitani. 1210-1213 [doi]
- A 16, 000-gate-count optically reconfigurable gate array in a standard 0.35µm CMOS technologyMinoru Watanabe, Fuminori Kobayashi. 1214-1217 [doi]
- Pipelining technique for energy-aware datapathsWei-Sheng Huang, Tay-Jyi Lin, Shih-Hao Ou, Chih-Wei Liu, Chein-Wei Jen. 1218-1221 [doi]
- A low power FPGA routing architectureSomsubhra Mondal, Seda Ogrenci Memik. 1222-1225 [doi]
- Efficient high radix modular multiplication for high-speed computing in re-configurable hardware [cryptographic applications]Yi Wang, Jussipekka Leiwo, Thambipillai Srikanthan. 1226-1229 [doi]
- Motion information and coding mode reuse for MPEG-2 to H.264 transcodingZhi Zhou, Shijun Sun, Shawmin Lei, Ming-Ting Sun. 1230-1233 [doi]
- Efficient MPEG-2 to H.264/AVC intra transcoding in transform-domainYeping Su, Jun Xin, Anthony Vetro, Huifang Sun. 1234-1237 [doi]
- Efficient rate control for MPEG-2 to H.264/AVC transcodingYou-Neng Xiao, Hong Lu, Xiangyang Xue, Viet Anh Nguyen, Yap-Peng Tan. 1238-1241 [doi]
- R-D optimized quantization of H.264 SP-frames for bitstream switching under storage constraintsChen-Po Chang, Chia-Wen Lin. 1242-1245 [doi]
- Fast mode decision and motion estimation for H.264 with a focus on MPEG-2/H.264 transcodingXiaoan Lu, Alexis Michael Tourapis, Peng Yin, Jill M. Boyce. 1246-1249 [doi]
- Optimizing user expectations for video semantic filtering and abstractionChing-Yung Lin, Belle L. Tseng. 1250-1253 [doi]
- Analytical crosstalk noise and its induced-delay estimation for distributed RLC interconnects under ramp excitationLacina M. Coulibaly, H. J. Kadim. 1254-1257 [doi]
- An all-digital pulsewidth control loopYi-Ming Wang, Chang-Fen Hu, Yi-Jen Chen, Jinn-Shyan Wang. 1258-1261 [doi]
- Design of a new sense amplifier flip-flop with improved power-delay-productHui Zhang, Pinaki Mazumder. 1262-1265 [doi]
- A 1.2 V sense amplifier for high-performance embeddable NOR flash memoriesDavide Baderna, Alessandro Cabrini, Guido De Sandre, Francesco De Santis, Marco Pasotti, Andrea Rossini, Guido Torelli. 1266-1269 [doi]
- SET and RESET pulse characterization in BJT-selected phase-change memoriesFerdinando Bedeschi, Edoardo Bonizzoni, Giulio Casagrande, Roberto Gastaldi, Claudio Resta, Guido Torelli, Daniele Zella. 1270-1273 [doi]
- Decision feedback equalization for high-speed backplane data communicationsJing Chen, Miao Li, Tad A. Kwasniewski. 1274-1277 [doi]
- Interconnect model reductions by using the AORA algorithm with considering the adjoint networkChia-Chi Chu, Herng-Jer Lee, Wu-Shiung Feng, Ming-Hong Lai. 1278-1281 [doi]
- Parameter domain pruning for improving convergence of synthesis algorithmsHua Tang, Alex Doboli. 1282-1285 [doi]
- Enriching an analog platform for analog-to-digital converter designFernando De Bernardinis, Pierluigi Nuzzo, Pierangelo Terreni, Alberto L. Sangiovanni-Vincentelli. 1286-1289 [doi]
- Parametric model order reduction technique for design optimizationAlfred Tze-Mun Leung, Roni Khazaka. 1290-1293 [doi]
- Design automation of single-ended LNAs using symbolic analysisGülin Tulunay, Sina Balkir. 1294-1297 [doi]
- Analysis of simulation-driven numerical performance modeling techniques for application to analog circuit optimizationTrent McConaghy, Georges G. E. Gielen. 1298-1301 [doi]
- Efficiency optimization in linear-assisted switching power converters for envelope tracking in RF power amplifiersVahid Yousefzadeh, Eduard Alarcón, Dragan Maksimovic. 1302-1305 [doi]
- Hybrid trigonometric differential evolution for optimizing harmonic distributionShiyan Hu, Han Huang, Dariusz Czarkowski. 1306-1309 [doi]
- Hybrid switched-capacitor-Cuk/Zeta/Sepic converters in step-up modeBoris Axelrod, Yefim Berkovich, Adrian Ioinovici. 1310-1313 [doi]
- High efficiency wide bandwidth power supplies for GSM and EDGE RF power amplifiersYuShan Li, Dragan Maksimovic. 1314-1317 [doi]
- Boost-buck inverter variable structure control for grid-connected photovoltaic systemsCarlos Meza, Domingo Biel, Luis Martinez-Salamero, Francisco Guinjoan. 1318-1321 [doi]
- Thinned-out controlled class D inverter with delta-sigma modulated 1-bit driving pulsesHirotaka Koizumi, Kosuke Kurokawa, Shinsaku Mori. 1322-1325 [doi]
- Modeling external feedback path of an ITE digital hearing instrument for acoustic feedback cancellationJingbo Yang, Meng Tong Tan, Joseph Sylvester Chang. 1326-1329 [doi]
- A dual-mode wavelet based R-wave detector using single-V::t:: for leakage reduction [cardiac pacemaker applications]Joachim Neves Rodrigues, Thomas Olsson, Leif Sörnmo, Viktor Öwall. 1330-1333 [doi]
- An efficient ECG data compression technique based on predefined signature and envelope vector banksHakan Gürkan, Ümit Güz, B. Siddik Yarman. 1334-1337 [doi]
- The CRLB for bilinear systems and its biomedical applicationsQiyue Zou, Zhiping Lin, Raimund J. Ober. 1338-1341 [doi]
- Scalable architecture for streaming neural information from implantable multichannel neuroprosthetic devicesKyle E. Thomson, Theo Shlien, Yasir Suhail, Karim G. Oweiss. 1342-1345 [doi]
- A novel CMOS lab-on-a-chip for biomedical applicationsYehya H. Ghallab, Wael M. Badawy. 1346-1349 [doi]
- Probabilistic congestion prediction in hierarchical quad-grid modelJin-Tai Yan, Yen-Hsiang Chen, Chia-Wei Wu. 1350-1353 [doi]
- Small congestion embedding of separable graphs into grids of the same sizeAkira Matsubayashi. 1354-1357 [doi]
- On VLSI decompositions for d-ary de Bruijn graphs (extended abstract)Toshinori Yamada, Hiroyuki Kawakita, Tadashi Nishiyama, Shuichi Ueno. 1358-1361 [doi]
- Approximation algorithms for the rectilinear Steiner tree problem with obstaclesMakoto Fujimoto, Daisuke Takafuji, Toshimasa Watanabe. 1362-1365 [doi]
- Wiring area optimization in floorplan-aware hierarchical power gridsJin-Tai Yan, Chia-Wei Wu, Yen-Hsiang Chen. 1366-1369 [doi]
- Timing-driven Steiner tree construction based on feasible assignment of hidden Steiner pointsJin-Tai Yan, Tzu-Ya Wang, Yu-Cheng Lee. 1370-1373 [doi]
- A robust background calibration technique for switched-capacitor pipelined ADCsJen-Lin Fan, Jieh-Tsorng Wu. 1374-1377 [doi]
- A digital self-calibration algorithm for ADCs based on histogram test using low-linearity input signalsLe Jin, Degang Chen, Randall L. Geiger. 1378-1381 [doi]
- A linear-approximation technique for digitally-calibrated pipelined A/D convertersDing-Lan Shen, Tai-Cheng Lee. 1382-1385 [doi]
- Design of a 2-GS/s 8-b self-calibrating ADC in 0.18µm CMOS technologyCristiano Azzolini, Andrea Boni, Alessio Facen, Matteo Parenti, Davide Vecchi. 1386-1389 [doi]
- Background calibration of interleaved analog to digital converters for high-speed communications using interleaved timing recovery techniquesOscar E. Agazzi, Venu Gopinathan. 1390-1393 [doi]
- Spectral shaping of timing mismatches in time-interleaved analog-to-digital convertersChristian Vogel, Dieter Draxelmayr, Gernot Kubin. 1394-1397 [doi]
- Programmable switched-current floating-gate cellsPhil Corbishley, Esther Rodríguez-Villegas. 1398-1401 [doi]
- Time-interleaved switched-capacitor filter for reconfigurable triple-band delta-sigma converterDaeik D. Kim, Martin A. Brooke. 1402-1405 [doi]
- A novel current-conveyor-based switched-capacitor integratorHooman Kaabi, Mohammad-Reza Jahed Motlagh, Ahmad Ayatollahi. 1406-1408 [doi]
- A new multiply-by-two gain-stage with enhanced immunity to capacitor-mismatchHashem Zare-Hoseini, Omid Shoaei, Izzet Kale. 1409-1412 [doi]
- Inverter-based switched current circuit for very low-voltage and low-power applicationsFathi A. Farag, Carlos Galup-Montoro, Márcio C. Schneider. 1413-1416 [doi]
- A high speed, high resolution, low voltage current mode sample and holdHold Omid Rajaee, Mehrdad Sharif Bakhtiar. 1417-1420 [doi]
- An improved algorithm for maximum-likelihood based approach for a multitarget tracking problemLiang Chen, Qiang Hua, H. K. Kwan. 1421-1424 [doi]
- Optimal periodic sampling sequences for nearly-alias-free digital signal processingAndrzej Tarczynski, Dongdong Qu. 1425-1428 [doi]
- Normalized confidence factors for robust direction of arrival estimationTuomo W. Pirinen. 1429-1432 [doi]
- An efficient method for estimation of autoregressive signals in noiseWei Xing Zheng. 1433-1436 [doi]
- Symbol-rate estimation based on filter bankZaihe Yu, Yun Q. Shi, Wei Su. 1437-1440 [doi]
- Pilot-aided DOA estimation for CDMA communication systemsNanyan Y. Wang, Panajotis Agathoklis, Andreas Antoniou. 1441-1444 [doi]
- New cost-effective VLSI implementation of multiplierless FIR filter using common subexpression eliminationYasuhiro Takahashi, Michio Yokoyama. 1445-1448 [doi]
- Implementation of low-complexity FIR filters using serial arithmeticKenny Johansson, Oscar Gustafsson, Lars Wanhammar. 1449-1452 [doi]
- A low power decimation filter architecture for high-speed single-bit sigma-delta modulationOscar Gustafsson, Henrik Ohlsson. 1453-1456 [doi]
- A high performance distributed-parallel-processor architecture for 3D IIR digital filtersArjuna Madanayake, Leonard T. Bruton. 1457-1460 [doi]
- A VLSI architecture for a high-speed computation of the 1D discrete wavelet transformChengjun Zhang, Chunyan Wang, M. Omair Ahmad. 1461-1464 [doi]
- Memory access overhead reduction for a digital color copier implementation using a VLIW digital signal processorMoonseok Kang, Wonyong Sung. 1465-1468 [doi]
- Horseshoes, homoclinic connections and global chaos in current-mode controlled DC/DC convertersDong Dai, Yue Ma, Chi K. Michael Tse. 1469-1472 [doi]
- N-scroll chaotic attractors from a general jerk circuitSimin Yu, Jinhu Lu, Henry Leung, Guanrong Chen. 1473-1476 [doi]
- Solvable 2-dimensional rational chaotic map defined by Jacobian elliptic functionsA. Kato, T. Kohda. 1477-1480 [doi]
- Back propagation learning of neural networks with chaotically-selected affordable neuronsYoko Uwate, Yoshifumi Nishio. 1481-1484 [doi]
- On two-parameter non-smooth bifurcations in power convertersFabiola Angulo, Mario di Bernardo. 1485-1488 [doi]
- Experimental performance evaluation of a low-EMI chaos-based current-programmed DC/DC boost converterM. Balestra, Marco Lazzarini, Gianluca Setti, Riccardo Rovatti. 1489-1492 [doi]
- An adaptive fast full search motion estimation algorithm for H.264Chen-Fu Lin, Jin-Jang Leou. 1493-1496 [doi]
- Transform-domain intra prediction for H.264Chen Chen, Ping-Hao Wu, Homer H. Chen. 1497-1500 [doi]
- An improved frame and macroblock layer bit allocation scheme for H.264 rate controlMinqiang Jiang, Nam Ling. 1501-1504 [doi]
- Fast multi-frame motion estimation for H.264 and its applications to complexity-aware streamingShu-Fa Lin, Meng-Ting Lu, Ming-Yu Chen, Chia-Ho Pan. 1505-1508 [doi]
- Fast three step intra prediction algorithm for 4×4 blocks in H.264Chao-Chung Cheng, Tian-Sheuan Chang. 1509-1512 [doi]
- Fast block motion estimation with early acceptance technique in H.264/JVTChi-Wai Lam, Lai-Man Po. 1513-1516 [doi]
- Development of a microwave receiving and transmission system using an optical modulatorTakayuki Yamashita, Kazuhisa Haeiwa, Toshihiro Negishi, Izuru Murasaki, Yoshikazu Toba, Masatoshi Onizawa. 1517-1520 [doi]
- A comparison of equalizers for compensating polarization-mode dispersion in 40-Gb/s optical systemsJonathan Sewter, Anthony Chan Carusone. 1521-1524 [doi]
- A 0.18-µm 10-GHz CMOS ring oscillator for optical transceiversHai Qi Liu, Wang Ling Goh, L. Siek. 1525-1528 [doi]
- Four-channel CMOS photoreceiver array for parallel optical interconnectsJu-Hyoung Mun, Sung Min Park, Myung-Ryong Nam. 1529-1532 [doi]
- A switched delay line based optical switch architecture with a bypass lineHo-Ting Wu, Kai-Wei Ke, Wang-Rong Chang, Hui-Tang Lin. 1533-1536 [doi]
- A 400Mbps CMOS spatially-modulated photoreceiver for optical storageEuhan Chong, Khoman Phang. 1537-1540 [doi]
- MIRROR: an interactive content based image retrieval systemKa-Man Wong, Kwok-Wai Cheung, Lai-Man Po. 1541-1544 [doi]
- Scheduling design for distributed video-on-demand serversYinqing Zhao, C. C. Jay Kuo. 1545-1548 [doi]
- Program segmentation for TV videosLiuhong Liang, Hong Lu, Xiangyang Xue, Yap-Peng Tan. 1549-1552 [doi]
- Content-based scalable sports video retrieval systemHuang-Chia Shih, Chung-Lin Huang. 1553-1556 [doi]
- A novel BP-based image retrieval systemJun-Hua Han, De-Shuang Huang. 1557-1560 [doi]
- A 110 dB CMRR/PSRR/gain CMOS operational amplifierVadim Ivanov, Igor M. Filanovsky. 1561-1564 [doi]
- Hybrid cascode compensation for two-stage CMOS operational amplifiersMohammad Yavari, Omid Shoaei, Francesco Svelto. 1565-1568 [doi]
- High-performance CMOS pseudo-differential amplifierA. D. Grasso, Salvatore Pennisi. 1569-1572 [doi]
- High-performance CMOS current feedback operational amplifierSalvatore Pennisi. 1573-1576 [doi]
- A design of controllableKhanittha Kaewdang, Wanlop Surakampontorn, Nobuo Fujii. 1577-1580 [doi]
- A novel very low-voltage SC-CMFB technique for fully-differential reset-opamp circuitsSai-Weng Sin, Seng-Pan U., Rui Paulo Martins. 1581-1584 [doi]
- A novel low-voltage cross-coupled passive sampling branch for reset- and switched-opamp circuitsSai-Weng Sin, Seng-Pan U., Rui Paulo Martins. 1585-1588 [doi]
- Current-mode universal biquad circuit using MO-OTAs and DO-CCIITakao Tsukutani, Yasuaki Sumi, Masami Higashimura, Yutaka Fukui. 1589-1592 [doi]
- A low-power method adding continuous variable gain to amplifiersT. Halvorsrod, O. Birkenes, C. Eichrodt. 1593-1596 [doi]
- Design consideration for lowering sensitivity to out of band interference of negative feedback amplifiersE. D. Totev, Chris J. M. Verhoeven. 1597-1600 [doi]
- A 2.4 GHz 82 dB-Omega fully differential CMOS transimpedance amplifier for optical receiver based on wide-swing cascode topologyYanjie Wang, Rabin Raut. 1601-1605 [doi]
- Cascaded double-stage configuration for high-performance broadband amplification in CMOSApisak Worapishet, I. Roopkom. 1606-1609 [doi]
- Influence of frequency compensation on the linearity of negative feedback amplifiersKoen van Hartingsveldt, Chris J. M. Verhoeven, J. Willms. 1610-1613 [doi]
- A 3 Gb/s 80 dB CMOS differential transimpedance amplifier for optical communication systemsWacharapol Pongpalit, Varakorn Kasemsuwan, Hyung Keun Ahn. 1614-1617 [doi]
- Power dependence of feedback amplifiers on opamp architectureYu Lin, Vipul Katyal, Randall L. Geiger. 1618-1621 [doi]
- Digitally controlled fully differential current conveyor: CMOS realization and applicationsSoliman A. Mahmoud, Mohammed A. Hashiesh, Ahmed M. Soliman. 1622-1625 [doi]
- A sub-word-parallel Galois field multiply-accumulate unit for digital signal processorsSubhadeep Roy. 1626-1629 [doi]
- A configurable dual moduli multi-operand modulo adderChip-Hong Chang, Shibu Menon, Bin Cao, Thambipillai Srikanthan. 1630-1633 [doi]
- An MCML four-bit ripple-carry adder design in 1 GHz rangeShahnam Khabiri, Maitham Shams. 1634-1637 [doi]
- Low power parallel multiplier with column bypassingMing-Chen Wen, Sying-Jyan Wang, Yen-Nan Lin. 1638-1641 [doi]
- Design of power-aware multiplier with graceful quality-power trade-offsJieh-Hwang Yen, Lan-Rong Dung, Chi-Yuan Shen. 1642-1645 [doi]
- Equalizing data-path for processing speed determination in block level pipeliningXiaoyao Liang, Akshay Athalye, Sangjin Hong. 1646-1649 [doi]
- Dual sense amplified bit lines (DSABL) architecture for low-power SRAM designRamy E. Aly, Mohamed A. Elgamel, Magdy A. Bayoumi. 1650-1653 [doi]
- A low-leakage twin-precision multiplier using reconfigurable power gatingMagnus Själander, Mindaugas Drazdziulis, Per Larsson-Edefors, Henrik Eriksson. 1654-1657 [doi]
- An energy-efficient skew compensation technique for high-speed skew-sensitive signalingLei Wang. 1658-1661 [doi]
- Area, power, and pin efficient bus transceiver using multi-bit-differential signalingDonald M. Chiarulli, Jason D. Bakos, Joel R. Martin, Steven P. Levitan. 1662-1665 [doi]
- Enhancing the efficiency of cluster voltage scaling technique for low-power applicationBehnam Amelifard, Ali Afzali-Kusha, Ahmad Khademzadeh. 1666-1669 [doi]
- A low-power high-SFDR CMOS direct digital frequency synthesizerJinn-Shyan Wang, Shiang-Jiun Lin, Chingwei Yeh. 1670-1673 [doi]
- Domino logic with an efficient variable threshold voltage keeperA. Amirabadi, Y. Mortazavi, Nariman Moezzi Madani, Ali Afzali-Kusha, Mehrdad Nourani. 1674-1677 [doi]
- A low dynamic power and low leakage power CMOS square-root circuitTadayoshi Enomoto, Nobuaki Kobayashi. 1678-1681 [doi]
- A robust adaptive cross microphone arrayJianfeng Chen, Koksoon Phua, Louis Shue, Hanwu Sun. 1682-1685 [doi]
- A combined TDA/FDA adaptive schema for stereophonic acoustic echo cancellationMohammed A. Khasawneh, Khaled A. Mayyas, R. M. Shalabi, Monther I. Haddad. 1686-1689 [doi]
- Image encryption using progressive cellular automata substitution and SCANRong-Jian Chen, Wen-Kai Lu, Jui-Lin Lai. 1690-1693 [doi]
- Study of a least-squares type method for noisy FIR filteringWei Xing Zheng. 1694-1697 [doi]
- Optimal user weighting fusion in DWT domain on-line signature verificationIsao Nakanishi, Hiroyuki Sakamoto, Yoshio Itoh, Yutaka Fukui. 1698-1701 [doi]
- A hardware generator for multi-point distributed random variablesNicola Bruti Liberati, Eckhard Platen, Filippo Martini, Massimo Piccardi. 1702-1705 [doi]
- Direct-digital synthesis using delta-sigma modulated signalsYuichiro Orino, Minoru Kuribayashi Kurosawa, Takashi Katagiri. 1706-1709 [doi]
- Performance of a type-based digital predistorter for solid-state power amplifier linearizationXinping Huang, Mario Caron. 1710-1713 [doi]
- Diversity gain s influence on MIMO s detectionHui Zhao, Kan Zheng, Wenbo Wang. 1714-1717 [doi]
- Multiuser scheduling for downlink in multi-antenna wireless systemsDeepali Arora, Panajotis Agathoklis. 1718-1721 [doi]
- Robust adaptive channel estimation of OFDM systems in time-varying narrowband interferenceZhiguo Zhang, Shing-Chow Chan, Hui Cheng. 1722-1725 [doi]
- Joint frequency offset estimation and multiuser detection using genetic algorithm in MC-CDMAHoang-Yang Lu, Wen-Hsien Fang. 1726-1729 [doi]
- Reduced-rank antenna selection for MIMO DS-CDMA channelsYu-Hao Chang, Xiaoli Yu. 1730-1733 [doi]
- Performance of the pulse pair method with an optimal lag value for frequency estimation in fading channelsSaman S. Abeysekera, Zhi Wang. 1734-1737 [doi]
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- Instrumentation of YSZ oxygen sensor calibration in liquid lead-bismuth eutecticXiaolong Wu, Jian Ma, Yingtao Jiang, Bingmei Fu, Wei Hang, Jinsuo Zhang, Ning Li. 1746-1749 [doi]
- An automatic acoustic bathroom monitoring systemJianfeng Chen, Jianmin Zhang, Alvin Harvey Kam, Louis Shue. 1750-1753 [doi]
- A PWM DPS with pixel-level reconfigurable 4/8-bit counter/SRAMYat-Fong Yung, Amine Bermak. 1754-1757 [doi]
- Sensor array for multiple emission gas measurementsMatti Kutila, Jouko Viitanen. 1758-1761 [doi]
- Pulse-based interface circuits for SPR sensing systems [analyte concentration measurement]Lisa E. Hansen, Matthew M. W. Johnston, Denise M. Wilson. 1762-1765 [doi]
- Network-on-chip-centric approach to interleaving in high throughput channel decodersChristian Neeb, Michael J. Thul, Norbert Wehn. 1766-1769 [doi]
- Power analysis of link level and end-to-end data protection in networks on chipAxel Jantsch, Robert Lauter, Arseni Vitkovski. 1770-1773 [doi]
- Effect of traffic localization on energy dissipation in NoC-based interconnectPartha Pratim Pande, Cristian Grecu, Michael Jones, André Ivanov, Res Saleh. 1774-1777 [doi]
- A methodology for design, modeling, and analysis of networks-on-chipJiang Xu, Wayne Wolf, Jörg Henkel, Srimat T. Chakradhar. 1778-1781 [doi]
- Quantitative modelling and comparison of communication schemes to guarantee quality-of-service in networks-on-chipMehmet Derin Harmanci, Nuria Pazos Escudero, Yusuf Leblebici, Paolo Ienne. 1782-1785 [doi]
- VLSI architecture based on packet data transfer scheme and its applicationYuya Homma, Michitaka Kameyama, Yoshichika Fujioka, Nobuhiro Tomabechi. 1786-1789 [doi]
- Single reference frame multiple current macroblocks scheme for multi-frame motion estimation in H.264/AVCTung-Chien Chen, Yu-Wen Huang, Chuan-Yung Tsai, Chao-Tsung Huang, Liang-Gee Chen. 1790-1793 [doi]
- A novel VLSI architecture for VBSME in MPEG-4 AVC/H.264Cao Wei, Mao Zhi-gang. 1794-1797 [doi]
- Architecture of global motion compensation for MPEG-4 advanced simple profileYi-Hau Chen, Ching-Yeh Chen, Liang-Gee Chen. 1798-1801 [doi]
- Combined 2-D transform and quantization architectures for H.264 video codersHeng-Yao Lin, Yi-Chih Chao, Che-Hong Chen, Bin-Da Liu, Jar-Ferr Yang. 1802-1805 [doi]
- Combined frame memory architecture for motion compensation in video decodingNelson Yen-Chung Chang, Tian-Sheuan Chang. 1806-1809 [doi]
- An H.264/AVC decoder with 4×4-block level pipelineTing-An Lin, Sheng-Zen Wang, Tsu-Ming Liu, Chen-Yi Lee. 1810-1813 [doi]
- Multiplication by two integers using the minimum number of addersAndrew G. Dempster, Malcolm D. Macleod. 1814-1817 [doi]
- Signed power-of-two allocation scheme for the design of lattice orthogonal filter banksYa Jun Yu, Yong Ching Lim. 1819-1822 [doi]
- I/sup 2/CRA: contention resolution algorithm for intra- and inter-coefficient common subexpression eliminationFei Xu, Chip-Hong Chang, Ching-Chuen Jong. 1823-1826 [doi]
- Design and implementation of multiplierless adjustable fractional-delay all-pass filtersJuha Yli-Kaakinen, Tapio Saramäki. 1827-1830 [doi]
- Design of FIR digital filters with discrete coefficients via convex relaxationWu-Sheng Lu. 1831-1834 [doi]
- Further complexity reduction of parallel FIR filtersChao Cheng, Keshab K. Parhi. 1835-1838 [doi]
- Glitch-free discretely programmable clock generation on chipMaurice Meijer, Francesco Pessolano, José Pineda de Gyvez. 1839-1842 [doi]
- A three-level toggle-avoid bus signaling schemeYan Zhang, Travis N. Blalock, Mircea R. Stan. 1843-1846 [doi]
- A 1.2V multi Gb/s/pin memory interface circuits with high linearity and low mismatchTae-Hyoung Kim, Uk-Rae Cho, Hyun-Geun Byun. 1847-1850 [doi]
- A distributed FIFO scheme for on chip communicationRay Robert Rydberg III, Jabulani Nyathi, José G. Delgado-Frias. 1851-1854 [doi]
- A multifunctional high-voltage driver chip for low-power mobile display systemsJan Doutreloigne, Miguel Vermandel, Herbert De Smet, André Van Calster. 1855-1858 [doi]
- Design on mixed-voltage I/O buffer with blocking NMOS and dynamic gate-controlled circuit for high-voltage-tolerant applicationsMing-Dou Ker, Shih-Lun Chen, Chia-Sheng Tsai. 1859-1862 [doi]
- Performance constrained floorplanning based on partial clustering [IC layout]Yuchun Ma, Xianlong Hong, Sheqin Dong, Song Chen, Chung-Kuan Cheng. 1863-1866 [doi]
- Wire-driven microarchitectural design space explorationMongkol Ekpanyapong, Chinnakrishnan S. Ballapuram, Sung Kyu Lim, Hsien-Hsin S. Lee. 1867-1870 [doi]
- Integrated routing resource assignment for RLC crosstalk minimizationYici Cai, Bin Liu, Qiang Zhou, Xianlong Hong. 1871-1874 [doi]
- Placement for the reconfigurable datapath architectureYen-Tai Lai, Hsin-Ya Lai, Chia-Nan Yeh. 1875-1878 [doi]
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- Fixed-outline floorplanning with constraints through instance augmentationRong Liu, Sheqin Dong, Xianlong Hong, Yoji Kajitani. 1883-1886 [doi]
- High light-load efficiency charge pumpsChristian Falconi, Giancarlo Savone, Arnaldo D Amico. 1887-1890 [doi]
- Efficiency comparison between doubler and Dickson charge pumpsDavide Baderna, Alessandro Cabrini, Guido Torelli, Marco Pasotti. 1891-1894 [doi]
- Charge redistribution loss consideration in optimal charge pump designWing-Hung Ki, Feng Su, Chi-Ying Tsui. 1895-1898 [doi]
- A 5V charge pump in a standard 1.8-V 0.18-µm CMOS processT. Hasan, Torsten Lehmann, Chee Yee Kwok. 1899-1902 [doi]
- Heap charge pump optimisation by a tapered architectureR. Arona, Edoardo Bonizzoni, Franco Maloberti, Guido Torelli. 1903-1906 [doi]
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- Quantization errors in committee machine for gas sensor applicationsMinghua Shi, Amine Bermak, Sofiane Brahim-Belhouari. 1911-1914 [doi]
- A 100×100 pixels orientation-selective multi-chip vision systemKazuhiro Shimonomura, Tetsuya Yagi. 1915-1918 [doi]
- A real-time spike-domain sensory information processing system [image processing applications]R. Jacob Vogelstein, Udayan Mallik, Eugenio Culurciello, Gert Cauwenberghs, Ralph Etienne-Cummings. 1919-1922 [doi]
- Analog CMOS implementation of a neuromorphic oscillator with current-mode low-pass filtersKazuki Nakada, Tetsuya Asai, Yoshihito Amemiya. 1923-1926 [doi]
- Rich spike-synchronization phenomena of pulse-coupled bifurcating neuronsYoshio Kon no, Toshimichi Saito, Hiroyuki Torikai. 1927-1931 [doi]
- Novel µ-power log-domain integratorsW. Aly-Mekawi, Ezz I. El-Masry. 1932-1935 [doi]
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- On the analog generation of pink noise from white noiseA. L. Dalcastangê, Sidnei Noceti Filho. 1944-1947 [doi]
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- Accuracy limitations of pipelined ADCsPatrick J. Quinn, Arthur H. M. van Roermund. 1956-1959 [doi]
- A new ratio-independent A/D conversion technique for high-resolution pipeline A/D convertersByung Geun Lee, Shouli Yan. 1960-1963 [doi]
- Design and optimization of multi-bit front-end stage and scaled back-end stages of pipelined ADCsPatrick J. Quinn, Arthur H. M. van Roermund. 1964-1967 [doi]
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- A 1-v 9-bit, 2.5-Msample/s pipelined ADC with merged switched-opamp and opamp-sharing techniquesHsin-Hung Ou, Bin-Da Liu. 1972-1975 [doi]
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- Low-voltage programmable g::m::-C filter for hearing aids using dynamic gate biasingLouie Pylarinos, Khoman Phang. 1984-1987 [doi]
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- Wave log-domain filtersMykhaylo A. Teplechuk, John I. Sewell. 1992-1995 [doi]
- Complex wave filters and wave group-delay equalisers in log-domainMykhaylo A. Teplechuk, John I. Sewell. 1996-1999 [doi]
- 1 V compact class-AB CMOS log filtersFrancisco Serra-Graells, Xavier Redondo. 2000-2003 [doi]
- Symmetry-based analytically closed-form design of variable fractional-delay FIR digital filtersTian-Bo Deng, Yong Lian. 2004-2007 [doi]
- A decomposition technique for cascaded IIR-like filter blocks generating linear-phase FIR filtersPeyman Arian, Tapio Saramäki, Adly T. Fam. 2008-2011 [doi]
- Synthesis of narrowband linear-phase FIR filters with a piecewise-polynomial impulse responseRaija Lehto, Tapio Saramäki, Olli Vainio. 2012-2015 [doi]
- Interpolation factor analysis for jointly optimized frequency-response masking filtersJianghong Yu, Yong Lian. 2016-2019 [doi]
- A novel low-complexity method for parallel multiplierless implementation of digital FIR filtersYongtao Wang, Kaushik Roy. 2020-2023 [doi]
- Design of complex FIR filters using the frequency-response masking approachYongzhi Liu, Zhiping Lin. 2024-2027 [doi]
- A new minimax design for 2D FIR filters with low group delayWu-Sheng Lu, Takao Hinamoto. 2028-2031 [doi]
- A low-complexity scanned-array 3D IIR frequency-planar filterArjuna Madanayake, Leonard T. Bruton. 2032-2035 [doi]
- A perfect reconstruction filter bank with irrational down-sampling factorsSoo-Chang Pei, Meng-Ping Kao, Jian-Jiun Ding. 2036-2039 [doi]
- Fractional polynomials and nD systemsKrzysztof Galkowski, Anton Kummert. 2040-2043 [doi]
- A constructive procedure for multidimensional realization and LFR uncertainty modellingLi Xu, Huijin Fan, Zhiping Lin, Yegui Xiao, Yoshihisa Anazawa. 2044-2047 [doi]
- Demosaicing with improved edge direction detectionXiaomeng Wang, Weisi Lin, Ping Xue. 2048-2051 [doi]
- Approximate optimal demodulation for multi-user binary coherent chaos-shift-keying communication systemsJi Yao, Anthony J. Lawrance. 2052-2055 [doi]
- A novel code acquisition algorithm and its application to Markov spreading codesTohru A. Khan, Nobuoki Eshima, Yutaka Jitsumatsu, Tohru Kohda. 2056-2059 [doi]
- Stroboscopic model and bifurcations in TCP/REDMingjian Liu, Hui Zhang, Ljiljana Trajkovic. 2060-2063 [doi]
- An analog-to-digital converter with dynamic window for optimal rational number approximationMasaaki Naka, Toshimichi Saito, Aya Tanaka. 2064-2067 [doi]
- Wavelet-based estimation of long-range dependence in MPEG video tracesNikola Cackov, Zelimir Lucic, Momcilo Bogdanov, Ljiljana Trajkovic. 2068-2071 [doi]
- Nonlinear output feedback control of TCP/AQM networksYi Fan, Zhong-Ping Jiang, Shivendra S. Panwar, Hao Zhang. 2072-2075 [doi]
- Reduced latency arithmetic decoder for JPEG2000 block decodingMichael Dyer, David Taubman, Saeid Nooshabadi. 2076-2079 [doi]
- Matching pursuits using slant patterns and its dictionary design [video coding applications]Shinya Kako, Kousuke Imamura, Hideo Hashimoto. 2080-2083 [doi]
- Image compression with interpolation in wavelet-transform domainWei-Pin Lin, Chih-Ming Chen, Yung-Chang Chen. 2084-2087 [doi]
- An image compression scheme based on parametric Haar-like transformSusanna Minasyan, Jaakko Astola, David Guevorkian. 2088-2091 [doi]
- Lifting-based multi-view image codingNantheera Anantrasirichai, Cedric Nishan Canagarajah, David R. Bull. 2092-2095 [doi]
- High quality Motion JPEG2000 coding scheme based on the human visual systemRyusuke Miyamoto, Hiroaki Sugita, Yoshiteru Hayashi, Hiroshi Tsutsui, Takahiko Masuzaki, Takao Onoye, Yukihiro Nakamura. 2096-2099 [doi]
- A full-range all-pass variable phase shifter for multiple antenna receiversHossein Zarei, Allan Ecker, Jinho Park, David J. Allstot. 2100-2103 [doi]
- Design considerations for a 10 GHz CMOS transmit-receive switchK. M. Naegle, Subhanshu Gupta, David J. Allstot. 2104-2107 [doi]
- A gain/phase mismatch calibration procedure for RF I/Q downconvertersStefano Vitali, Eleonora Franchi, Antonio Gnudi. 2108-2111 [doi]
- 8 GHz tunable CMOS quadrature generator using differential active inductorsFarsheed Mahmoudi, C. Andre T. Salama. 2112-2115 [doi]
- A 5.25 GHz CMOS even harmonic mixer with an enhancing inductanceMing-Feng Huang, Shuenn-Yuh Lee, Chung J. Kuo. 2116-2119 [doi]
- A new CMOS wideband RF front-end for multistandard low-IF wireless receiversIgor M. Filanovsky, Md. Mahbub Reja, Ahmed Allam. 2120-2123 [doi]
- An integrated rate control scheme for TCP-friendly MPEG-4 video transmissionJun-Yao Wang, Wen-Shyang Hwang, Wen-Fong Wang, Ce-Kuen Shieh. 2124-2127 [doi]
- Improved and fast algorithms for intra 4×4 mode decision in H.264/AVCChao-Hsuing Tseng, Hung-Ming Wang, Jar-Ferr Yang. 2128-2131 [doi]
- Tightly-coupled MPEG-4 video encoder framework on asymmetric dual-core platformsCheng-Nan Chiu, Chien-Tang Tseng, Chun-Jen Tsai. 2132-2135 [doi]
- Hardware-efficient computing architecture for motion compensation interpolation in H.264 video codingWen-Nung Lie, Han-Ching Yeh, Tom C.-I. Lin, Chien-Fa Chen. 2136-2139 [doi]
- A memory-efficient deblocking filter for H.264/AVC video codingTsu-Ming Liu, Wen-Ping Lee, Ting-An Lin, Chen-Yi Lee. 2140-2143 [doi]
- Variable frame rate transcoding considering motion information [video transcoding]Haiyan Shu, Lap-Pui Chau. 2144-2147 [doi]
- Programming analog computational memory elements to 0.2 accuracy over 3.5 decades using a predictive methodAbhishek Bandyopadhyay, Guillermo J. Serrano, Paul E. Hasler. 2148-2151 [doi]
- Ramp voltage supply using adiabatic charging principlePui-Tak So, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun. 2152-2155 [doi]
- A 0.8 V, 360 nW Gm-C biquad based on FGMOS transistors [biquadratic filter]Esther Rodríguez-Villegas. 2156-2159 [doi]
- A 0.9 V offset compensated FGMOS comparatorEsther Rodríguez-Villegas. 2160-2163 [doi]
- Biasing techniques for subthreshold MOS resistive gridsKeng Hoong Wee, Ji-Jon Sit, Rahul Sarpeshkar. 2164-2167 [doi]
- Programmable floating-gate CMOS resistorsErhan Ozalevli, Paul E. Hasler. 2168-2171 [doi]
- Indirect programming of floating-gate transistorsDavid W. Graham, Ethan Farquhar, Brian P. Degnan, Christal Gordon, Paul E. Hasler. 2172-2175 [doi]
- A fully differential line driver with on-chip calibrated source termination for gigabit and fast Ethernet in a standard 0.13µ CMOS processDan Stiurca. 2176-2179 [doi]
- Low-power LVDS receiver for 1.3Gbps physical layer (PHY) interfaceGunjan Mandal, Pradip Mandal. 2180-2183 [doi]
- A CMOS front-end architecture for hard-disk drive read-channel equalizerTertulien Ndjountche, Fa-Long Luo, Christophe Bobda. 2184-2187 [doi]
- Soft fault test and diagnosis for analog circuitsPeng Wang, Shiyuan Yang. 2188-2191 [doi]
- A clock recovery circuit using half-rate 4×-oversampling PDHyung-Wook Jang, Sung-Sop Lee, Jin-Ku Kang. 2192-2195 [doi]
- Built-in current sensor with reduced voltage drop using thin-film transistorsAlkis A. Hatzopoulos, Stelios Siskos, Charalambos A. Dimitriadis, Nikolaos P. Papadopoulos. 2196-2199 [doi]
- Low-voltage CMOS analog bootstrapped switch for sample-and-hold circuit: design and chip characterizationChristian Jesús B. Fayomi, Gordon W. Roberts, Mohamad Sawan. 2200-2203 [doi]
- Digital built-in self-test of CMOS analog iterative decodersMimi Yiu, Chris Winstead, Vincent C. Gaudet, Christian Schlegel. 2204-2207 [doi]
- Built-in self-test for automatic analog frequency response measurementDayu Yang, Foster F. Dai, Charles E. Stroud. 2208-2211 [doi]
- Linear-time algorithm for computing minimum checkpoint sets for simulation-based verification of HDL programsElena Dubrova. 2212-2215 [doi]
- The chaotic numbers of the bipartite and tripartite graphsNam-Po Chiang. 2216-2218 [doi]
- Decoupling capacitance allocation in noise-aware floorplanning based on DBL representationJin-Tai Yan, Kai-Ping Lin, Yen-Hsiang Chen. 2219-2222 [doi]
- Efficient computation of dominators in multiple-output circuit graphsRené Krenz. 2223-2226 [doi]
- Hardware reduction using a 6-connectivity interconnection network over a 4-connectivity VLSI asynchronous array processorValentin Gies, Thierry M. Bernard, Alain Mérigot. 2227-2230 [doi]
- Maximum weight matching-based algorithms for k-edge-connectivity augmentation of a graphToshimasa Watanabe, Satoshi Taoka, Toshiya Mashima. 2231-2234 [doi]
- An AQM routing control for reducing congestion in communication networksSabato Manfredi. 2235-2238 [doi]
- GA-based applications for routing with an upper bound constraintJun Inagaki, Miki Haseyama. 2239-2242 [doi]
- Analyses of intermodulation effects in fractional-N frequency synthesisPaul V. Brennan, Dai Jiang, Jianxin Zhang. 2243-2246 [doi]
- Behavioral modeling and simulation of weakly nonlinear sampled-data systemsEwout Martens, Georges G. E. Gielen. 2247-2250 [doi]
- Analytical expression of HD3 due to non-linear MOS switch in MOSFET-C sample and hold circuitsSomnath Sengupta. 2251-2254 [doi]
- Analysis of jitter peaking and jitter accumulation in re-circulating delay-locked loopsPooya Torkzadeh, Armin Tajalli, Seyed Mojtaba Atarodi. 2255-2258 [doi]
- Root iterations and the computation of minimum and maximum zeros of polynomialsMohammed A. Hasan. 2259-2262 [doi]
- Phase noise spectra analysis for LC oscillatorsHua Zhang, Dian Zhou, Yi Hu, Ruiming Li, Jianzhong Zhang. 2263-2266 [doi]
- A model-based approach for the development of LMS algorithms [adaptive filter applications]Guang Deng, Wai-Yin Ng. 2267-2270 [doi]
- A new approach for non-uniform subband adaptive filteringYoshinori Ichikawa, Toshihiro Furukawa. 2271-2274 [doi]
- Adaptive filtering using constrained subband updatesWoon S. Gan, Kong A. Lee. 2275-2278 [doi]
- Performance of two novel fast affine projection adaptation algorithmsHeping Ding. 2279-2282 [doi]
- Coordinate descent iterations in pseudo affine projection algorithmFelix Albu, Constantine Kotropoulos. 2283-2286 [doi]
- Adaptive IIR notch filters: state-space approachAloys Mvuma, Shotaro Nishimura, Takao Hinamoto. 2287-2290 [doi]
- Structured stochastic optimization strategies for problems with ill-conditioned error surfacesS. Pal, D. J. Krusienski, W. Kenneth Jenkins. 2291-2294 [doi]
- Modified Taylor-series method for source and receiver localization using TDOA measurements with erroneous receiver positionsDominic K. C. Ho, La-or Kovavisaruch. 2295-2298 [doi]
- Generalized n-dimensional k-order systems: computing the transfer functionGeorge E. Antoniou, Marinos T. Michael. 2299-2302 [doi]
- Hilbert pair of wavelets via the matching design technique [matched filters]David B. H. Tay, Marimuthu Palaniswami. 2303-2306 [doi]
- The missing observations theorem and a new proof of Levinson s recursionCharles W. Therrien. 2307-2308 [doi]
- On the time-frequency content of Weyl-Heisenberg frames generated from odd and even functions [signal representation applications]Lisandro Lovisolo, M. G. de Pinho, Eduardo A. B. da Silva, Paulo S. R. Diniz. 2309-2312 [doi]
- Image compression using texture modelingLahouari Ghouti, Ahmed Bouridane, Mohammad K. Ibrahim. 2313-2316 [doi]
- Unconstrained functional criteria for canonical correlation analysisM. A. Hasan. 2317-2320 [doi]
- Some properties of generalized 2-D mirror image and anti mirror image polynomialsVenkat Ramachandran, Majid Ahmadi, Christian S. Gargour. 2321-2324 [doi]
- Simulation of quantum cellular automaton circuits based on genetic simulated annealing algorithmWang Sen, Cai Li. 2325-2328 [doi]
- Why area might reduce power in nanoscale CMOSPaul Beckett, S. C. Goldstein. 2329-2332 [doi]
- Quantum circuits for stabilizer codesChien-Hsing Wu, Yan-Chr Tsai, Hwa-Long Tsai. 2333-2336 [doi]
- Exact noise analysis of a CMOS BDJ APSSylvain Feruglio, Victor Fouad Hanna, Georges Alquié, Gabriel Vasilescu. 2337-2340 [doi]
- A novel oscillation circuit using a resonant-tunneling diodeNaokazu Muramatsu, Hiroshi Okazaki, Takao Waho. 2341-2344 [doi]
- Low-power spatial computing using dynamic threshold devicesPaul Beckett. 2345-2348 [doi]
- On the impact of traffic statistics on quality of service for networks on chipStefano Santi, Bill Lin, Ljupco Kocarev, Gian Mario Maggio, Riccardo Rovatti, Gianluca Setti. 2349-2352 [doi]
- Slack-time aware routing in NoC systemsDaniel Andreasson, Shashi Kumar. 2353-2356 [doi]
- An arbitration look-ahead scheme for reducing end-to-end latency in networks on chipKwanho Kim, Se-Joong Lee, Kangmin Lee, Hoi-Jun Yoo. 2357-2360 [doi]
- Self-calibrating networks-on-chipFrederic Worm, Paolo Ienne, Patrick Thiran, Giovanni De Micheli. 2361-2364 [doi]
- A novel approach for network on chip emulationNicolas Genko, David Atienza, Giovanni De Micheli, Luca Benini, Jose Manuel Mendias, Román Hermida, Francky Catthoor. 2365-2368 [doi]
- A reconfigurable crossbar switch with adaptive bandwidth control for networks-on-chipDonghyun Kim, Kangmin Lee, Se-Joong Lee, Hoi-Jun Yoo. 2369-2372 [doi]
- VLSI architectures for stereoscopic video disparity matching and object extractionJian-Hung Lin, Keshab K. Parhi. 2373-2376 [doi]
- Parallel algorithm for hardware implementation of inverse halftoningUmair F. Siddiqi, Sadiq M. Sait, Aamir A. Farooqui. 2377-2380 [doi]
- Real-time image compression based on wavelet vector quantization, algorithm and VLSI architectureSafar Hatami, Shervin Sharifi, Mahmoud Kamarei, Hossein Ahmadi. 2381-2384 [doi]
- Partial encryption of compressed images employing FPGAMamun Bin Ibne Reaz, Faisal Mohd-Yasin, S. L. Tan, H. Y. Tan, Muhammad I. Ibrahimy. 2385-2388 [doi]
- A computational digital-pixel-sensor VLSI featuring block-readout architecture for pixel-parallel rank-order filteringBenjamas Tongprasit, Kiyoto Ito, Tadashi Shibata. 2389-2392 [doi]
- VLSI architecture design for a fast parallel label assignment in binary imageShyue-Wen Yang, Ming-Hwa Sheu, Hsien-Huang P. Wu, Hung-En Chien, Ping-Kuo Weng, Ying-Yih Wu. 2393-2396 [doi]
- A novel low-complexity spatio-temporal ultra wide-angle polyphase cone filter bank applied to sub-pixel motion discriminationBernhard Kuenzle, Leonard T. Bruton. 2397-2400 [doi]
- Minimization of L/sub 2/-sensitivity for a class of 2D state-space digital filters subject to L/sub 2/-scaling constraintsTakao Hinamoto, Ken-ichi Iwata, Wu-Sheng Lu. 2401-2404 [doi]
- An efficient multidimensional decimation-in-frequency FHT algorithm based on the radix-2/4 approachSaad Bouguezel, M. Omair Ahmad, M. N. S. Swamy. 2405-2408 [doi]
- Generalized alpha-VSH polynomials and stability of delta-operator based 2D discrete-time systemsHari C. Reddy, P. K. Rajan. 2409-2412 [doi]
- High-resolution DOA estimation by algebraic phase unwrapping algorithmIsao Yamada. 2413-2416 [doi]
- Optimal construction of compactly-supported multidimensional waveletsHyungju Park. 2417-2420 [doi]
- Pre-capturing static pulsed flip-flopsAliakbar Ghadiri, Hamid Mahmoodi-Meimand. 2421-2424 [doi]
- A mathematical programming approach to designing MOS current-mode logic circuitsShahnam Khabiri, Maitham Shams. 2425-2428 [doi]
- A low-power static dual edge-triggered flip-flop using an output-controlled discharge configurationMyint Wai Phyu, Wang Ling Goh, Kiat Seng Yeo. 2429-2432 [doi]
- An efficient pass-transistor-logic synthesizer using multiplexers and inverters onlyShen-Fu Hsiao, Ming-Yu Tsai, Ming-Chih Chen, Chia-Sheng Wen. 2433-2436 [doi]
- An approach to the design of PFSCL gatesMassimo Alioto, Ada Fort, Luca Pancioni, Santina Rocchi, Valerio Vignoli. 2437-2440 [doi]
- Programmable floating-gate techniques for CMOS invertersBrian P. Degnan, Richard B. Wunderlich, Paul E. Hasler. 2441-2444 [doi]
- Transition time bounded low-power clock tree constructionMin Pan, Chris C. N. Chu, J. Morris Chang. 2445-2448 [doi]
- Timing-driven global routing with efficient buffer insertionJingyu Xu, Xianlong Hong, Tong Jing. 2449-2452 [doi]
- Explicit delay metric for interconnect optimizationMin Ma, Mourad Oulmane, Nicholas C. Rumin. 2453-2456 [doi]
- Uncertainty modeling of gate delay considering multiple input switchingSatish K. Yanamanamanda, Jun Li, Janet Meiling Wang. 2457-2460 [doi]
- Timing yield estimation using statistical static timing analysisMin Pan, Chris C. N. Chu, Hai Zhou. 2461-2464 [doi]
- A non-iterative equivalent waveform model for timing analysis in presence of crosstalkKishore Kumar Muchherla, Pinhong Chen, Janet Meiling Wang. 2465-2468 [doi]
- A theoretical solution for PWM with non-ideal transient responseBin Zhou, Wing Hong Lau, Henry Shu-Hung Chung. 2469-2472 [doi]
- Efficiency-oriented switching frequency tuning for a buck switching power converterGerard Villar, Eduard Alarcón, Francesc Guinjoan, Alberto Poveda. 2473-2476 [doi]
- Fast-scale instability of single-stage power-factor-correction power suppliesXiaoqun Wu, Chi Kong Tse, Octavian Dranga, Junan Lu. 2477-2480 [doi]
- Controlling chaos in DC/DC converters using optimal resonant parametric perturbationYufei Zhou, Herbert H. C. Iu, Chi Kong Tse, Jun-Ning Chen. 2481-2484 [doi]
- Generalized analysis of integrated magnetic component based low voltage interleaved DC-DC buck converter for efficiency improvementH. N. Nagaraja, Amit Patra, Debaprasad Kastha. 2485-2489 [doi]
- Wavelet-based piecewise approximation of steady-state waveforms for power electronics circuits [power converter examples]K. C. Tam, Siu Chung Wong, Chi Kong Tse. 2490-2493 [doi]
- A new architecture for analog sampled-data neural filtersBehnam Sedighi, Behnam Analui, Mehrdad Sharif Bakhtiar. 2494-2497 [doi]
- Annealing robust Walsh function networks for modeling with outliers and digital implementationJin-Tsong Jeng, Chen-Chia Chuang. 2498-2501 [doi]
- Self-organizing neural grove: effective multiple classifier system with pruned self-generating neural treesHirotaka Inoue, Hiroyuki Narihisa. 2502-2505 [doi]
- Self organizing map based channel prediction for OFDMAH. M. S. B. Senevirathna, Katsumi Yamashita, Hai Lin. 2506-2509 [doi]
- Probabilistic computing with future deep sub-micrometer devices: a modelling approachNor H. Hamid, Alan F. Murray, David Laurenson, Scott Roy, Binjie Cheng. 2510-2513 [doi]
- Electrical and optical on-chip interconnects in scaled microprocessorsGuoqing Chen, Hui Chen, Mikhail Haurylau, Nicholas Nelson, Philippe M. Fauchet, Eby G. Friedman, David H. Albonesi. 2514-2517 [doi]
- A stepwise constant conductance approach for simulating resonant tunneling diodesBharat B. Sukhwani, Janet Meiling Wang. 2518-2521 [doi]
- Performance comparison of quantum-dot cellular automata addersRumi Zhang, Wei Wang, Konrad Walus, Graham A. Jullien. 2522-2526 [doi]
- QCA-based nano circuits design [adder design example]Rui Tang, Fengming Zhang, Yong-Bin Kim. 2527-2530 [doi]
- On the functional failure and switching time analysis of the MOBILE circuit [monostable-bistable logic element]Sing-Rong Li, Pinaki Mazumder, Kyounghoon Yang. 2531-2534 [doi]
- Single-electron circuit for inhibitory spiking neural network with fault-tolerant architectureTakahide Oya, Tetsuya Asai, Yoshihito Amemiya, Alexandre Schmid, Yusuf Leblebici. 2535-2538 [doi]
- A new technique for automatic error correction in Sigma-Delta modulatorsFriedel Gerfers, Maurits Ortmanns, Yiannos Manoli. 2539-2542 [doi]
- Increased jitter sensitivity in continuous- and discrete-time Sigma-Delta modulators due to finite opamp settling speedFriedel Gerfers, Maurits Ortmanns, Yiannos Manoli. 2543-2546 [doi]
- On the effects of finite and nonlinear DC-gain of the amplifiers in switched-capacitor Delta-Sigma modulatorsHashem Zare-Hoseini, Izzet Kale. 2547-2550 [doi]
- A multi-mode Sigma-Delta analog-to-digital converter for GSM, UMTS and WLANAndrea Xotta, Andrea Gerosa, Andrea Neviani. 2551-2554 [doi]
- On reducing leakage quantization noise of multistage Sigma-Delta modulator using nonlinear oscillationTeng-Hung Chang, Lan-Rong Dung, Jwin-Yen Guo. 2555-2558 [doi]
- Design of a high-frequency second-order Delta-Sigma modulatorFa-Long Luo, Rolf Unbehauen, Tertulien Ndjountche. 2559-2562 [doi]
- Novel and robust constant-g/sub m/ technique for rail-to-rail CMOS amplifier input stagesShouli Yan, Jingyu Hu, Tongyu Song. 2563-2566 [doi]
- A constant-g/sub m/ rail-to-rail op amp input stage using dynamic current scaling techniqueShouli Yan, Jingyu Hu, Tongyu Song, Edgar Sánchez-Sinencio. 2567-2570 [doi]
- Constant-g/sub m/ techniques for rail-to-rail CMOS amplifier input stages: a comparative studyShouli Yan, Jingyu Hu, Tongyu Song, Edgar Sánchez-Sinencio. 2571-2574 [doi]
- Feedforward reversed nested Miller compensation techniques for three-stage amplifiersFeng Zhu, Shouli Yan, Jingyu Hu, Edgar Sánchez-Sinencio. 2575-2578 [doi]
- Well-defined design procedure for a three-stage CMOS OTARosario Mita, Gaetano Palumbo, Salvatore Pennisi. 2579-2582 [doi]
- CMOS single-to-differential current amplifierSalvatore Pennisi, Giuseppe Scotti, Alessandro Trifiletti. 2583-2586 [doi]
- Efficient digital filter structures with minimum roundoff noise gainZixue Zhao, Gang Li, Jiong Zhou. 2587-2590 [doi]
- Design of multiplier-free state-space digital filtersTamal Bose, Zhongkai Zhang, O. Chauhan, Miloje S. Radenkovic. 2591-2594 [doi]
- Multi-output passive digital filtersH. K. Kwan. 2595-2598 [doi]
- Fourth-order structures for multiplierless realizations of bandpass and bandstop digital filters transformed from all-pole lowpass filtersMrinmoy Bhattacharya, Tapio Saramäki. 2599-2602 [doi]
- Design of two-dimensional recursive filters by using a novel genetic algorithmJinn-Tsong Tsai, Jyh-Horng Chou, Tung-Kuan Liu, Chien-Han Chen. 2603-2606 [doi]
- Wordlength determination algorithms for hardware implementation of linear time invariant systems with prescribed output accuracyS. C. Chan, K. M. Tsui. 2607-2610 [doi]
- Blind I/Q imbalance compensation in OFDM receivers based on adaptive I/Q signal decorrelationMikko Valkama, Markku Renfors, Visa Koivunen. 2611-2614 [doi]
- Peak-to-average power-ratio reduction algorithms for OFDM systems via constellation extensionYajun Kou, Wu-Sheng Lu, Andreas Antoniou. 2615-2618 [doi]
- Decision feedback IBI mitigation in OFDM systemsWen-Rong Wu, Chao-Yuan Hsu. 2619-2622 [doi]
- Fine timing synchronization using power delay profile for OFDM systemsHao Zhou, Yih-Fang Huang. 2623-2626 [doi]
- A preamble-aided symbol and frequency synchronization scheme for OFDM systemsMeng Wu, Wei-Ping Zhu. 2627-2630 [doi]
- New approximate QR-LS algorithms for minimum output energy (MOE) receivers in DS-CDMA communication systemsH. Cheng, Y. Zhou, S. C. Chan. 2631-2634 [doi]
- On phase noise in quadrature cross-coupled oscillatorsLuís Bica Oliveira, Ahmed Allam, Igor M. Filanovsky, Jorge R. Fernandes. 2635-2638 [doi]
- A precise clock phase multiplierS. Raman, S. Krishnan, A. Fiedler. 2639-2642 [doi]
- A spread spectrum clock generator for SATA-IIWei-Ta Chen, Jen-Chien Hsu, Hong-Wen Lune, Chau-chin Su. 2643-2646 [doi]
- Robust frequency divider based on resonant tunneling devicesMaria J. Avedillo, José M. Quintana, José L. Huertas. 2647-2650 [doi]
- Capacitively averaged multi-phase LC oscillatorsJunyoung Park, Michael P. Flynn. 2651-2654 [doi]
- Chebyshev approximation of baseband Volterra series for wideband RF power amplifiersPeter Singerl, Gernot Kubin. 2655-2658 [doi]
- A partitioned linear minimum mean square estimator for error concealment [video decoder error concealment]Tak-Song Chong, Oscar C. Au, Wing-San Chau, Tai-Wai Chan. 2659-2662 [doi]
- The dynamics and stability of layered congestion control for multimedia streamingHsu-Feng Hsiao, Jenq-Neng Hwang. 2663-2666 [doi]
- Fine-grain layered multicast based on hierarchical bandwidth inference congestion controlJian-Liang Lin, Soo-Chang Pei, Jenq-Neng Hwang. 2667-2670 [doi]
- Macroblock-based algorithm for dual-bitstream MPEG video streaming with VCR functionalitiesTak-Piu Ip, Yui-Lam Chan, Chang-Hong Fu, Wan-Chi Siu. 2671-2674 [doi]
- 20 dBm CMOS class AB power amplifier design for low cost 2 GHz-2.45 GHz consumer applications in a 0.13µm technologyVincent Knopik, Didier Belot, B. Martineau. 2675-2678 [doi]
- Silicon bipolar linear power amplifier for WCDMA mobile applicationsF. Carrara, P. Filoramo, G. Bottiglieri, Giovanni Palmisano. 2679-2682 [doi]
- A 2.4 GHz CMOS power amplifier using internal frequency doublingEllie Cijvat, Niklas Troedsson, Henrik Sjoland. 2683-2686 [doi]
- Development of 4-GHz flip-chip VCO moduleKari Stadius, Kari Halonen. 2687-2690 [doi]
- Phase noise and amplitude issues of a wide-band VCO utilizing a switched tuning resonatorAli Fard. 2691-2694 [doi]
- A study of high-frequency regenerative frequency dividersAmin Q. Safarian, Payam Heydari. 2695-2698 [doi]
- Image multi-noise removal by wavelet-based Bayesian estimatorXu Huang, Allan C. Madoc, Andrew D. Cheetham. 2699-2702 [doi]
- A framework of scalable layered access control for multimediaBin B. Zhu, Shipeng Li, Min Feng 0002. 2703-2706 [doi]
- Error resilient content-based image authentication over wireless channelShuiming Ye, Qibin Sun, Ee-Chien Chang. 2707-2710 [doi]
- A musical-driven video summarization system using content-aware mechanismsChen-Hsiu Huang, Chi-Hao Wu, Jin-Hau Kuo, Ja-Ling Wu. 2711-2714 [doi]
- Load-store reordering for low-power multimedia data transfersWoongki Baek, Jihong Kim. 2715-2718 [doi]
- S frame design for multiple description video codingDong Wang, Cedric Nishan Canagarajah, David R. Bull. 2719-2722 [doi]
- A near-infrared heart rate sensor IC with very low cutoff frequency using current steering techniqueAlex Wong, Kong-Pang Pun, Yuan-Ting Zhang, Kevin Hung. 2723-2726 [doi]
- Two preamplifiers for non-invasive on-chip recording of neural-signalsRobert Rieger, Dipankar Pal, John Taylor, Peter Langlois. 2727-2730 [doi]
- Wide frequency range voltage controlled ring oscillators based on transmission gatesMeng-Lieh Sheu, Ta-Wei Lin, Wei-Hung Hsu. 2731-2734 [doi]
- Applying multi-level sliced speech signals to bone-conducted communicationMariko Ishihara, Yoshiaki Shirataki. 2735-2738 [doi]
- RF-link for cortical neuroprosthesisJosé António Beltran Gerald, Gonçalo Nuno Gomes Tavares, Moisés Simões Piedade, Elisio Gonçalves Varela, Ricardo Daniel Ribeiro. 2739-2742 [doi]
- Power supply topologies for biphasic stimulation in inductively powered implantsGuoxing Wang, Wentai Liu, Mohanasankar Sivaprakasam, Mark S. Humayun, James D. Weiland. 2743-2746 [doi]
- New architecture for miniaturized fluorescence analysisDenise M. Wilson, Andrew Moe, Brian Marquardt. 2747-2750 [doi]
- A foveated AER imager chip [address event representation]Mehdi Azadmehr, Jens Petter Abrahamsen, Philipp Häfliger. 2751-2754 [doi]
- Microactuation of suspended MEMS beamsGiorgio Gattiker, Karan V. I. S. Kaler, Martin P. Mintchev. 2755-2758 [doi]
- Three-layer symmetrical and asymmetrical associative memories for image applicationsH. K. Kwan. 2759-2762 [doi]
- Hybrid sensor network and fusion algorithm for sound source localizationFavio Masson, Pedro Julián, Diego Puschini, P. Crocce, L. Arlenghi, Andreas G. Andreou, Pablo Sergio Mandolesi. 2763-2766 [doi]
- An embedded vision system based on an analog VLSI vision sensor [robot vision applications]Vlatko Becanovic, Stefan Kubina, Alan A. Stocker. 2767-2770 [doi]
- An image pre-processing system employing neuromorphic 100×100 pixel silicon retina [robot vision applications]R. Takami, Kazuhiro Shimonomura, Seiji Kameda, Tetsuya Yagi. 2771-2774 [doi]
- An efficient and well-controlled IC system development flow: design approved specification and design guided test planT. Zhou, Tuna B. Tarim. 2775-2778 [doi]
- A compound anisotropic diffusion for ultrasonic image denoising and edge enhancementShujun Fu, Qiuqi Ruan, Wenqia Wang, Yu Li. 2779-2782 [doi]
- Neural network ultrasonographic diagnosis system of cirrhosis using DWT for preprocessingYan Sun, Jianming Lu, Akira Kobayashi, Takashi Yahagi. 2783-2786 [doi]
- System-on-a-chip (SoC) model of a micropumpAngela Hodge-Miller, Robert W. Newcomb. 2787-2790 [doi]
- A 1.8V low-jitter CMOS ring oscillator with supply regulationTony Pialis, Eric W. Hu, Khoman Phang. 2791-2794 [doi]
- Effective capacitance for gate delay with RC loadsZhangcai Huang, Atsushi Kurokawa, Yasuaki Inoue. 2795-2798 [doi]
- A frequency synthesizer using two different delay feedbacksChien-Hung Kuo, Yi-Shun Shih. 2799-2802 [doi]
- Moore test using Gray codeTakashi Hisakado, Kohshi Okumura. 2803-2806 [doi]
- A low spur fractional-N frequency synthesizer architectureVolodymyr Kratyuk, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram. 2807-2810 [doi]
- A 1-V 2.4-GHz low-power fractional-N frequency synthesizer with sigma-delta modulator controllerShuenn-Yuh Lee, Chung-Han Cheng, Ming-Feng Huang, Shyh-Chyang Lee. 2811-2814 [doi]
- A novel switched-current phase locked loopPeter Wilson, Reuben Wilcock, Bashir M. Al-Hashimi. 2815-2818 [doi]
- Rank identification for an analog ranked order filterJonne Poikonen, Ari Paasio. 2819-2822 [doi]
- A unified procedure for locating the stabilizable regions of two-dimensional switched systemsGuisheng Zhai, Bo Hu, Joe Imae, Tomoaki Kobayashi. 2823-2826 [doi]
- Low-frequency bifurcation behaviors of PFC converterHaipeng Ren, Chunfeng Jin, Tamotsu Ninomiya. 2827-2830 [doi]
- Algebraic representation of error bounds for describing function using Groebner base [nonlinear circuit analysis example]Masakazu Yagi, Takashi Hisakado, Kohshi Okumura. 2831-2834 [doi]
- Investigating stability and bifurcations of a boost PFC circuit under peak current mode controlAbdelali El Aroudi, Luis Martinez-Salamero, Mohamed Orabi, Tamotsu Ninomiya. 2835-2838 [doi]
- Learning and recalling of phase pattern in coupled BVP oscillatorsTakashi Yamamoto, Katsuki Amemiya, Takashi Yamaguchi. 2839-2842 [doi]
- Realizing higher-order nonlinear Wiener adaptive systems [Wiener filter example]Tokunbo Ogunfunmi. 2843-2846 [doi]
- Speaker direction tracking using microphones located at the vertices of equilateral-triangleYusuke Hioka, Nozomu Hamada. 2847-2850 [doi]
- SoC platform based design of MPEG-2/4 AAC audio decoderChun-Nan Liu, Tsung-Han Tsai. 2851-2854 [doi]
- Linear prediction using homomorphic deconvolution in the autocorrelation domainM. Shahidur Rahman, Tetsuya Shimamura. 2855-2858 [doi]
- Multiband room effect simulator for 5.1-channel sound systemJen-Feng Chung, Der-Jenq Liu, Chin-Teng Lin. 2859-2862 [doi]
- A new speech/non-speech classification method using minimal Walsh basis functionsFarook Sattar, Moe Pwint. 2863-2866 [doi]
- Implementation aspects of a novel speech packet loss concealment methodHenrik Svensson, Viktor Öwall, Krzysztof Kuchcinski. 2867-2870 [doi]
- Emotional speech classification using Gaussian mixture modelsDimitrios Ververidis, Constantine Kotropoulos. 2871-2874 [doi]
- A robust multichannel speech enhancement method based on decorrelationSiow Yong Low, Sven Nordholm. 2875-2878 [doi]
- Directional interpolation for field-sequential stereoscopic videoHsien-Huang P. Wu, Ming-Hwa Sheu, Tung-Yu Yang. 2879-2882 [doi]
- An efficient block motion estimation algorithm on multimedia processorsShih-Yu Huang, Chun-Ming Huang. 2883-2886 [doi]
- Efficient frame-level pipelined array architecture for full-search block-matching motion estimationHe Wei-feng, Bi Yun-long, Mao Zhi-gang. 2887-2890 [doi]
- A locally adaptive subsampling algorithm for software based motion estimationSeiichiro Hiratsuka, Satoshi Goto, Takaaki Baba, Takeshi Ikenaga. 2891-2894 [doi]
- High performance error concealment algorithm by motion vector refinement for MPEG-4 videoMing-Chieh Chi, Mei-Juan Chen, Jia-Hwa Liu, Ching-Ting Hsu. 2895-2898 [doi]
- Spatial error concealment based on directional decision and intra predictionYan Zhao, Dong Tian, M. M. Hannukasela, Moncef Gabbouj. 2899-2902 [doi]
- New block-based motion estimation for sequences with illumination variation and its application to video mosaickingHoi-Kok Cheung, Wan-Chi Siu, David Dagan Feng. 2903-2906 [doi]
- An efficient dual-interpolator architecture for sub-pixel motion estimationYueh-Yi Wang, Chun-Jen Tsai. 2907-2910 [doi]
- Beyond the microscope: embedded detectors for cell biology applicationsNicolò Manaresi, Gianni Medoro, Aldo Romani, Marco Tartagni, Roberto Guerrieri. 2911-2914 [doi]
- A digital CMOS DNA chipAlexander Frey, Meinrad Schienle, Christian Paulus, Z. Jun, Franz Hofmann, Petra Schindler-Bauer, Birgit Holzapfl, Melanie Atzesberger, Gottfried Beer, Michaela Fritz, Thomas Haneder, Hans-Christian Hanke, Roland Thewes. 2915-2918 [doi]
- Nanoliter array advances: miniaturized, high-speed PCR sensing & controlIan Theodore Young, Ventzeslav P. Iordanov, Heidi R. C. Dietrich, Andre Bossche. 2919-2922 [doi]
- Retinal prosthesis device based on pulse-frequency-modulation vision chipJun Ohta, Keiichiro Kagawa, Takashi Tokuda, Masahiro Nunoshita. 2923-2926 [doi]
- Image processing and interface for retinal visual prosthesesWentai Liu, W. Fink, M. Tarbell, Mohanasankar Sivaprakasam. 2927-2930 [doi]
- Architecture design of H.264/AVC decoder with hybrid task pipelining for high definition videosTo-Wei Chen, Yu-Wen Huang, Tung-Chien Chen, Yu-Han Chen, Chuan-Yung Tsai, Liang-Gee Chen. 2931-2934 [doi]
- Development of an audio player as system-on-a-chip using an open source platformPattara Kiatisevi, Luis Leonardo Azuara-Gomez, Rainer Dorsch, Hans-Joachim Wunderlich. 2935-2938 [doi]
- Mapping system-on-chip designs from 2-D to 3-D ICsChristianto C. Liu, Jeng-Huei Chen, Rajit Manohar, Sandip Tiwari. 2939-2942 [doi]
- Algorithm/architecture co-design of the generalized sampling theorem based de-interlacer [video signal processing]Aleksandar Beric, Gerard de Haan, Jef L. van Meerbergen, Ramanathan Sethuraman. 2943-2946 [doi]
- Efficient DSP architecture for high-quality audio algorithmsSuk Hyun Yoon, Jong Ha Moon, Myung Hoon Sunwoo. 2947-2950 [doi]
- An area-efficient and protected network interface for processing-in-memory systemsSumit D. Mediratta, Craig S. Steele, Jeff Sondeen, Jeffrey T. Draper. 2951-2954 [doi]
- Optimal packet length with energy efficiency for wireless sensor networksInwhee Joe. 2955-2957 [doi]
- Multihop hello guided routing-reactive for mobile ad hoc networksK. Mase, S. Kameyama. 2958-2961 [doi]
- On performance of a charging/rewarding scheme in mobile ad-hoc networksKeisuke Nakano, Rajesh Krishna Panta, Masakazu Sengoku, Shoji Shinoda. 2962-2966 [doi]
- Effective division and merger of the autonomous clustering scheme for highly mobile large ad hoc networksNaoyoshi Murakami, Tomoyuki Ohta, Yoshiaki Kakuda. 2967-2970 [doi]
- A simple address autoconfiguration mechanism for OLSR [MANET routing protocol]Thomas H. Clausen, Emmanuel Baccelli. 2971-2974 [doi]
- A traffic aware, energy efficient MAC protocol for wireless sensor networksChangsu Suh, Young-Bae Ko. 2975-2978 [doi]
- A novel reseeding mechanism for pseudo-random testing of VLSI circuitsJiann-Chyi Rau, Ying-Fu Ho, Po-Han Wu. 2979-2982 [doi]
- An embedded processor based SOC test platformKuen-Jong Lee, Chia-Yi Chu, Yu-Ting Hong. 2983-2986 [doi]
- On the fault diagnosis in the presence of unknown fault models using pass/fail informationT. Seiyama, Hiroshi Takahashi, Yoshinobu Higami, Kazuo Yamazaki, Yuzo Takamatsu. 2987-2990 [doi]
- An analytical approach for soft error rate estimation in digital circuitsGhazanfar Asadi, Mehdi Baradaran Tahoori. 2991-2994 [doi]
- Electric field for detecting open leads in CMOS logic circuits by supply current testingMasaki Hashizume, Masahiro Ichimiya, Hiroyuki Yotsuyanagi, Takeomi Tamesada. 2995-2998 [doi]
- Optimal two-dimension common centroid layout generation for MOS transistors unit-circuitDi Long, Xianlong Hong, Sheqin Dong. 2999-3002 [doi]
- Economical passive filter synthesis using genetic programming based on tree representationHao-Sheng Hou, Shoou-Jinn Chang, Yan-Kuin Su. 3003-3006 [doi]
- Symbolic small-signal analysis (SSA) toolDevrim Yilmaz Aksin, Franco Maloberti. 3007-3010 [doi]
- Accurate high frequency noise modeling in SiGe HBTsM. A. Selim, Aly E. Salama. 3011-3014 [doi]
- Modeling of substrate noise block properties for early predictionGrzegorz Blakiewicz, Malgorzata Chrzanowska-Jeske. 3015-3018 [doi]
- Carrier frequency offset estimation for OFDM systemsAifeng Ren, Qinye Yin, Yinkuo Meng. 3019-3022 [doi]
- A novel post-nonlinear ICA-based reflectance model for 3D surface reconstructionWen-Chang Cheng, Chin-Teng Lin. 3023-3026 [doi]
- Blind separation of statistically independent signals with mixed sub-Gaussian and super-Gaussian probability distributionsMuhammad Tufail, Masahide Abe, Masayuki Kawamata. 3027-3030 [doi]
- Robust super-exponential methods for blind equalization of SISO systems with additive Gaussian noiseMitsuru Kawamoto, Kiyotaka Kohno, Yujiro Inouye, Asoke K. Nandi. 3031-3034 [doi]
- Necessary and sufficient conditions for LTI systems to preserve signal richnessBorching Su, P. P. Vaidyanathan. 3035-3038 [doi]
- A fuzzy algorithm for navigation of mobile robots in unknown environmentsTsong-Li Lee, Li-Chun Lai, Chia-Ju Wu. 3039-3042 [doi]
- FPGA implementation of a recurrent neural fuzzy network for on-line temperature controlChia-Feng Juang, Chao-Hsin Hsu, Yuan-Chang Liou. 3043-3046 [doi]
- LMI-based neurocontroller for guaranteed cost control of uncertain time-delay systemsHiroaki Mukaidani, S. Sakaguchi, Toshio Tsuji. 3047-3050 [doi]
- The use of NNs in MRAC to control nonlinear magnetic levitation systemAgus Trisanto, Jiunshian Phuah, Jianming Lu, Takashi Yahagi. 3051-3054 [doi]
- BMI-based neurocontroller for state-feedback guaranteed cost control of discrete-time uncertain systemHiroaki Mukaidani, S. Sakaguchi, Yasuhisa Ishii, Toshio Tsuji. 3055-3058 [doi]
- Architecture design of the re-configurable 2-D von Neumann cellular automata for image encryption applicationRong-Jian Chen, Yi-Te Lai, Jui-Lin Lai. 3059-3062 [doi]
- Super-stable energy based switching control scheme for DC-DC buck converter circuitsP. Gupta, A. Patra. 3063-3066 [doi]
- Sliding-mode control design of parallel-connected switching converters for modular transformerless DC-AC step-up conversionDomingo Biel, R. Ramos, Francesc Guinjoan, J. J. Negroni, Carlos Meza. 3067-3070 [doi]
- Integrated charge-control single-inductor dual-output step-up/step-down converterSuet-Chui Koon, Yat-Hei Lam, Wing-Hung Ki. 3071-3074 [doi]
- Predictive valley current controller for two inductor buck converterCh. Sobhan Babu, Mummadi Veerachary. 3075-3078 [doi]
- Boundary control of a bipolar square-wave generator using second-order switching surfaceKelvin Ka Sing Leung, Y. C. Julian Chiu, Henry Shu-Hung Chung. 3079-3082 [doi]
- A pseudo-CCM buck converter with freewheel switching controlZongqi Hu, Dongsheng Ma. 3083-3086 [doi]
- A cascade 3-1-1 multibit /spl Sigma//spl Delta/ A/D modulator with reduced sensitivity to non-idealitiesYi Yin, Heinrich Klar, Peter Wennekers. 3087-3090 [doi]
- A digital background calibration method for mash /spl Sigma/-/spl Delta/ modulators by using coefficient estimationZhiheng Cao, Shouli Yan. 3091-3094 [doi]
- A novel semi-MASH sub-stage for high-order cascade sigma-delta modulatorsChon-In Lao, Seng-Pan U., Rui Paulo Martins. 3095-3098 [doi]
- A robust 3rd order low-distortion multi-bit sigma-delta modulator with reduced number of op-amps for WCDMAKin-Sang Chio, Seng-Pan U., Rui Paulo Martins. 3099-3102 [doi]
- Analysis of clock jitter error in multibit continuous-time /spl Sigma//spl Delta/ modulators with NRZ feedback waveformR. Tortosa, José Manuel de la Rosa, Ángel Rodríguez-Vázquez, Francisco V. Fernández. 3103-3106 [doi]
- A low-power /spl Delta//spl Sigma/ modulator with low capacitor spread for multi-standard receiver applicationsAli Zahabi, Omid Shoaei, Yarallah Koolivand, Parviz Jabedar-Maralani. 3107-3110 [doi]
- A very-high-speed low-power low-voltage fully differential CMOS sample-and-hold circuit with low hold pedestalTsung-Sum Lee, Chi-Chang Lu, Shen-Hau Yu, Jian-Ting Zhan. 3111-3114 [doi]
- A current-mode ADC with adaptive quantizationKati Virtanen, Mikko Pänkäälä, Ari Paasio. 3115-3118 [doi]
- Subthreshold-leakage suppressed switched capacitor circuit based on super cut-off CMOS (SCCMOS)K. Ishida, K. Kanda, A. Tamtrakarn, H. Kawaguchi, T. Sakurai. 3119-3122 [doi]
- Switched-capacitor circuits using a single-phase schemeJoão Goes, B. Vaz, Nuno F. Paulino, H. Pinto, R. Monteiro, Adolfo Steiger-Garção. 3123-3126 [doi]
- An approach to an efficient reduction of the switching noise in switched-current circuitsChunyan Wang. 3127-3130 [doi]
- A low-voltage low-distortion MOS sampling switchChun-Yueh Yang, Chung-Chih Hung. 3131-3134 [doi]
- A performance bound for a cascade LMS predictorD.-Y. Huang, X.-R. Su. 3135-3138 [doi]
- Application of radiation mode in desired sound field generation using loudspeaker arrayYuan Wen, Woon-Seng Gan, Jun Yang. 3139-3142 [doi]
- A robust pitch estimation approach for colored noise-corrupted speechCelia Shahnaz, Wei-Ping Zhu, M. Omair Ahmad. 3143-3146 [doi]
- Noisy autoregressive system identification by the ramp cepstrum of one-sided autocorrelation functionShaikh Anowarul Fattah, Wei-Ping Zhu, M. Omair Ahmad. 3147-3150 [doi]
- Artificial bandwidth extension of telephony speech by data hidingS. Chen, H. Leung. 3151-3154 [doi]
- Memory and computationally efficient psychoacoustic model for MPEG AAC on 16-bit fixed-point processorsShih-Way Huang, Liang-Gee Chen, Tsung-Han Tsai. 3155-3158 [doi]
- Spectral correlation MUSIC algorithm for cyclostationary signals by exploitation of new array configurationWeimin Jia, Minli Yao, Jianshe Song. 3159-3162 [doi]
- A frequency-domain SIR maximizing time-domain equalizer for VDSL systemsYuan-Pei Lin, Li-Han Liang, Pei-Ju Chung, See-May Phoong. 3163-3166 [doi]
- Low-power log-MAP turbo decoding based on reduced metric memory accessDong Soo Lee, In-Cheol Park. 3167-3170 [doi]
- A design of orthogonal interleavers for multimodes turbo en-decodersYing Zhao, Yang Xiao. 3171-3174 [doi]
- Efficient per-carrier channel equalizer for filter bank based multicarrier systemsTero Ihalainen, Tobias Hidalgo Stitz, Markku Renfors. 3175-3178 [doi]
- Robustness analysis of a decision feedback generalized sidelobe cancellerYinman Lee, Wen-Rong Wu. 3179-3182 [doi]
- Stability analysis for switched systems with continuous-time and discrete-time subsystems: a Lie algebraic approachGuisheng Zhai, Derong Liu, Joe Imae, Tomoaki Kobayashi. 3183-3186 [doi]
- Stability analysis of pulse-width-modulated feedback systems with type 2 modulation: the critical caseLing Hou. 3187-3190 [doi]
- Robust stabilization of control systems using piecewise linear Lyapunov functions and evolutionary algorithmK. Tagawa, Y. Ohta. 3191-3194 [doi]
- Observer synthesis for Lipschitz discrete-time systemsG. I. Bara, A. Zemouche, M. Boutayeb. 3195-3198 [doi]
- Stick-slip oscillations in resonant power convertersMario di Bernardo, Enric Fossas. 3199-3202 [doi]
- Double-bounded homotopy for analysing nonlinear resistive circuitsH. Vazquez-Leal, Luis Hernández-Martínez, Arturo Sarmiento-Reyes. 3203-3206 [doi]
- A framework for real time gesture recognition for interactive mobile robotsRandeep Singh, Bhartendu Seth, Uday B. Desai. 3207-3210 [doi]
- A method of 3D face recognition based on principal component analysis algorithmXue Yuan, Jianming Lu, Takashi Yahagi. 3211-3214 [doi]
- Object tracking in video pictures based on image segmentation and pattern matchingTakashi Morimoto, Osamu Kiriyama, Yohmei Harada, Hidekazu Adachi, Tetsushi Koide, Hans Jürgen Mattausch. 3215-3218 [doi]
- Automatic video region-of-interest determination based on user attention modelWen-Huang Cheng, Wei-Ta Chu, Jin-Hau Kuo, Ja-Ling Wu. 3219-3222 [doi]
- Video segmentation using multiscale feature extraction and fusionTsung-Han Tsai, Chung-Yuan Lin. 3223-3226 [doi]
- A 24 GHz dual-modulus prescaler in 90nm CMOSHans-Dieter Wohlmuth, Daniel Kehrer. 3227-3230 [doi]
- A new technique for design CMOS LNA for multi-standard receiversYarallah Koolivand, Omid Shoaei, Ali Zahabi, Hossein Shamsi, Parviz Jabedar-Maralani. 3231-3234 [doi]
- An AC-coupled direct-conversion receiver for Global Positioning SystemShaomin Hsu, Won Namgoong. 3235-3238 [doi]
- Design methodology for the optimization of transformer-loaded RF circuitsAlessandro Italia, Francesco Carrara, Egidio Ragonese, Giuseppe Palmisano. 3239-3242 [doi]
- An 18 GHz low noise high linearity active mixer in SiGeYanxin Wang, Jon S. Duster, Kevin T. Kornegay, Hyun-Min Park, J. Laskar. 3243-3246 [doi]
- Variable-gain up-converter with current reuse for WCDMA wireless transmittersF. Carrara, Giovanni Palmisano. 3247-3250 [doi]
- An effective algorithm for delay constrained least cost unicast routingXin Jin, Xiande Liu, Shiyuan Xiao. 3251-3254 [doi]
- Seamless roaming in wireless networks for video streamingChih-Ming Chen, Yung-Chang Chen, Chia-Wen Lin. 3255-3258 [doi]
- Packet scheduling based on Geo::Y::/G/infinity input process modeling for streaming videoSujeong Choi, Sang Hyuk Kang, Bara Kim. 3259-3262 [doi]
- A robust H.264 video streaming scheme for portable devicesXiaosong Zhou, Wei-Ying Kung, C. C. Jay Kuo. 3263-3266 [doi]
- A novel adaptive video playout control for video streaming over mobile cellular environmentHsiao-Chiang Chuang, ChingYao Huang, Tihao Chiang. 3267-3270 [doi]
- Rate-distortion optimized video streaming with smooth quality constraintChien-Peng Ho, Wen-Chieh Chang, Kuo-Cheng Lee, Chun-Jen Tsai. 3271-3274 [doi]
- High-order linear transformation MOSFET-C filters using operational transresistance amplifiersYuh-Shyan Hwang, Jiann-Jong Chen, Wen-Ta Lee. 3275-3278 [doi]
- Active RC filter with reduced capacitance by current division techniqueNang-Ching Yeung, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-fat Chan. 3279-3282 [doi]
- Time-domain symmetry as criterion for band-pass equalizer designM. Vucic, G. Molnar, H. Babic. 3283-3286 [doi]
- Analog complex wavelet filtersSandro A. P. Haddad, J. M. H. Karel, Ralf L. M. Peeters, Ronald L. Westra, Wouter A. Serdijn. 3287-3290 [doi]
- Output noise of generalized high-order allpole OTA-C filtersKahtan A. Mezher, P. Bowron. 3291-3294 [doi]
- 10-th order programmable low-pass CMOS integrated pulse-shaping filterMarco Balsi, N. Guerrini, Piero Marietti, Giuseppe Scotti, G. Stochino, Alessandro Trifiletti. 3295-3298 [doi]
- An insensitive current mode universal biquad: multi-input multi-outputN. Pandey, S. K. Paul, A. Bhattacharyya. 3299-3302 [doi]
- Low-sensitivity current-mode active-RC filters using impedance taperingDrazen Jurisic, Neven Mijat, George S. Moschytz. 3303-3306 [doi]
- VLSI implementation of type-2 fuzzy inference processorShih-Hsu Huang, Yi-Rung Chen. 3307-3310 [doi]
- A power-driven multiplication instruction-set design method for ASIPsWu-An Kuo, TingTing Hwang, Allen C.-H. Wu. 3311-3314 [doi]
- A CORDIC processor with efficient table-lookup schemes for rotations and on-line scale factor compensationsJen-Chuan Chih, Kun-Lung Chen, Sau-Gee Chen. 3315-3318 [doi]
- Elimination of sign precomputation in flat CORDICS. Suchitra, S. Sukthankar, T. Srikanthan, C. T. Clarke. 3319-3322 [doi]
- Novel instructions and their hardware architecture for video signal processingSung Dae Kim, J. H. Lee, J. M. Yang, Myung Hoon Sunwoo, Seung Keun Oh. 3323-3326 [doi]
- A novel reconfigurable architecture of low-power unsigned multiplier for digital signal processingShaolei Quan, Qiang Qiang, Chin-Long Wey. 3327-3330 [doi]
- Design trade-offs in floating-point unit implementation for embedded and processing-in-memory systemsTaek-Jun Kwon, Jeff Sondeen, Jeffrey T. Draper. 3331-3334 [doi]
- Implementation of a cycle by cycle variable speed processorH. G. Epassa, François R. Boyer, Yvon Savaria. 3335-3338 [doi]
- A hardware-based longest prefix matching scheme for TCAMsSoraya Kasnavi, Vincent C. Gaudet, Paul Berube, José N. Amaral. 3339-3342 [doi]
- A novel 2 GHz multi-layer AMBA high-speed bus interconnect matrix for SoC platformsA. Landry, Mohamed Nekili, Yvon Savaria. 3343-3346 [doi]
- A modified spiral search motion estimation algorithm and its embedded system implementationNikolas Kroupis, Minas Dasygenis, K. Markou, Dimitrios Soudris, Adonios Thanailakis. 3347-3350 [doi]
- HIBI-based multiprocessor SoC on FPGAErno Salminen, Ari Kulmala, Timo D. Hämäläinen. 3351-3354 [doi]
- Dual use of power lines for data communications in a system-on-chip environmentWoo Cheol Chung, Dong Sam Ha, Hyung-Jin Lee. 3355-3358 [doi]
- A threshold-based algorithm and VLSI architecture of a K-best lattice decoder for MIMO systemsJin Jie, Chi-Ying Tsui, Wai Ho Mow. 3359-3362 [doi]
- A 64-MHz/spl sim/1920-MHz programmable spread-spectrum clock generatorHong-Yi Huang, Sheng-Fen Ho, Li-Wei Huang. 3363-3366 [doi]
- Reduction in spectral peaks of DC-DC converters using chaos-modulated clockR. Mukherjee, S. Nandi, S. Banerjee. 3367-3370 [doi]
- Nonlinear echo cancellation using an expanded correlation LMS algorithmKi-Yong Ahn, D. H. Kim, S. W. Nam. 3371-3374 [doi]
- A ns-2 simulator utilizing chaotic maps for network-on-chip traffic analysisA. Hegedus, Gian Mario Maggio, Ljupco Kocarev. 3375-3378 [doi]
- Dynamics in a controlled flow model of a switching systemHiroto Tanaka, Toshimitsu Ushio. 3379-3382 [doi]
- A performance estimation method for chaotic spread spectrum clock processesJörg Krupar, Wolfgang M. Schwarz. 3383-3386 [doi]
- Chaotification of nonlinear systems described by the fuzzy hyperbolic modelZhiliang Wang, Huaguang Zhang, Derong Liu. 3387-3390 [doi]
- Experimental verification of 3-D hysteresis multi-scroll chaotic attractorsJinhu Lu, Simin Yu, Henry Leung, Guanrong Chen. 3391-3394 [doi]
- Cascading failures in scale-free coupled map latticesJian Xu, Xiao Fan Wang. 3395-3398 [doi]
- Bifurcation and transitional dynamics in three-coupled oscillators with hard type nonlinearityK. Shimizu, T. Endo, N. Matsumoto. 3399-3402 [doi]
- Bifurcation analysis of a circuit-related piecewise-affine mapFederico Bizzarri, Laura Carezzano, Marco Storace, Laura Gardini. 3403-3406 [doi]
- On rigorous study of Poincare maps defined by piecewise linear systems [electronic circuit example]Zbigniew Galias. 3407-3410 [doi]
- A piecewise constant switched chaotic circuit with rect-rippling return mapsYusuke Matsuoka, Toshimichi Saito, Hiroyuki Torikai. 3411-3414 [doi]
- Observer-based approach for synchronization of a time-delayed, Chua s circuitE. Cherrier, M. Boutayeb, José Ragot. 3415-3418 [doi]
- A fast bitplane combination algorithm for bitplane coded scalable image/videoChuan-Yu Cho, Hong-Shen Chen, Jenq-Neng Hwang, Jia-Shung Wang. 3419-3422 [doi]
- Optimized decoding scheme for erroneous MPEG-4 FGS bitstreamJanne Vehkaperä, Johannes Peltola. 3423-3426 [doi]
- A novel algorithm of spatial scalability for scrambled videoYuanZhi Zou, Wen Gao. 3427-3430 [doi]
- A low complexity architecture for binary image erosion and dilation using structuring element decompositionHugo Hedberg, Fredrik Kristensen, Peter Nilsson, Viktor Öwall. 3431-3434 [doi]
- Am object-based approach to plenoptic videosZhi-Feng Gan, Shing-Chow Chan, King To Ng, Heung-Yeung Shum. 3435-3438 [doi]
- Parameters estimation applied to automatic video processing algorithms validationS. Catudal, Marc-André Cantin, Yvon Savaria. 3439-3442 [doi]
- Fast pixel-based video scene change detectionXiaoquan Yi, Nam Ling. 3443-3446 [doi]
- Robust group-of-picture architecture for video transmission over error-prone channelsTao Fang, Lap-Pui Chau. 3447-3450 [doi]
- A novel interleaving algorithm for robust video transmissionTao Fang, Lap-Pui Chau. 3451-3454 [doi]
- A fast global motion estimation for moving objects segmentation using moment-preserving techniqueShyi-Chyi Cheng, Wei-Kan Huang, Tian-Luu Wu. 3455-3458 [doi]
- Shot change detection on H.264/AVC compressed videoWei Zeng, Wen Gao. 3459-3462 [doi]
- Algorithmic optimization of H.264/AVC encoderJ. Lahti, J. K. Juntunen, Olli Lehtoranta, Timo D. Hämäläinen. 3463-3466 [doi]
- Low complexity RDO mode decision based on a fast coding-bits estimation model for H.264/AVCQiang Wang, Debin Zhao, Wen Gao, Siwei Ma. 3467-3470 [doi]
- Viewpoint switching in multiview video streamingXun Guo, Yan Lu, Wen Gao, Qingming Huang. 3471-3474 [doi]
- A flexible macroblock ordering with 3D MBAMAP for H.264/AVCTokunbo Ogunfunmi, W. C. Huang. 3475-3478 [doi]
- CMOS sensor array for electrical imaging of neuronal activityBjörn Eversmann, Martin Jenkner, Franz Hofmann, Christian Paulus, Birgit Holzapfl, Roland Thewes, Doris Schmitt-Landsiedel, A. Lambacher, A. Kaul, R. Zeitler, M. Merz, A. Junze, P. Fromherz. 3479-3482 [doi]
- Integrated optical computing: system-on-chip for surface plasmon resonance imagingMatthew M. W. Johnston, Denise M. Wilson, K. S. Boosh, J. Cramer. 3483-3486 [doi]
- Pulse modulation CMOS image sensor for bio-fluorescence imaging applicationsJun Ohta, Takahashi Tokuda, Keiichiro Kagawa, Masahiro Nunoshita, S. Shiosaka. 3487-3490 [doi]
- CMOS contact imager for monitoring cultured cellsHonghao Ji, Pamela Abshire, M. Urdaneta, Elisabeth Smela. 3491-3494 [doi]
- A CMOS capacitance sensor for cell adhesion characterizationS. B. Prakash, Pamela Abshire, M. Urdaneta, Elisabeth Smela. 3495-3498 [doi]
- Sub-operation parallelism optimization in SIMD processor synthesis and its experimental evaluationsNozomu Togawa, Hideki Kawazu, Jumpei Uchida, Yuichiro Miyaoka, Masao Yanagisawa, Tatsuo Ohtsuki. 3499-3502 [doi]
- Hierarchical instruction encoding for VLIW digital signal processorsChia-Hsien Liu, Tay-Jyi Lin, Chie-Min Chao, Pi-Chen Hsiao, Li-Chun Lin, Shin-Kai Chen, Chao-Wei Huang, Chih-Wei Liu, Chein-Wei Jen. 3503-3506 [doi]
- Design of superscalar processor with multi-bank register fileT. Saito, M. Maeda, Tetsuo Hironaka, Kazuya Tanigawa, Tetsuya Sueyoshi, K. Aoyama, Tetsushi Koide, Hans Jürgen Mattausch. 3507-3510 [doi]
- Dynamic coarse grain dataflow reconfiguration technique for real-time systems designXiaoyao Liang, Akshay Athalye, Sangjin Hong. 3511-3514 [doi]
- Application specific instruction-set processor generation for video processing based on loop optimizationMaria Mbaye, Normand Bélanger, Yvon Savaria, Samuel Pierre. 3515-3518 [doi]
- An automated methodology for memory-conscious mapping of DSP applications on coarse-grain reconfigurable arraysMichalis D. Galanis, Gregory Dimitroulakos, Constantinos E. Goutis. 3519-3522 [doi]
- Fast 802.11 link adaptation for real-time video streaming by cross-layer signalingIvaylo Haratcherev, Jacco R. Taal, Koen Langendoen, Reginald L. Lagendijk, Henk J. Sips. 3523-3526 [doi]
- A study of encoding and decoding techniques for syndrome-based video codingMin Wu, Anthony Vetro, Jonathan S. Yedidia, Huifang Sun, Chang Wen Chen. 3527-3530 [doi]
- Congestion-optimized scheduling of video over wireless ad hoc networksEric Setton, Xiaoqing Zhu, Bernd Girod. 3531-3534 [doi]
- A fast greedy algorithm for routing concurrent video flowsShiwen Mao, Sastry Kompella, Yiwei Thomas Hou, Scott F. Midkiff. 3535-3538 [doi]
- Image transmission over IEEE 802.15.4 and ZigBee networksG. Pekhteryev, Zafer Sahinoglu, Philip V. Orlik, G. Bhatti. 3539-3542 [doi]
- Integrated multi-objective cross-layer optimization for wireless multimedia transmissionMihaela van der Schaar, M. Tekalp. 3543-3546 [doi]
- A countermeasure against differential power analysis based on random delay insertionMarco Bucci, Raimondo Luzzi, Michele Guglielmo, Alessandro Trifiletti. 3547-3550 [doi]
- Litho-driven layouts for reducing performance variabilityManish Garg, A. Kumar, J. van Wingerden, Laurent Le Cam. 3551-3554 [doi]
- Automatic monitor generation from regular expression based specifications for module interface verificationY. Kakiuchi, A. Kitajima, Kiyoharu Hamaguchi, Toshinobu Kashiwabara. 3555-3558 [doi]
- Power and delay analysis of 4: 2 compressor cellsG. M. Howard, Pedram Mokrian, Majid Ahmadi, William C. Miller. 3559-3562 [doi]
- Timing error correction techniques for voltage-scalable on-chip memoriesEric Karl, Dennis Sylvester, David Blaauw. 3563-3566 [doi]
- Incremental timing optimization for automatic layout generationC. Santos, D. Ferrao, R. Reis, J. L. Guntzel. 3567-3570 [doi]
- An FPGA based implementation of G.729N. Mobini, B. Vahdat, M. H. Radfar. 3571-3574 [doi]
- Fast estimation of area-delay trade-offs in circuit sizingShrirang K. Karandikar, Sachin S. Sapatnekar. 3575-3578 [doi]
- Performance analysis by topology indexed lookup tablesP. Agarwal, A. Vidyarthi, Patrick H. Madden. 3579-3582 [doi]
- Optimized design of source coupled logic gates in GaAs HEMT technologyG. Palumbo, P. Tommasino, Alessandro Trifiletti. 3583-3586 [doi]
- Initial solution for the optimum design delay equalizersM. F. Quelhas, Antonio Petraglia. 3587-3590 [doi]
- A novel approach for high-level power modeling of sequential circuits using recurrent neural networksWen-Tsan Hsieh, Chih-Chieh Shiue, Chien-Nan Jimmy Liu. 3591-3594 [doi]
- F-SEONS: a second-order frequency-domain algorithm for noisy convolutive source separationInseon Jang, Kyeongok Kang, Sangki Kim, Seungjin Choi. 3595-3598 [doi]
- A class of novel blind source extraction algorithms based on a linear predictorWei Liu, Danilo P. Mandic, Andrzej Cichocki. 3599-3602 [doi]
- New Riemannian metrics for improvement of convergence speed in ICA based learning algorithmsStefano Squartini, Francesco Piazza, A. Shawker. 3603-3606 [doi]
- A class of space-time code for blind detectionFangjiong Chen, Man-Wai Kwan, Chi-Wah Kok, Sam Kwong. 3607-3610 [doi]
- Blind IQ error compensation in a direct conversion receiver for DVB-TR. B. Palipana, K.-S. Chung. 3611-3614 [doi]
- Recursive semi-blind decoding of a space-time block code over frequency-selective channelMing Luo, Qinye Yin, Yiwen Zhang, Jianguo Zhang. 3615-3618 [doi]
- Identification of road signs using a new ridgelet networkShuyuan Yang, Min Wang. 3619-3622 [doi]
- Hardware friendly vector quantization algorithmS. Matsubara, H. Hikawa. 3623-3626 [doi]
- A compact distance cell for analog classifiersS. Aras, Devrim Yilmaz Aksin. 3627-3630 [doi]
- A learning algorithm for enhancing the generalization ability of support vector machinesJun Guo, Norikazu Takahashi, Tetsuo Nishi. 3631-3634 [doi]
- Two-level decoupled Hamming network for associative memory under noisy environmentLiang Chen, Naoyuki Tokuda, Akira Nagai. 3635-3638 [doi]
- Pulse width modulator using a phase-locked loop variable phase shifterYou Zheng, Carlos E. Saavedra. 3639-3642 [doi]
- Three-phase power factor corrector based on capacitor-clamped topologyBor-Ren Lin, Chun-Hao Huang, Zheng-Zhang Yang. 3643-3646 [doi]
- Three-phase active power filter under unbalanced conditionBor-Ren Lin, Chun-Hao Huang, Zheng-Zhang Yang. 3647-3650 [doi]
- A 36-V H-bridge driver interface in a standard 0.35-/spl mu/m CMOS processR. Krenzke, Cang Ji, D. Killat. 3651-3654 [doi]
- Design of class E backlight module incorporating piezoelectric transformerChang-Hua Lin, Ying-Chi Chen. 3655-3659 [doi]
- An integrated electronic ballast for small wattage high intensity discharge lampsJenn-Jong Shieh, Kan-Sheng Kuan. 3660-3663 [doi]
- A 2-path bandpass sigma-delta modulator utilizing a 3-path structureEric C. Moule, Zeljko Ignjatovic. 3664-3667 [doi]
- Digitally tuned bandpass sigma delta modulator for wireless communicationsRhami Hezar, Oguz Altun. 3668-3671 [doi]
- Design of continuous-time /spl Sigma//spl Delta/ modulators with sine-shaped feedback DACsA. Latiri, Hassan Aboushady, Nicolas Beilleau. 3672-3675 [doi]
- A tunable bandpass /spl Delta//spl Sigma/ modulator using double samplingChien-Hung Kuo, Chang-Hung Chen, Huang-Shih Lin, Shen-Iuan Liu. 3676-3679 [doi]
- DAC compensation for continuous-time delta-sigma modulatorsKei-Tee Tiew, Yuan Chen. 3680-3683 [doi]
- A 0.8V Delta-Sigma modulator using DTMOS techniqueMohammad Maymandi-Nejad, Manoj Sachdev. 3684-3687 [doi]
- Performance analysis of high-speed MOS transistors with different layout stylesP. Lopez, M. Oberst, H. Neubauer, J. Hauer, D. Cabello. 3688-3691 [doi]
- An optimization technique for RF buffers with active inductorsTai-Cheng Lee, Yen-Chuan Huang. 3692-3695 [doi]
- Characterization of laser-induced photoexcitation effect on a surrounding CMOS ring oscillatorG. Wild, Yvon Savaria, Michel Meunier. 3696-3699 [doi]
- Calculation of intermodulation distortion in CMOS transconductance stageLu Liu, Zhihua Wang, Guolin Li. 3700-3703 [doi]
- A novel 1.5V DC offset cancellation CMOS down conversion mixerAnh-Tuan Phan, Chang-Wan Kim, Moon-Suk Jung, Yun-A Shim, Jae-Yung Kim, Sang-Gug Lee. 3704-3707 [doi]
- Low voltage analog synthesizer of orthogonal signals: a current-mode approachV. J. S. Oliveira, N. Oki. 3708-3712 [doi]
- Improved design of fractional order differentiator using fractional sample delayChien-Cheng Tseng. 3713-3716 [doi]
- Digital differentiator design using fractional sample delay filterChien-Cheng Tseng. 3717-3720 [doi]
- Digital differentiators for narrow band applications in the lower to midband rangeI. R. Khan, M. Okuda, R. Ohba. 3721-3724 [doi]
- Variable multi-output passive digital filtersH. K. Kwan. 3725-3728 [doi]
- High tuning accuracy design of variable IIR filters as a cascade of identical sub-filtersG. Stoyanov, M. Kawamata, I. Uzunov. 3729-3732 [doi]
- A new cascaded modified CIC-cosine decimation filterG. J. Dolecek, J. D. Carmona. 3733-3736 [doi]
- Correlation-based adaptive filters for channel identificationNing Yao, Man-Wai Kwan, Chi-Wah Kok. 3737-3740 [doi]
- Generalized sidelobe cancellers with leakage constraintsYongzhi Liu, Qiyue Zou, Zhiping Lin. 3741-3744 [doi]
- Generalized partially adaptive concentric ring arrayYunhong Li, K. C. Ho, Chiman Kwan, Yee Hong Leung. 3745-3748 [doi]
- A subspace constrained constant modulus algorithm for blind arrayY. X. Chen, Wei-Ping Zhu, M. N. S. Swamy. 3749-3752 [doi]
- A high-throughput DLMS adaptive algorithmE. Mahfuz, Chunyan Wang, M. Omair Ahmad. 3753-3756 [doi]
- Canards in a slow-fast continuous piecewise linear vector fieldH. Nakano, H. Honda, H. Okazaki. 3757-3760 [doi]
- Path following circuits - SPICE-oriented numerical methods where formulas are described by circuits K. Yamamura, W. Kuroki, Y. Inoue. 3761-3764 [doi]
- Analysis of a hysteretic oscillator through a mixed time-frequency domain approachMichele Bonnin, Marco Gilli, Pier Paolo Civalleri. 3765-3768 [doi]
- On the identifiability of bilinear systemsRaimund J. Ober, Zhiping Lin, Qiyue Zou. 3769-3772 [doi]
- Effects of variations of load distribution on network performanceDavid K. Arrowsmith, Mario di Bernardo, Francesco Sorrentino. 3773-3776 [doi]
- On passivity enforcement for macromodels of S-parameter based tabulated subnetworksDharmendra Saraswat, Ramachandra Achar, Michel S. Nakhla. 3777-3780 [doi]
- Compressed-domain fall incident detection for intelligent home surveillanceChia-Wen Lin, Zhi-Hong Ling, Yuan-Cheng Chang, Chung J. Kuo. 3781-3784 [doi]
- Non-linear learning factor control for statistical adaptive background subtraction algorithmT. Thongkamwitoon, Supavadee Aramvith, Thanarat H. Chalidabhongse. 3785-3788 [doi]
- An automated volumetric segmentation system combining multiscale and statistical reasoningDavid W. G. Montgomery, Abbes Amira, F. Murtagh. 3789-3792 [doi]
- Perceived visual quality metric based on error spread and contrastSusu Yao, Weisi Lin, Susanto Rahardja, Xiao Lin, Ee Ping Ong, Zhongkang Lu, X. K. Yang. 3793-3796 [doi]
- A unified probabilistic approach to face detection and trackingJi Tao, Yap-Peng Tan. 3797-3800 [doi]
- A novel automatic white balance method for digital still camerasChing-Chih Weng, H. Chen, Chiou-Shann Fuh. 3801-3804 [doi]
- Computationally efficient DOA estimation in a multipath environment using covariance differencing and iterative spatial smoothingE. M. Al-Ardi, R. M. Shubair, M. E. Al-Mualla. 3805-3808 [doi]
- A test strategy for time-to-digital converters using dynamic element matching and ditheringWenbo Liu, Hanqing Xing, Le Jin, Randall L. Geiger, Degang Chen. 3809-3812 [doi]
- A complete receiver solution for a chaotic direct-sequence spread spectrum communication systemM. B. Luca, S. Azou, G. Burel, A. Serbanescu. 3813-3816 [doi]
- A new method of an IF I/Q demodulator for narrowband signalsR. Xue, Q. Xu, K. F. Chang, K. W. Tam. 3817-3820 [doi]
- Experimental gigabit multidrop serial backplane for high speed digital systemsFélix Tobajas, Roberto Esper-Chaín, S. Tubio, R. Arteaga, V. de Armas, Roberto Sarmiento. 3821-3824 [doi]
- ASIC design of fast IP-lookup for next generation IP routerYuan-Sun Chu, Po-Feng Lin, Jia-Huang Lin, Hui-Kai Su, Ming-Jen Chen. 3825-3828 [doi]
- Baseball event detection using game-specific feature sets and rulesChih-Hao Liang, Wei-Ta Chu, Jin-Hau Kuo, Ja-Ling Wu, Wen-Huang Cheng. 3829-3832 [doi]
- Wavelet transform to hybrid support vector machine and hidden Markov model for speech recognitionYu Shao, Chip-Hong Chang. 3833-3836 [doi]
- Effective shot boundary classification using video spatial-temporal informationHong Lu, Bei Wang, Xiangyang Xue, Yap-Peng Tan. 3837-3840 [doi]
- An efficient method for face recognition under varying illuminationXudong Xie, Kin-Man Lam. 3841-3844 [doi]
- Event detection using multimodal feature analysisZhenyan Li, Yap-Peng Tan. 3845-3848 [doi]
- Video shot segmentation using fusion of SVD and mutual information featuresZuzana Cernekova, Constantine Kotropoulos, Nikolaos Nikolaidis, Ioannis Pitas. 3849-3852 [doi]
- A CMOS bandgap voltage reference with absolute value and temperature drift trimsD. Spady, V. Ivanov. 3853-3856 [doi]
- A very low drop voltage regulator using an NMOS output transistorG. Nebel, T. Baglin, I. S. Sebastian, Holger Sedlak, U. Weder. 3857-3860 [doi]
- New curvature-compensation technique for CMOS bandgap reference with sub-1-V operationMing-Dou Ker, Jung-Sheng Chen, Ching-Yun Chu. 3861-3864 [doi]
- A single circuit solution for voltage sensorsS. S. Prasad, Pradip Mandal. 3865-3868 [doi]
- Design considerations in bandgap references over process variationsS. Sengupta, L. Carastro, P. E. Allen. 3869-3872 [doi]
- A low-power digital PWM DC/DC converter based on passive sigma-delta modulatorSiew Kuok Hoon, Franco Maloberti, Jun Chen. 3873-3876 [doi]
- A low voltage low 1/f noise CMOS bandgap referenceYueming Jiang, E. K. F. Lee. 3877-3880 [doi]
- Observability analysis by measurement Jacobian matrix for state estimationBei Gou. 3881-3884 [doi]
- Recognition of power quality events using wavelet-based dynamic structural neural networksYing-Tung Hsiao, Cheng-Long Chuang, Joe-Air Jiang. 3885-3888 [doi]
- Real-time phasor measurement for low frequency oscillation in power systemYutian Liu, Chi Xiao, Yuanyuan Sun. 3889-3893 [doi]
- Evaluating performance of hybrid-type power system simulator based on transient stability analysis: a dynamical system approachYoshihiko Susuki, Y. Takama, Tsuyoshi Funaki, Takashi Hikihara. 3894-3897 [doi]
- Fault location in automated distribution networkV. N. Gohokar, V. V. Gohokar. 3898-3901 [doi]
- Signal waveform monitoring for power systemsBei Gou, Qing Zhao, Hui Zheng. 3902-3905 [doi]
- On-line learning applied to power system transient stability predictionXiaodong Chu, Yutian Liu. 3906-3909 [doi]
- A study on an ASIC design technique for digital protective relaysJong-wan Seo, Myong-chul Shin. 3910-3913 [doi]
- DBNS addition using cellular neural networksY. Ibrahim, William C. Miller, Graham A. Jullien, Vassil S. Dimitrov. 3914-3917 [doi]
- Analog networks for mixed domain spatiotemporal filteringHenry M. D. Ip, Emmanuel M. Drakakis, Anil A. Bharath. 3918-3921 [doi]
- A one-quadrant discrete-time cellular neural network architecture for pixel-level snakes: B/W processingVictor M. Brea, Mika Laiho, David López Vilariño, Ari Paasio, Diego Cabello. 3922-3925 [doi]
- Selective similarity function for VLSI analog signal processingJordi Madrenas, Daniel Fernández, Jordi Cosp, Eduard Alarcón, Eva Vidal, Gerard Villar. 3926-3929 [doi]
- A Gray-coded digital-to-analog converter for a mixed-mode processor arrayLaura Vesalainen, Jonne Poikonen, Ari Paasio. 3930-3933 [doi]
- Fixed-current method for programming large floating-gate arraysShantanu Chakrabartty, Gert Cauwenberghs. 3934-3937 [doi]
- Template design for binary-programmable cellular nonlinear networksMika Laiho, Ari Paasio, Jacek Flak, Kari Halonen. 3938-3941 [doi]
- A complex texture classification algorithm based on Gabor-type filtering cellular neural networks and self-organized fuzzy inference neural networksChin-Teng Lin, Chao-Hui Huang. 3942-3945 [doi]
- A beamforming method in UWB pulse array based on neural networkMin Wang, Shuyuan Yang, Shunjun Wu. 3946-3949 [doi]
- The modem for ultra-wideband communication employing surface-acoustic-wave devicesH. Nagasaka, T. Sato, T. Sugiura, E. Otobe, M. Hasegawa, K. Tanji, N. Otani, T. Shimamori. 3950-3953 [doi]
- Using CLNS for FFTs in OFDM demodulation of UWB receiversPanagiotis D. Vouzis, Mark G. Arnold, Vassilis Paliouras. 3954-3957 [doi]
- Dual drain-line distributed cell design for multi-Gbit/s transversal filter implementationsJ. Aguilar-Torrentera, Izzat Darwazeh. 3958-3961 [doi]
- A systematic approach to CMOS low noise amplifier design for ultrawideband applicationsHyung-Jin Lee, Dong Sam Ha, Sangsung Choi. 3962-3965 [doi]
- Simple polar-loop transmitter for dual-mode BluetoothT. Oshima, M. Kokubo. 3966-3969 [doi]
- Functional modeling techniques for a wireless LAN OFDM transceiverA. Petrov, Tudor Murgan, Peter Zipf, Manfred Glesner. 3970-3973 [doi]
- A multi-band multi-standard RF front-end IEEE 802.16a for IEEE 802.16a and IEEE 802.11 a/b/g applicationsChao-Shiun Wang, Wei-Chang Li, Chorng-Kuang Wang. 3974-3977 [doi]
- Transaction level modeling of IEEE 802.11 systemJin Lee, Sin-Chong Park. 3978-3981 [doi]
- A concurrent multi-band LNA for multi-standard radiosXinzhong Duo, Li-Rong Zheng, Mohammed Ismail, Hannu Tenhunen. 3982-3985 [doi]
- An FMDLL based dual-loop frequency synthesizer for 5 GHz WLAN applicationsTing Wu, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram. 3986-3989 [doi]
- Multiple description watermarking for lossy networkShu-Chuan Chu, Yi-Chih Hsin, Hsiang-Cheh Huang, Kuang-Chih Huang, Jeng-Shyang Pan. 3990-3993 [doi]
- Directional watermarks in imagesHer-Chang Chao, Cheng-Lun Tai, Yuan-Peir Chen. 3994-3997 [doi]
- An error resilient image camouflaging scheme for secret image transmissionLi-Wei Kang, Jin-Jang Leou, Shyi-Shiun Kuo, Wei-Chih Shen. 3998-4001 [doi]
- Semi-fragile watermarking for text document images authenticationHuijuan Yang, Alex C. Kot, Jun Liu. 4002-4005 [doi]
- Multiple description coding using multiple reference frame for robust video transmissionJinghong Zheng, Lap-Pui Chau. 4006-4009 [doi]
- Digital watermarking for color video using a nonlinear filter in detection processS. Arai, K. Arakawa. 4010-4013 [doi]
- Image authentication using content based watermarkHongmei Liu, Junlong Lin, Jiwu Huang. 4014-4017 [doi]
- Hiding watermark in watermark [image watermarking]Feng-Hsing Wang, Lakhmi C. Jain, Jeng-Shyang Pan. 4018-4021 [doi]
- A novel unequal error protection approach for error resilient video transmissionTao Fang, Lap-Pui Chau. 4022-4025 [doi]
- Optimal joint rate and power allocation in a multicell multimedia CDMA networkXing Zhang, Wenbo Wang, Yuan an Liu. 4026-4029 [doi]
- Audio signal segmentation and classification for scene-cut detectionNaoki Nitanda, Miki Haseyama, Hideo Kitajima. 4030-4033 [doi]
- Drift-free multiple description video coding with redundancy rate-distortion optimizationYilong Liu, Soontorn Oraintara. 4034-4037 [doi]
- Optimized multiple description image coding using lattice vector quantizationHuihui Bai, Yao Zhao, Ce Zhu. 4038-4041 [doi]
- Low redundancy layered multiple description scalable coding using the subband extension of H.264/AVCHassan Mansour, Panos Nasiopoulos, Victor C. M. Leung. 4042-4045 [doi]
- Video error concealment by integrating dynamic programming and adaptive Kalman filtering techniquesWen-Nung Lie, Zhi-Wei Gao. 4046-4049 [doi]
- Enhancing vocoder performance for music signalsVisar Berisha, Andreas Spanias. 4050-4053 [doi]
- An 8b 240 MS/s 1.36 mm/sup 2/ 104 mW 0.18 um CMOS ADC for DVDs with dual-mode inputsSe-Won Kim, Young-Jae Cho, Kyung-Hoon Lee, Seung-Hoon Lee, Jae-Yup Lee, Hyun-Chul Noh, Hee-Sub Lee. 4054-4057 [doi]
- Convergence analysis of a background interstage gain calibration technique for pipelined ADCsDong Wang, J. P. Keane, Paul J. Hurst, Bernard C. Levy, S. H. Lewis. 4058-4061 [doi]
- Smart AD and DA convertersArthur H. M. van Roermund, Hans Hegt, Pieter Harpe, Georgi I. Radulov, Athon Zanikopoulos, Konstantinos Doris, Patrick J. Quinn. 4062-4065 [doi]
- A low power and low voltage continuous time /spl Sigma//spl Delta/ modulatorLourans Samid, Yiannos Manoli. 4066-4069 [doi]
- Synthesis of sigma delta modulators employing continuous time delaysLuis Hernandez, Enrique Prefasi, S. Paton, Pieter Rombouts. 4070-4073 [doi]
- A low-voltage 3 mW 10-bit 4MS/s pipeline ADC in digital CMOS for sensor interfacingB. Vaz, João Goes, R. Piloto, J. Neto, R. Monteiro, Nuno F. Paulino. 4074-4077 [doi]
- Low-voltage micropower multipliers with reduced spurious switchingKwen-Siong Chong, Bah-Hwee Gwee, Joseph Sylvester Chang. 4078-4081 [doi]
- An area efficient 64-bit square root carry-select adder for low power applicationsYajuan He, Chip-Hong Chang, Jiangmin Gu. 4082-4085 [doi]
- A low-power and high-throughput implementation of the SHA-1 hash functionHaralambos Michail, A. P. Kakarountas, Odysseas G. Koufopavlou, Constantinos E. Goutis. 4086-4089 [doi]
- Hyperblock formation: a power/energy perspective for high performance VLIW architecturesGiuseppe Ascia, Vincenzo Catania, Maurizio Palesi, Davide Patti. 4090-4093 [doi]
- Ultra low voltage design considerations of SOI SRAM memory cellsO. Thomas, Amara Amara. 4094-4097 [doi]
- Battery voltage prediction for portable systemsDaler N. Rakhmatov. 4098-4101 [doi]
- CPG-MTA implementation for locomotion controlPaolo Arena, Luigi Fortuna, Mattia Frasca, Luca Patané, Guido Vagliasindi. 4102-4105 [doi]
- A spiking silicon central pattern generator with floating gate synapses [robot control applications]Francesco Tenore, R. Jacob Vogelstein, Ralph Etienne-Cummings, Ralph Cauwenberghs, M. Anthony Lewis, P. Hasler. 4106-4109 [doi]
- A bio-inspired CNN layer with image processing capabilitiesKoray Karahaliloglu, Sina Balkir, Nathan Schemm. 4110-4113 [doi]
- Mismatch-tolerant CMOS oscillator and excitatory synapse for bioinspired image segmentationDaniel Fernández, Gerard Villar, Eva Vidal, Eduard Alarcón, Jordi Cosp, Jordi Madrenas. 4114-4117 [doi]
- Effect of mismatch on a ranked-order extractor array [image processing applications]Olli Lahdenoja, Jonne Poikonen, Ari Paasio. 4118-4121 [doi]
- Parallel processor algorithm for variable block-size computation at low bitrates [video coding applications]Lauri Koskinen, Kari Halonen, Ari Paasio. 4122-4125 [doi]
- A Fourier series-based RLC interconnect model for periodic signalsGuoqing Chen, Eby G. Friedman. 4126-4129 [doi]
- Performance model for inter-chip communication considering inductive cross-talk and costBrock J. LaMeres, Sunil P. Khatri. 4130-4133 [doi]
- RLC coupling-aware simulation for on-chip buses and their encoding for delay reductionShang-Wei Tu, Jing-Yang Jou, Yao-Wen Chang. 4134-4137 [doi]
- High speed current-mode signaling circuits for on-chip interconnectsA. Katoch, Harry J. M. Veendrick, E. Seevinck. 4138-4141 [doi]
- Capacitive coupling of data and power for 3D silicon-on-insulator VLSIEugenio Culurciello, Andreas G. Andreou. 4142-4145 [doi]
- Accurate decoupling of capacitively coupled busesMaged Ghoneima, Yehea I. Ismail. 4146-4149 [doi]
- Power-aware slack distribution for hierarchical VLSI designHyung-Ock Kim, Youngsoo Shin. 4150-4153 [doi]
- A physically-derived large-signal nonquasi-static MOSFET model for computer aided device and circuit simulation PART-I MOSFETs and CMOS invertersMichael Walter Payton, Fat Duen Ho. 4154-4158 [doi]
- Fast parameters optimization of an iterative decoder using a configurable hardware acceleratorG. Provost, Marc-André Cantin, Mohamad Sawan, Christian Cardinal, Yvon Savaria, David Haccoun. 4159-4162 [doi]
- Impact of multicycled scheduling on power-area tradeoffs in behavioural synthesisM. A. Ochoa-Montiel, Bashir M. Al-Hashimi, P. Kollig. 4163-4166 [doi]
- CheckSyC: an efficient property checker for RTL SystemC designsDaniel Große, Rolf Drechsler. 4167-4170 [doi]
- CRPG: a configurable random test-program generator for microprocessorsHaihua Shen, Lin Ma, Heng Zhang. 4171-4174 [doi]
- Optimal allocation of FACTS devices to enhance total transfer capability using evolutionary programmingWeerakorn Ongsakul, Peerapol Jirapong. 4175-4178 [doi]
- Observed hybrid oscillations in an electrical distribution systemVaibhav Donde, Ian A. Hiskens. 4179-4182 [doi]
- Power flow based allocation procedures for voltage security and transmission losses in deregulated power marketsGarng M. Huang, Nirmal-Kumar C. Nair. 4183-4186 [doi]
- Identification of chains of events leading to catastrophic failures of power systemsSatish J. Ranade, Ramchander Kolluru, Joydeep Mitra. 4187-4190 [doi]
- Using genetic algorithms for reliability calculations of complex power systemsNader Samaan, Chanan Singh. 4191-4195 [doi]
- Coordinated static stability margin management of inter-regional electricity systemsWilliam Rosehart, Antony Schellenberg, Laleh Behjat, Pouyan Jazayeri, J. A. Aguado. 4196-4200 [doi]
- An ultrasonic filterbank with spiking neuronsTimothy K. Horiuchi, Hisham Abdalla. 4201-4204 [doi]
- Field test results for low power bearing estimator sensor nodesPedro Julián, Andreas G. Andreou, Gert Cauwenberghs, Milutin Stanacevic, David H. Goldberg, Pablo Sergio Mandolesi, Laurence Riddle, Shihab Shamma. 4205-4208 [doi]
- High-sensitivity capacitive readout system for resonant submicrometer-scale cantilevers based sensorsGabriel Abadal, Jaume Verd, Jordi Teva, Arantxa Uranga, Nuria Barniol, Jaume Esteve, Marta Duch, Francesc Pérez-Murano. 4209-4212 [doi]
- AER EAR: a matched silicon cochlea pair with address event representation interfaceAndré van Schaik, Shih-Chii Liu. 4213-4216 [doi]
- A VLSI model of the bat dorsal nucleus of the lateral lemniscus for azimuthal echolocationRock Z. Shi, Timothy K. Horiuchi. 4217-4220 [doi]
- On the robustness of an analog VLSI implementation of a time encoding machinePeter R. Kinget, Aurel A. Lazar, Laszlo T. Toth. 4221-4224 [doi]
- A computer-based system to analyze neuron imagesXiaoyin Xu, Xiaowei Chen, Kuang-Yu Liu, Jinmin Zhu, Xiaobo Zhou, Stephen T. C. Wong. 4225-4228 [doi]
- Automated dynamic cellular analysis in high throughput drug screensXiaowei Chen, Stephen T. C. Wong. 4229-4232 [doi]
- A post-processing algorithm using histogram-driven anisotropic diffusionSusu Yao, Keng Pang Lim, Xiao Lin, Susanto Rahardja. 4233-4236 [doi]
- A pixel-parallel anisotropic diffusion algorithm for subjective contour generationYoungjae Kim, Takashi Morie. 4237-4240 [doi]
- Translation invariant combined denoising algorithmBirgir Bjorn Saevarsson, Johannes R. Sveinsson, Jon Atli Benediktsson. 4241-4244 [doi]
- A low dropout, CMOS regulator with high PSR over wideband frequenciesVishal Gupta, Gabriel A. Rincón-Mora. 4245-4248 [doi]
- A new 4.3 ppm/°C voltage reference using standard CMOS process with 1V supply voltageQ. X. Zhang, L. Siek. 4249-4252 [doi]
- A sub-1V bandgap reference circuit using subthreshold currentHongchin Lin, Chao-Jui Liang. 4253-4256 [doi]
- Design methods for CMOS low-current finely tunable voltage references covering a wide output rangeSimon Rioux, Alain Lacourse, Yvon Savaria, Michel Meunier. 4257-4260 [doi]
- A new CMOS charge pump for low voltage applicationsMohammad M. Ahmadi, Graham A. Jullien. 4261-4264 [doi]
- A dynamic start-up circuit for low voltage CMOS current mirrors with power-down support4265-4268 [doi]
- A delay line based CMOS time digitizer IC with 13 ps single-shot precisionJussi-Pekka Jansson, Antti Mäntyniemi, Juha Kostamovaara. 4269-4272 [doi]
- Discrete and continuous substrate noise spectrum dependence on digital circuit characteristicsEnrique Barajas, Luis Elvira, Miguel A. Méndez, Ferran Martorell, Diego Mateo, José Luis González. 4273-4276 [doi]
- High voltage tolerant output buffer design for mixed voltage interfacesDebashis Mandal, Pradip Mandal. 4277-4280 [doi]
- A practical BIST circuit for analog portion in deep sub-micron CMOS system LSITakanori Komuro, Naoto Hayasaka, Haruo Kobayashi, Hiroshi Sakayori. 4281-4284 [doi]
- Dither incorporated deterministic dynamic element matching for high resolution ADC test using extremely low resolution DACsHanjun Jiang, Degang Chen, Randall L. Geiger. 4285-4288 [doi]
- A two-step DDEM ADC for accurate and cost-effective DAC testingHanqing Xing, Degang Chen, Randall L. Geiger. 4289-4292 [doi]
- A novel lattice structure of M-channel paraunitary filter banksMorio Ikehara, Yuji Kobayashi. 4293-4296 [doi]
- Multi-plet two-channel perfect reconstruction filter banksS. C. Chan, K. M. Tsui. 4297-4300 [doi]
- Design of 2-channel linear phase filter bank: a lifting approachZhang Lei, Anamitra Makur, Zhu Ce. 4301-4304 [doi]
- A multiplierless filter bank with deep stopband suppression and narrow transition widthJun Wei Lee, Yong Ching Lim. 4305-4308 [doi]
- On a modified structure for cosine-modulated filter banks using the frequency-response masking approachSergio L. Netto, Luiz C. R. de Barcellos, Paulo S. R. Diniz. 4309-4312 [doi]
- Factorization of a class of perfect reconstruction modified DFT filter banks with IIR filtersShishu Yin, Shang Chow Chan. 4313-4316 [doi]
- A new robust Kalman filter algorithm under outliers and system uncertaintiesS. C. Chan, Z. G. Zhang, K. W. Tse. 4317-4320 [doi]
- Adaptive beamforming using uniform concentric circular arrays with frequency invariant characteristicsShing-Chow Chan, H. H. Chen, Ka-Leung Ho. 4321-4324 [doi]
- A unified framework for least square and mean square based adaptive filtering algorithmsZhongkai Zhang, Tamal Bose, Jacob Gunther. 4325-4328 [doi]
- On reduced complexity IIR adaptive filtersMarcelo J. Bruno, Juan E. Cousseau, Pedro D. Donate. 4329-4332 [doi]
- Approximate QR-based algorithms for recursive nonlinear least squares estimationS. C. Chan, Y. Zhou, W. Y. Lau. 4333-4336 [doi]
- A new block exact affine projection algorithm [acoustic echo cancellation system example]Felix Albu, H. K. Kwan. 4337-4340 [doi]
- A programmable floating-gate bump circuit with variable widthSheng-Yu Peng, Bradley A. Minch, Paul E. Hasler. 4341-4344 [doi]
- An integrated circuit chaotic oscillator and its application for high speed random bit generationSerdar Özoguz, Nüfer Yasin Ates, Ahmed S. Elwakil. 4345-4348 [doi]
- A macro-model for the efficient simulation of an ADC-based RNGFabio Pareschi, Gianluca Setti, Riccardo Rovatti. 4349-4352 [doi]
- A low-power wideband frequency doubler in 0.18µm CMOSRizwan Murji, M. Jamal Deen. 4353-4356 [doi]
- Frame layer bit allocation for video transcodingHaiyan Shu, Lap-Pui Chau. 4357-4360 [doi]
- Efficient VLSI architecture for buffer used in EBCOT of JPEG2000 encoderAmit Kumar Gupta, Saeid Nooshabadi, David S. Taubman. 4361-4364 [doi]
- Localized weighted prediction for video codingPeng Yin, Alexis M. Tourapis, Jill M. Boyce. 4365-4368 [doi]
- Frame-layer H.264 rate control improvement using Lagrange multiplier and quantizerMinqiang Jiang, Nam Ling. 4369-4372 [doi]
- Optimal 2 sub-bank memory architecture for bit plane coder of JPEG2000Amit Kumar Gupta, Saeid Nooshabadi, David S. Taubman. 4373-4376 [doi]
- Motion-assisted rate control for ME/MC-based codecs [video coding]Gounyoung Kim, Yeong-Yil Yang, Alexandros Eleftheriadis. 4377-4380 [doi]
- Pulse generator design for UWB IR communication systemsByunghoo Jung, Yi-Hung Tseng, Jackson Harvey, Ramesh Harjani. 4381-4384 [doi]
- Use of source degeneration for non-intrusive BIST of RF front-end circuitsAnand Gopalan, Tejasvi Das, Clyde Washburn, Ponnathpur R. Mukund. 4385-4388 [doi]
- A 1-V fully integrated CMOS frequency synthesizer for 5-GHz WLANHyung-Seuk Kim, Mourad N. El-Gamal. 4389-4392 [doi]
- Power optimized LC VCO and mixer co-designByunghoo Jung, Shubha Bommalingaiahnapallya, Ramesh Harjani. 4393-4396 [doi]
- 2 GHz 8-bit CMOS ROM-less direct digital frequency synthesizerXuefeng Yu, Foster F. Dai, Yin Shi, Ronghua Zhu. 4397-4400 [doi]
- Low-power high-Q NEMS receiver architectureSayfe Kiaei, Shahin Mehdizad Taleie, Bertan Bakkaloglu. 4401-4404 [doi]
- Steganalysis of data hiding in binary text imagesJun Cheng, Alex C. Kot, Jun Liu, Hong Cao. 4405-4408 [doi]
- A blind audio watermarking scheme using peak point extractionFoo Say Wei, Xue Feng, Li Mengyuan. 4409-4412 [doi]
- Robust watermarking of music signals by cepstrum modificationKaliappan Gopalan. 4413-4416 [doi]
- Multipurpose image watermarking in DCT domain using subsamplingFan Gu, Zhe-Ming Lu, Jeng-Shyang Pan. 4417-4420 [doi]
- Programmable matched filter by charge-domain operationShinji Nakamura, Yasuo Nagazumi. 4421-4424 [doi]
- Charge-domain FIR sampler with programmable filtering coefficientsSami Karvonen, Juha Kostamovaara. 4425-4428 [doi]
- Generalized quadrature bandpass sampling with FIR filteringYi-Ran Sun, Svante Signell. 4429-4432 [doi]
- Minimal activity mixed-signal VLSI architecture for real-time linear transforms in videoRafal Karakiewicz, Roman Genov. 4433-4436 [doi]
- A novel approach to the exact design of first- and second-order Bode-type variable-amplitude bilinear-LDI switched-capacitor equalizersBehrouz Nowrouzian, Arthur T. G. Fuller, M. N. S. Swamy. 4437-4440 [doi]
- An adaptive analog synapse circuit that implements the least-mean-square learning ruleVenkatesh Srinivasan, Jeff Dugger, Paul E. Hasler. 4441-4444 [doi]
- Bifurcation in parallel-connected buck converters under current-mode controlC. K. Michael Tse, Octavian Dranga, Herbert H. C. Iu. 4445-4448 [doi]
- Analysis of series-parallel resonant converter with multipliersJianbing Li, Zhongxia Niu, Dongfiang Zhou, Yujie Shi. 4449-4452 [doi]
- Energy optimization of tapered buffers for CMOS on-chip switching power convertersGerard Villar, Eduard Alarcón, Jordi Madrenas, Francesc Guinjoan, Alberto Poveda. 4453-4456 [doi]
- Multi-mode controller CMOS integrated circuit for switching power convertersGerard Villar, Eduard Alarcón, Herminio Martínez, Eva Vidal, Sonia Porta, Francesc Guinjoan, Alberto Poveda. 4457-4460 [doi]
- A multi-level inverter for driving a high voltage displayHirak Patangia, Tandi Wijaya, Dennis Gregory. 4461-4464 [doi]
- From architecture to implementation of a wireless, multiple antenna testbedStephan Lang, Babak Daneshrad. 4465-4468 [doi]
- Nonlinear state-space model of charge-pump based frequency synthesizersTord Johnson, Johnny Holmberg. 4469-4472 [doi]
- Channel estimation for a new high performance MIMO STC-OFDM WLAN systemDinesh Divakaran, Vijay K. Jain. 4473-4476 [doi]
- Novel digital signal processing unit for Ethernet receiverJaehyun Baek, Ju Hyung Hong, Myung Hoon Sunwoo. 4477-4480 [doi]
- Joint compensation of IQ-imbalance and carrier phase synchronization errors in communication receiversEdiz Çetin, Izzet Kale, Richard C. S. Morling. 4481-4484 [doi]
- An all-digital data recovery circuit optimization using Matlab/SimulinkS. I. Ahmed, Tad A. Kwasniewski. 4485-4488 [doi]
- A scalable pipelined complex valued matrix inversion architectureFredrik Edman, Viktor Öwall. 4489-4492 [doi]
- Testing system for measuring and calibrating the transmission power of EDGE mobilesMichael H. F. Leung, Francis C. M. Lau. 4493-4496 [doi]
- Rapid signal acquisition for low-rate carrier-based ultra-wideband impulse radioRyosuke Fujiwara, M. Shida, Akira Maeki, Kenichi Mizugaki, Masaru Kokubo, Masayuki Miyazaki. 4497-4500 [doi]
- On the signed-binary window method [cryptosystem applications]Xiaoyu Ruan, Rajendra S. Katti. 4501-4504 [doi]
- A low-complexity iterative interference suppressor for coded aperiodic spreading CDMA systemsDer-Feng Tseng. 4505-4508 [doi]
- Simulink based model realization for CDMA communication over power linesHideaki Okazaki, Chiho Okazaki, Hirohiko Honda, Takuji Kawamoto. 4509-4512 [doi]
- Architectures for ASIC implementations of low-density parity-check convolutional encoders and decodersRamkrishna Swamy, Stephen Bates, Tyler L. Brandon. 4513-4516 [doi]
- An efficient direct 2-D transform coding IP design for MPEG-4 AVC/H.264Kuan-Hung Chen, Jiun-In Guo, Jinn-Shyan Wang. 4517-4520 [doi]
- Performance-driven optimization for video accelerator design [video coding]Yan-Chen Lu, Chun-Fu Shen, Chi-Kuang Chen, Ju-Lung Fann. 4521-4524 [doi]
- A hardware accelerator for context-based adaptive binary arithmetic decoding in H.264/AVCJian-Wen Chen, Cheng-Ru Chang, Youn-Long Lin. 4525-4528 [doi]
- An AMBA-compliant deblocking filter IP for H.264/AVCSheng-Yu Shih, Cheng-Ru Chang, Youn-Long Lin. 4529-4532 [doi]
- Timer based scheduling control algorithm in WLAN for real-time servicesYuLong Fan, ChingYao Huang, YuRu Hong. 4533-4537 [doi]
- A novel MPEG-4 rate control method with spatial resolution conversion for low bit-rate codingKouji Miyata, Akira Taguchi. 4538-4541 [doi]
- A low-power motion compensation IP core design for MPEG-1/2/4 video decodingChih-Da Chien, Ho-Chun Chen, Lin-Chieh Huang, Jiun-In Guo. 4542-4545 [doi]
- A 3-way SIMD engine for programmable triangle setup in embedded 3D graphics hardwareKyusik Chung, Donghyun Kim, Lee-Sup Kim. 4546-4549 [doi]
- An MPEG-4 IPMPX design and implementation on MPEG-21 test bedChen-Wei Fan, Feng-Cheng Chang, Hsueh-Ming Hang. 4550-4553 [doi]
- VLSI architecture of low memory and high speed 2D lifting-based discrete wavelet transform for JPEG2000 applicationsJen-Shiun Chiang, Chih-Hsien Hsia, Hsin-Jung Chen, Te-Jung Lo. 4554-4557 [doi]
- A new motion compensation design for H.264/AVC decoderSheng-Zen Wang, Ting-An Lin, Tsu-Ming Liu, Chen-Yi Lee. 4558-4561 [doi]
- DCT-domain image registration techniques for compressed videoMing-Sui Lee, Mei-Yin Shen, Akio Yoneyama, C. C. Jay Kuo. 4562-4565 [doi]
- Architectures for analog motion estimation processors: a comparisonMladen Panovic, Andreas Demosthenous. 4566-4569 [doi]
- An 11M-triangles/sec 3D graphics clipping engine for triangle primitivesJaewan Bae, Donghyun Kim, Lee-Sup Kim. 4570-4573 [doi]
- A 33.2M vertices/sec programmable geometry engine for multimedia embedded systemsChang-Hyo Yu, Donghyun Kim, Lee-Sup Kim. 4574-4577 [doi]
- A two-way SIMD-based reconfigurable computing architecture for multimedia applicationsYeong-Kang Lai, Lien-Fei Chen, Jian-Chou Chen, Chun-Wei Chiu. 4578-4581 [doi]
- A new scene change feature for video transcodingHaiyan Shu, Lap-Pui Chau. 4582-4585 [doi]
- A new cubic rate distortion model for low-delay video communicationKam-Fai Lo, Kin-Man Lam. 4586-4589 [doi]
- A robust shot change detection method for content-based retrievalTsung-Han Tsai, Yung-Chien Chen. 4590-4593 [doi]
- TV commercial detection in news program videosJen-Hao Yeh, Jun-Cheng Chen, Jin-Hau Kuo, Ja-Ling Wu. 4594-4597 [doi]
- Autonomous learning of visual concept modelsXiaodan Song, Ching-Yung Lin, Ming-Ting Sun. 4598-4601 [doi]
- A fixed-point 3D graphics library with energy-efficient cache architecture for mobile multimedia systemsMin-wuk Lee, Byeong-Gyu Nam, Ju-Ho Sohn, Namjun Cho, Hyejung Kim, Kwanho Kim, Hoi-Jun Yoo. 4602-4605 [doi]
- A frequency domain equalizer for WLAN 802.11g single-carrier transmission modeFrank H. Hsiao, Terng-Yin Hsu. 4606-4609 [doi]
- Wavelet based fingerprint image enhancementSafar Hatami, Reshad Hosseini, Mahmoud Kamarei, Hossein Ahmadi. 4610-4613 [doi]
- Technology scaling impact on embedded ADC design for telecom receiversJannick Hammel Nielsen, Pietro Andreani, Piero Malcovati, Andrea Baschirotto. 4614-4617 [doi]
- Power consumption issues in high-speed high-resolution pipelined A/D convertersReza Lotfi, Mohammad Taherzadeh-Sani, Omid Shoaei. 4618-4621 [doi]
- A 10-bit 400-MS/s 170 mW 4-times interleaved A/D converter in 0.35µm BiCMOSJaana Riikonen, Mikko Aho, Väinö Hakkarainen, Kari Halonen, Lauri Sumanen. 4622-4625 [doi]
- An embedded 12-bit 80MS/s A/D/A interface for power-line communications in 0.13µm pure digital CMOS technologyManuel Delgado-Restituto, Jesús Ruiz-Amaya, José Manuel de la Rosa, Juan Francisco Fernández-Bootello, Leila Díez, Rocío del Río Fernández, Ángel Rodríguez-Vázquez. 4626-4629 [doi]
- Process tolerant design of N-tone Sigma-Delta convertersShubha Bommalingaiahnapallya, Ramesh Harjani. 4630-4633 [doi]
- A new CAM based S/S/sup -1/-box look-up table in AESHua Li. 4634-4636 [doi]
- An efficient architecture for the AES mix columns operationHua Li, Zachary Friggstad. 4637-4640 [doi]
- A RAM-based FPGA implementation of the 64-bit MISTY1 block cipherParis Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou. 4641-4644 [doi]
- A new RSA encryption architecture and hardware implementation based on optimized Montgomery multiplicationApostolos P. Fournaris, Odysseas G. Koufopavlou. 4645-4648 [doi]
- Efficient multi-prime RSA immune against hardware fault attackYonghong Yang, Z. Abid, Wei Wang, Z. Zhang, C. Yang. 4649-4652 [doi]
- AES crypto chip utilizing high-speed parallel pipelined architectureDeen Kotturi, Seong-Moo Yoo, John Blizzard. 4653-4656 [doi]
- Performance of finite iteration DTCNN with truncated stationary templates [digit recognition example]Christian Merkwirth, Jörg D. Wichard, Maciej Ogorzalek. 4657-4660 [doi]
- An algorithm for predicting the steady state behavior of binary CNNsFernando Corinto, Marco Gilli, Pier Paolo Civalleri. 4661-4664 [doi]
- Global exponential stability analysis of delayed cellular neural networksSibel Senan, Sabri Arik. 4665-4668 [doi]
- On global dynamic behavior of weakly connected cellular nonlinear networksMarco Gilli, Michele Bonnin, Fernando Corinto. 4669-4672 [doi]
- On complete stability of three-cell CNNs with opposite-sign templatesNorikazu Takahashi, Tetsuo Nishi. 4673-4676 [doi]
- Complex dynamics in a class of nearly-symmetric competitive CNNsMauro Di Marco, Mauro Forti, Massimo Grazzini, Luca Pancioni. 4677-4680 [doi]
- Ultra-low power flip-flops for MTCMOS circuitsDavid Levacq, Vincent Dessard, Denis Flandre. 4681-4684 [doi]
- Design techniques for low-power cascaded CML gatesMassimo Alioto, Gaetano Palumbo. 4685-4688 [doi]
- A low-power and high-speed quaternary interconnection link using efficient convertersJean-Marc Philippe, Sébastien Pillement, Olivier Sentieys. 4689-4692 [doi]
- Energy-saving design technique achieved by latched pass-transistor adiabatic logicJunyoung Park, Sung Je Hong, Jong Kim. 4693-4696 [doi]
- A new gate-level body biasing technique for PMOS transistors in subthreshold CMOS circuitsWalid Elgharbawy, Pradeep Golconda, Ashok Kumar, Magdy Bayoumi. 4697-4700 [doi]
- More than two orders of magnitude leakage current reduction in look-up table for FPGAsCanh Quang Tran, Hiroshi Kawaguchi, Takayasu Sakurai. 4701-4704 [doi]
- Generation and properties of new fastest linearly independent transforms over GF(2) with reorderingBogdan J. Falkowski, Cicilia C. Lozano, Susanto Rahardja. 4705-4708 [doi]
- Properties and relations of ternary linearly independent transforms [multivalued logic applications]Bogdan J. Falkowski, Cheng Fu. 4709-4712 [doi]
- Analysis of power consumption in VLSI global interconnectsYoungsoo Shin, Hyung-Ock Kim. 4713-4716 [doi]
- A divide-and-conquer approach to estimating minimum/maximum leakage currentGuang-Wan Liao, Ja-Shong Feng, Rung-Bin Lin. 4717-4720 [doi]
- Synthesis for regularity using decision diagrams [logic IC synthesis and layout]Malgorzata Chrzanowska-Jeske, Alan Mishchenko. 4721-4724 [doi]
- Multiple project wafers for medium-volume IC productionMeng-Chiou Wu, Rung-Bin Lin. 4725-4728 [doi]
- A study on distribution network planning with considering customer s utilization of distributed generatorsKazuhiko Koeda, Hiroshi Sasaki, Teppei Ueyama, Yoshifumi Zoka, Naoto Yorino. 4729-4732 [doi]
- Three-phase power flow for FRIENDS networkYuji Mishima, Kensaku Sugawara, Taiji Satoh, Koichi Nara. 4733-4736 [doi]
- An agent approach to power system distribution networksTakeshi Nagata, Yoshiki Tahara, Hideki Fujita. 4737-4742 [doi]
- A distributed slack bus model and its impact on distribution system application techniquesShiqiong Tong, Michael Kleinberg, Karen Miu. 4743-4746 [doi]
- Variable neighborhood tabu search for capacitor placement in distribution systemsHiroyuki Mori, Shingo Tsunokawa. 4747-4750 [doi]
- A new approach of hierarchical optimization to distribution system service restorationToshiaki Mori, Akio Furuta. 4751-4754 [doi]
- A low-power visual horizon estimation chipTimothy K. Horiuchi. 4755-4758 [doi]
- A spatial variance approach to target tracking with sensor arraysDavid Claveau, Chunyan Wang. 4759-4762 [doi]
- A 8-µW, 0.3-mm:::2::: RF-powered transponder with temperature sensor for wireless environmental monitoringNarrijun Cho, Seong-Jun Song, Jae-Youl Lee, Sunyoung Kim, Shiho Kim, Hoi-Jun Yoo. 4763-4766 [doi]
- FPGA implementation of a CDMA source coding and modulation subsystem for a multiband fluorometer with pattern recognition capabilitiesMounir Boukadoum, Karima Tabari, Abdelhak Bensaoula, David Starikov, El Mostapha Aboulhamid. 4767-4770 [doi]
- A 1V current-mode CMOS active pixel sensorRalf M. Philipp, Ralph Etienne-Cummings. 4771-4774 [doi]
- Sonar echo-location in 2-D using mini-microphone array and spatiotemporal frequency filteringMatthew A. Clapp, Ralph Etienne-Cummings. 4775-4778 [doi]
- Smart bio-laboratories of the futureSee-Kiong Ng. 4779-4782 [doi]
- A conceptual discussion on relationship between vergence and conjugate eye movements on the viewpoint of system and control engineeringXiaolin Zhang. 4783-4786 [doi]
- Dynamic sub-cellular behavior study in high content imaging using a multi-threshold approachXiaobo Zhou, Stephen T. C. Wong. 4787-4790 [doi]
- Cooperative dynamics coordinated by stochastic noise in a multi-cell systemLuonan Chen, Ruiqi Wang, Zhujun Jing, Kazuyuki Aihara. 4791-4794 [doi]
- CMOS readout and control architecture for single-cell real-time microsystemsDiego Ruben Barrettino, Barry Lutz, Maria Elena Martin, Sarah McQuaide, Deirdre R. Meldrum. 4795-4798 [doi]
- A reconfigurable architecture for scanning biosequence databasesTimothy F. Oliver, Bertil Schmidt, Douglas L. Maskell, Achutavarrier Prasad Vinod. 4799-4802 [doi]
- Active-RC channel selection filter tunable from 6 kHz to 18 MHz for software-defined radioJin-Hong Hwang, Mi-Young Lee, Chan-Young Jeong, Changsik Yoo. 4803-4806 [doi]
- A 5 GHz sub-harmonic direct down-conversion mixer for dual-band system in 0.35µm SiGe BiCMOSH. Feng, Q. Wu, X. Guan, R. Zhan, A. Wang, L.-W. Yang. 4807-4810 [doi]
- An optimized 2.4 GHz CMOS LC-tank VCO with 0.55 /V frequency pushing and 516 MHz tuning rangeRam Singh Rana, Xiangdong Zhou, Yong Lian. 4811-4814 [doi]
- A 5GHz to 6GHz integrated differential LNAWei Meng Lim, Han Guo Ma, Manh Anh Do, Kiat Seng Yeo. 4815-4818 [doi]
- A low distortion, current feedback, programmable gain amplifierHuseyin Dinc, Phillip E. Allen, Sudipto Chakraborty. 4819-4822 [doi]
- A high-speed wide-range low-distortion constant-gm cell design for GHz applicationsShengyuan Li, Huseyin Dinc, Susanta Sengupta, Phillip E. Allen. 4823-4826 [doi]
- A low power block-matching analog motion estimation processorMladen Panovic, Andreas Demosthenous. 4827-4830 [doi]
- A cost-effective histogram test-based algorithm for digital calibration of high-precision pipelined ADCsXin Dai, Degang Chen, Randall L. Geiger. 4831-4834 [doi]
- An N/sup th/ order central symmetrical layout pattern for nonlinear gradients cancellationXin Dai, Chengming He, Hanqing Xing, Degang Chen, Randall L. Geiger. 4835-4838 [doi]
- A flexible ADC approach for mixed-signal SoC platformsAthon Zanikopoulos, Pieter Harpe, Hans Hegt, Arthur H. M. van Roermund. 4839-4842 [doi]
- Techniques for sensitizing RF path under SER testJerzy Dabrowski, Javier Gonzalez Bayon. 4843-4846 [doi]
- A 0.18µm-CMOS near-end crosstalk (NEXT) noise canceller utilizing tunable active filters for 4-PAM/20Gbps throughput backplane channelsCarl Chun, Youngsik Hur, Moonkyun Maeng, Hyoungsoo Kim, Soumya Chandramouli, Edward Gebara, Joy Laskar. 4847-4850 [doi]
- Perfect tracking control using multirate control in magnetic levitation systemFeng Li, Kyohei Ishihata, Jianming Lu, Takashi Yahagi. 4851-4854 [doi]
- New graph transformation schemes in graph-based memory allocation method for an indirect addressing DSPNobuhiko Sugino, Tomoyuki Matsuura, Akinori Nishihara. 4855-4858 [doi]
- A complete spurs distribution model for direct digital period synthesizersMax-Elie Salomon, Abdelhakim Khouas, Yvon Savaria. 4859-4862 [doi]
- An evaluation of a hybrid-logarithmic number system DCT/IDCT algorithm [image compression applications]Peter Lee. 4863-4866 [doi]
- Efficient realization for symmetric orthogonal multiwavelet by simple scaling and rotationChun-Yat Ma, Tai-Chiu Hsung, Daniel Pak-Kong Lun. 4867-4870 [doi]
- Integration of image stabilizer with video codec for digital video camerasYu-Chun Peng, Hung-An Chang, Chia-Kai Liang, Homer H. Chen, Chang-Jung Kao. 4871-4874 [doi]
- An all-digital PLL with cascaded dynamic phase average loop for wide multiplication range applicationsPao-Lung Chen, Ching-Che Chung, Chen-Yi Lee. 4875-4878 [doi]
- Fully-differential 13 Gbps clock recovery circuit for OC-255 SONET applicationsWen Tsern Ho, Mourad N. El-Gamal. 4879-4882 [doi]
- Clock and data recovery with adaptive loop gain for spread spectrum SerDes applicationsMing-Ta Hsieh, Gerald E. Sobelman. 4883-4886 [doi]
- A delay compensation technique for n-phase clock generation with 2(N-1) delay unitsXu Chen, Jin Liu. 4887-4890 [doi]
- A family of SiGe quadrature oscillators for microwave applicationsBrian Welch, Jing-Hong Zhan, Kevin Kornegay. 4891-4894 [doi]
- High speed pilot-less sampling frequency acquisition for DMT systemsChing-Chi Chang, Chorng-Kuang Wang. 4895-4898 [doi]
- Approximate stationary density of the nonlinear dynamical systems excited with white noiseSerkan Günel, F. Acar Savaci. 4899-4902 [doi]
- Modified hybrid reduction technique for the simulation of linear/nonlinear mixed circuitsTakashi Mine, Hidemasa Kubota, Atsushi Kamo, Takayuki Watanabe, Hideki Asai. 4903-4906 [doi]
- A method for searching multiple local optimal solutions of nonlinear optimization problemsChikashi Nakazawa, Shinji Kitagawa, Yoshikazu Fukuyama, Hsiao-Dong Chiang. 4907-4910 [doi]
- An efficient homotopy method for finding DC operating points of nonlinear circuitsYu Imai, Kiyotaka Yamamura, Yasuaki Inoue. 4911-4914 [doi]
- SVD-based approximations of bivariate functionsFederico Bizzarri, Marco Storace, Mauro Parodi. 4915-4918 [doi]
- A design method for parallel recursive least square adaptive Volterra filterXueqin Zhao, Jianming Lu, Takashi Yahagi. 4919-4922 [doi]
- A content adaptive de-interlacing algorithm [video signal processing applications]Tak-Song Chong, Oscar C. Au, Wing-San Chau, Tai-Wai Chan. 4923-4926 [doi]
- A low complexity motion compensated frame interpolation methodJiefu Zhai, Keman Yu, Jiang Li, Shipeng Li. 4927-4930 [doi]
- Restoration method of missing areas in still images using GMRF modelTakahiro Ogawa, Miki Haseyama, Hideo Kitajima. 4931-4934 [doi]
- A new homomorphic Bayesian wavelet-based MMAE filter for despeckling SAR imagesMd. Imamul Hassan Bhuiyan, M. Omair Ahmad, M. N. S. Swamy. 4935-4938 [doi]
- An adaptive edge-preserving artifacts removal filter for video post-processingXiaokang Yang, Susu Yao, Keng Pang Lim, Xiao Lin, Susanto Rahardja, Feng Pan. 4939-4942 [doi]
- Bayesian algorithm for video noise reduction in the wavelet domainNikhil Gupta, M. N. S. Swamy, Eugene I. Plotkin. 4943-4946 [doi]
- A 53.3 Mb/s 4×4 16-QAM MIMO decoder in 0.35-µm CMOSZhan Guo, Peter Nilsson. 4947-4950 [doi]
- Adaptive filtering-based iterative channel estimation for MIMO wireless communicationsJongsoo Choi, Tet Hin Yeap, Martin Bouchard. 4951-4954 [doi]
- Performance analysis for MIMO systems using zero forcing detector over Rice fading channelRongtao Xu, Francis C. M. Lau. 4955-4958 [doi]
- Parallelism/regularity-driven MIMO detection algorithm designTong Zhang, Yan Xin, Sizhong Chen. 4959-4962 [doi]
- A new reduced-complexity sphere decoder with true lattice-boundary-awareness for multi-antenna systemsYongtao Wang, Kaushik Roy. 4963-4966 [doi]
- Degradation on the performance of MIMO system under a correlated sub-channels conditionRongtao Xu, Francis C. M. Lau. 4967-4970 [doi]
- Formatted text document data hiding robust to printing, copying and scanningDekun Zou, Yun Q. Shi. 4971-4974 [doi]
- Shadow watermark embedding systemFeng-Hsing Wang, Jeng-Shyang Pan, Lakhmi C. Jain. 4975-4978 [doi]
- Adaptive watermarking using relationships between wavelet coefficientsYueh-Hong Chen, Jun-Min Su, H.-C. Fu, Hsiang-Cheh Huang, Hsiao-Tien Pao. 4979-4982 [doi]
- Layered access control schemes on watermarked scalable mediaFeng-Cheng Chang, Hsiang-Cheh Huang, Hsueh-Ming Hang. 4983-4986 [doi]
- Quantization-based image steganography without data hiding position memorizationYusuke Seki, Hiroyuki Kobayashi, Masaaki Fujiyoshi, Hitoshi Kiya. 4987-4990 [doi]
- Digital watermarking using Walsh code sequences with error spreading technique and intra-pixel predictionShu-Kei Yip, Oscar C. Au. 4991-4994 [doi]
- A novel method of lossy image compression for digital image sensors with Bayer color filter arraysXiang Xie, Guolin Li, Zhihua Wang, Chun Zhang, Dongmei Li, Xiaowen Li. 4995-4998 [doi]
- Realization of card-centric framework: a card-centric computer [smart cards]Chi-Leung San, Chiu-sing Choy, Pak-Kee Chan, Cheong-fat Chan, Kong-Pang Pun. 4999-5002 [doi]
- Error vector magnitude (EVM) measurements for GSM/EDGE applications revised under production conditionsMarkus Helfenstein, Ertan Baykal, Kurt Müller, Alexander Lampe. 5003-5006 [doi]
- A phase locked loop with a mixed mode loop filter for clock/data recovery in optical disc drivesPing-Ying Wang, Hsiang Ji Hsieh, Yung-Yu Lin, Meng-Ta Yang, Hsueh-Wu Kao. 5007-5010 [doi]
- A 3D mouse for interacting with virtual objectsLiang Chen, Charles Grant Brown. 5011-5014 [doi]
- A robust embedded software platform for versatile camera systemsWen-Chung Kao, Tai-Hua Sun, Sheng-Yuan Lin. 5015-5018 [doi]
- Design of an efficient memory-based DVB-T channel decoderYun-Nan Chang. 5019-5022 [doi]
- A new high gain low voltage 1.45 GHz CMOS mixerLu Liu, Zhihua Wang. 5023-5026 [doi]
- A new 5 GHz CMOS dual-modulus prescalerX. P. Yu, Manh Anh Do, Jianguo Ma, Kiat Seng Yeo. 5027-5030 [doi]
- A wide tuning range, 1 GHz-2.5 GHz DLL-based fractional frequency synthesizerPooya Torkzadeh, Armin Tajalli, Seyed Mojtaba Atarodi. 5031-5034 [doi]
- A 23 GHz high isolation sub-harmonic mixerKaixue Ma, Hanguo Ma, Haobin Zhang, Gao Wei. 5035-5038 [doi]
- A current mode 2.4 GHz direct conversion receiverGaurav Chandra, Anant Kamath, Prakash Easwaran. 5039-5042 [doi]
- An integrated pseudo-noise code acquisition processor for WCDMA, CDMA2000 and 802.11b systemsChi-Fang Li, Kuo-Hua Pu, Yuan-Sun Chu. 5043-5046 [doi]
- Derivation of two- and three-branch lumped element codirectional couplers and their frequency characteristicsIwata Sakagami. 5047-5050 [doi]
- Low-complexity adaptive algorithms for pre-distortion of power amplifiersKuan-Hung Chen, Tzi-Dar Chiueh. 5051-5054 [doi]
- A low-power distributed wide-band LNA in 0.18µm CMOSSrikanth Arekapudi, Echere Iroaga, Boris Murmann. 5055-5058 [doi]
- IIP2 calibration methods for current output mixer in direct-conversion receiversJussi Ryynänen, Mikko Hotti, Kari Halonen. 5059-5062 [doi]
- A low power CMOS low noise amplifier for ultra-wideband wireless applicationsChang-Ching Wu, Mei-Fen Chou, Wen-Shen Wuen, Kuei-Ann Wen. 5063-5066 [doi]
- Design of an ultra-wideband low noise amplifier in 0.13µm CMOSYanxin Wang, Jon S. Duster, Kevin T. Kornegay. 5067-5070 [doi]
- Modeling of MOS varactors and characterizing the tuning curve of a 5-6 GHz LC VCOPedram Sameni, Chris Siu, Shahriar Mirabbasi, Hormoz Djahanshahi, Marwa Hamour, Krzysztof Iniewski, Jatinder Chana. 5071-5074 [doi]
- Ultra low power RF section of a passive microwave RFID transponder in 0.35µm BiCMOSGiuseppe de Vita, Giuseppe Iannaccone. 5075-5078 [doi]
- A 0.8 V 5.9 GHz wide tuning range CMOS VCO using inversion-mode bandswitching varactorsChung-Yu Wu, Chi-Yao Yu. 5079-5082 [doi]
- Modeling power amplifiers with antenna mismatchTroels Studsgaard Nielsen, Saska Lindfors, Shady Shawky Tawfik, Torben Larsen. 5083-5086 [doi]
- A gigahertz wideband CMOS multiplier for UWB transceiverLei Zhou, Yong Ping Xu, Fujiang Lin. 5087-5090 [doi]
- A high-frequency phase-compensation fractional-N frequency synthesizerChing-Yuan Yang, Jen-Wen Chen, Meng-Ting Tsai. 5091-5094 [doi]
- A 13.56 MHz RFID transponder front-end with merged load modulation and voltage doubler-clamping rectifier circuitsYunlei Li, Jin Liu. 5095-5098 [doi]
- A 6-10-GHz ultra-wideband tunable LNAYang-Chaun Chen, Chien-Nan Kuo. 5099-5102 [doi]
- Accurate performance prediction of multi-GHz CML with data run-length variationsSripriya R. Bandi, Clyde Washburn, P. R. Mukund, Jan Kolnik, Minxuan Liu, Ken Paradis, Steve Howard, Jeff Burleson. 5103-5106 [doi]
- A wideband CMOS LNA design approachReza Molavi, Shahriar Mirabbasi, Majid Hashemi. 5107-5110 [doi]
- A low-power CMOS power amplifier for ultra wideband (UWB) applicationsSajay Jose, Hyung-Jin Lee, Dong Sam Ha, Sangsung Choi. 5111-5114 [doi]
- A new gain controllable on-chip active balun for 5 GHz direct conversion receiverMallesh Rajashekharaiah, Parag Upadhyaya, Deuk Hyoun Heo, Yi-Jan Emery Chen. 5115-5118 [doi]
- Development of the FES system with neural network + PID controller for the strokeYu-Luen Chen, Weoi-Luen Chen, Chin-Chih Hsiao, Te-Son Kuo, Jin-Shin Lai. 5119-5121 [doi]
- Noisy speech recognition by hierarchical recurrent neural fuzzy networksChia-Feng Juang, Chyi-Tian Chiou, Hao-Jung Huang. 5122-5125 [doi]
- Thunderstorm tracking system using neural networks and measured electric fields from few field millsJigme Singye, Katsumi Masugata, Tadakuni Murai, Iwao Kitamura, Honda Kontani. 5126-5129 [doi]
- Neuro-sliding mode control for magnetic levitation systemsJiunshian Phuah, Jianming Lu, Muhammad Yasser, Takashi Yahagi. 5130-5133 [doi]
- A new time-variant neural based approach for nonstationary and non-linear system identificationAlessio Titti, Stefano Squartini, Francesco Piazza. 5134-5137 [doi]
- Natural gradient for minor component extractionMohammed A. Hasan. 5138-5141 [doi]
- Exploiting application locality to design fast, low power, low complexity neural classifiersCesare Alippi, Fabio Scotti. 5142-5145 [doi]
- Neural network handoff in shadow-Rayleigh fadingRaungrong Suleesathira, Sunisa Kunarak. 5146-5149 [doi]
- Form specifies function: robust spike-based computation in analog VLSI without precise synaptic weightsDylan R. Muir, Giacomo Indiveri, Rodney J. Douglas. 5150-5153 [doi]
- Hardware-based support vector machine classification in logarithmic number systemsFaisal M. Khan, Mark G. Arnold, William M. Pottenger. 5154-5157 [doi]
- Fuzzy logic based handover in MC-CDMA systemLinlin Yang, Zhenan Huang, Wenbo Wang. 5158-5161 [doi]
- Intelligent ultra fast charger for Ni-Cd batteriesPhanom Petchjatuporn, Phinyo Wicheanchote, Noppadol Khaehintung, Wiwat Kiranon, Khamron Sunat, Sirapat Chiewchanwattana. 5162-5165 [doi]
- Extending SystemC to support mixed discrete-continuous system modeling and simulationAlain Vachoux, Christoph Grimm, Karsten Einwich. 5166-5169 [doi]
- IBMG: interpretable behavioral model generator for nonlinear analog circuits via canonical form functions and genetic programmingTrent McConaghy, Georges G. E. Gielen. 5170-5173 [doi]
- Behavioural modeling and simulation of a switched-current phase locked loopPeter Wilson, Reuben Wilcock. 5174-5177 [doi]
- Modeling and simulation of mixed signal systems using a multi-lingual simulatorGabriel Popescu, Leonid B. Goldgeisser. 5178-5181 [doi]
- Behavioural modelling, simulation, test and diagnosis of MEMS using ANNsVanco B. Litovski, Mark Zwolinski, Miona Andrejevic. 5182-5185 [doi]
- Ascend: automatic bottom-up behavioral modeling tool for analog circuitsH. Alan Mantooth, Xiaoling Huang, Yucheng Feng, W. Zheng. 5186-5189 [doi]
- Multiple-lifting scheme: memory-efficient VLSI implementation for line-based 2-D DWTChih-Chi Cheng, Chao-Tsung Huang, Po-Chih Tseng, Chia-Ho Pan, Liang-Gee Chen. 5190-5193 [doi]
- Multi-Gbit/sec low density parity check decoders with reduced interconnect complexityAhmad Darabiha, Anthony Chan Carusone, Frank R. Kschischang. 5194-5197 [doi]
- A partial parallel algorithm and architecture for arithmetic encoder in JPEG2000Yijun Li, Mohamed A. Elgamel, Magdy A. Bayoumi. 5198-5201 [doi]
- CAM-based VLSI architecture for Huffman coding with real-time optimization of the code word table [image coding example]Takeshi Kumaki, Yasuto Kuroda, Tetsushi Koide, Hans Jürgen Mattausch, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Kazunori Saito. 5202-5205 [doi]
- Encoding circuits for low power optical on-chip communicationsMauro Olivieri, Francesco Pappalardo 0002, Giuseppe Visalli. 5206-5209 [doi]
- Error-tolerant FIR filters based on low-cost residue codesJosé L. Rodríguez-Navarro, Michael Gansen, Tobias G. Noll. 5210-5213 [doi]
- Climbing obstacles via bio-inspired CNN-CPG and adaptive attitude controlPaolo Arena, Luigi Fortuna, Mattia Frasca, Luca Patané, M. Pavone. 5214-5217 [doi]
- Recent results on the prediction of EEG signals in epilepsy by discrete-time cellular neural networks (DTCNN)Christian Niederhöfer, Ronald Tetzlaff. 5218-5221 [doi]
- Retina model with real time implementationDávid Bálya, Botond M. Roska. 5222-5225 [doi]
- Towards an implantable ultra-low power biochemical signal processor for blood and tissue monitoringLeila Shepherd, Chris Toumazou. 5226-5229 [doi]
- Self-organized cortical map formation by guiding connectionsStanley Y. M. Lam, Bertram Emil Shi, Kwabena Boahen. 5230-5233 [doi]
- An efficient model for performance analysis of asynchronous pipeline design methodsMorteza Gholipour, Hamid Shojaee, Ali Afzali-Kusha, Ahmad Khademzadeh, Mehrdad Nourani. 5234-5237 [doi]
- Low energy asynchronous architecturesIlya Obridko, Ran Ginosar. 5238-5241 [doi]
- Convergent micro-pipelines: a versatile operator for mixed asynchronous-synchronous computationsValentin Gies, Thierry M. Bernard, Alain Mérigot. 5242-5245 [doi]
- Measurement of delay mismatch due to process variations by means of modified ring oscillatorsBo Zhou, Abdelhakim Khouas. 5246-5249 [doi]
- A memory controller that reduces latency of cached SDRAMSeiji Miura, Satoru Akiyama. 5250-5253 [doi]
- Concurrent algorithm for high-speed point multiplication in elliptic curve cryptographyJun-Hong Chen, Ming-Der Shieh, Chien-Ming Wu. 5254-5257 [doi]
- Energy-efficient CMOS large-load driver circuit with the complementary adiabatic/bootstrap (CAB) technique for low-power TFT-LCD system applicationsG. Y. Liu, N. C. Wang, J. B. Kuo. 5258-5261 [doi]
- Opcode encoding for low power embedded systemsA. Pouladi, Saeid Nooshabadi. 5262-5265 [doi]
- Circuit-level power efficiency investigation of advanced DSP architectures based on a specialized power modeling techniqueMauro Olivieri, Mirko Scarana, Simone Smorfa. 5266-5269 [doi]
- A runtime auto scalable power-efficient instruction-cache designTay Teng Tiow, Zhu Xiaoping. 5270-5273 [doi]
- Low power commutator for pipelined FFT processorsWei Han, Ahmet T. Erdogan, Tughrul Arslan, M. Hasan. 5274-5277 [doi]
- A low-power scan-path architectureMohammad Alisafaee, Safar Hatami, Ehsan Atoofian, Zainalabedin Navabi, Ali Afzali-Kusha. 5278-5281 [doi]
- Extension of observability analysis to Hachtel s augmented matrix [power system analysis applications]Bei Gou. 5282-5285 [doi]
- A smooth power flow model of electric power system with generator reactive power limits taken into considerationYoshihiko Kataoka. 5286-5289 [doi]
- Optimal procurement of VAR ancillary service in the electricity market considering voltage securityElsaid Elsayed El-Araby, Naoto Yorino, Yoshifumi Zoka. 5290-5293 [doi]
- Unsolvable power flow - restoring solutions of the electric power network equationsLuciano V. Barboza, André Arthur Perleberg Lerm, Roberto S. Salgado. 5294-5297 [doi]
- Damping improvement through tuning controller limits of a series FACTS deviceJung-Wook Park, Ian A. Hiskens. 5298-5301 [doi]
- Applications of operational transconductance amplifier in power system analog emulationQingyan Liu, Chika O. Nwankpa. 5302-5305 [doi]
- A low power CMOS imager based on time-to-first-spike encoding and fair AERChen Shoushun, Amine Bermak. 5306-5309 [doi]
- Self-powered active pixel sensors for ultra low-power applicationsAlexander Fish, Shy Hamami, Orly Yadid-Pecht. 5310-5313 [doi]
- A 128×128 floating gate imager with self-adapting fixed pattern noise reductionEric Liu Wong, Pamela Abshire, Marc H. Cohen. 5314-5317 [doi]
- A 80µW/frame 104×128 CMOS imager front end for JPEG compressionAbhishek Bandyopadhyay, Jungwon Lee, Ryan W. Robucci, Paul E. Hasler. 5318-5321 [doi]
- A CMOS image sensor for focal plane decompositionZhiqiang Lin, Michael W. Hoffman, Walter D. Leon-Salas, Nathan Schemm, Sina Balkir. 5322-5325 [doi]
- CMOS image sensor with watermarking capabilitiesGraham R. Nelson, Graham A. Jullien, Orly Yadid-Pecht. 5326-5329 [doi]
- Field test of the world first 200 Mbps PLC modemsTakashi Matsuo, Shuji Maekawa. 5330-5332 [doi]
- QoS technologies on AV/CE-oriented wireless home networkYoshihiro Ohtani, Susumu Kitaguchi, Toru Ueda, Toru Chiba. 5333-5336 [doi]
- Is home network application acceptable or not?Ikuo Keshi, Yumi Shiraishi, Hiroaki Niwamoto, Minoru Okada, Heiichi Yamamoto. 5337-5340 [doi]
- New architecture of realizing seamless connectivity and cooperative control for home network systemsH. Ikebe, K. Ogawa, H. Takernura, Y. Hatayama. 5341-5344 [doi]
- 3D sound movement system for embedded applicationsTomoya Matsumura, Nobuyuki Iwanaga, Takao Onoye, Wataru Kobayashi, Isao Shirakawa, Itthichai Arungsrisangchai. 5345-5348 [doi]
- SH-mobile - low power application processor for cellular [3G cellular phones]S. Kamae, Takahiro Irita, A. Tsukimori, S. Tarnaki, Toshihiro Hattori, Shinichi Yoshioka. 5349-5352 [doi]
- A wide-band low-noise amplifier with double loop feedbackMiguel A. Martins, Koen van Hartingsveldt, Chris J. M. Verhoeven, Jorge R. Fernandes. 5353-5356 [doi]
- An interference rejection filter for an ultra-wideband quadrature downconversion autocorrelation receiverSumit Bagga, Sandro A. P. Haddad, Koen van Hartingsveldt, Simon Lee, Wouter A. Serdijn, John R. Long. 5357-5360 [doi]
- A read-out strategy and circuit design for high frequency MEMS resonatorsArantxa Uranga, Nuria Barniol, Humberto Campanella, PinedaJaume Esteve Tintó, Lluís Terés, Zachary Davis. 5361-5364 [doi]
- A low-power switched-current CDMA matched filter employing MOS-linear matching cell and output A/D converterTomoyuki Nakayama, Toshihiko Yamasaki, Tadashi Shibata. 5365-5368 [doi]
- A re-configurable high-speed CMOS track and latch comparator with rail-to-rail input for IF digitization [software radio receiver applications]Holly Pekau, Lee Hartley, James W. Haslett. 5369-5372 [doi]
- Fast-switching adaptive bandwidth frequency synthesizer using a loop filter with switched zero-resistor arraySreenath Thoka, Randall L. Geiger. 5373-5376 [doi]
- Fully integrated charge sensitive amplifier for readout of micromechanical capacitive sensorsMikko Saukoski, Lasse Aaltonen, Teemu Salo, Kari Halonen. 5377-5380 [doi]
- Fully integrated charge pump for high voltage excitation of a bulk micromachined gyroscopeMikko Saukoski, Lasse Aaltonen, Kari Halonen. 5381-5384 [doi]
- Flexible high-accuracy wide-range gas sensor interface for portable environmental nosing purposeMarco Grassi, Piero Malcovati, Andrea Baschirotto. 5385-5388 [doi]
- Adaptive sensor response correction using analog filter compatible with digital technology [load cell sensor applications]Mehdi Jafaripanah, Bashir M. Al-Hashimi, Neil M. White. 5389-5392 [doi]
- A modular RC-active network for vibration damping in piezo-electro-mechanical beamsMassimo Panella, Maurizio Paschero, Fabio Massimo Frattale Mascioli. 5393-5396 [doi]
- Cost effective high voltage driver for large channel count optical MEMS switch applicationsYuan Ma, Xiqun Zhu, Robert W. Newcomb. 5397-5400 [doi]
- Face segmentation based on Hue-Cr components and morphological techniqueTeerayoot Sawangsri, Vorapoj Patanavijit, Somchai Jitapunkul. 5401-5404 [doi]
- A combined interpolatorless interpolation and high accuracy sampling process for digital class D amplifiersVictor Adrian, Bah-Hwee Gwee, Joseph Sylvester Chang. 5405-5408 [doi]
- Time-delay direction finding based on canonical correlation analysis [electronic warfare applications]Gaoming Huang, Luxi Yang, Zhenya He. 5409-5412 [doi]
- DWT domain multi-matcher on-line signature verification systemIsao Nakanishi, Hiroyuki Sakamoto, Yoshio Itoh, Yutaka Fukui. 5413-5416 [doi]
- Digital system for detection and classification of electrical eventsAugusto Santiago Cerqueira, Carlos Augusto Duque, Rogério Marques Trindade, M. V. Ribeiro. 5417-5420 [doi]
- Tap selection based MMSE equalization for high data rate UWB communication systemsZhiwei Lin, A. Benjamin Premkumar, A. S. Madhukumar. 5421-5424 [doi]
- Design of UWB pulses based on B-splinesMitsuhiro Matsuo, Masaru Kamada, Hiromasa Habuchi. 5425-5428 [doi]
- Optimizing vertical common subexpression elimination using coefficient partitioning for designing low complexity software radio channelizersA. Prasad Vinod, Edmund Ming-Kit Lai. 5429-5432 [doi]
- A BPSK demodulator circuit using an anti-parallel synchronization loopYou Zheng, Carlos E. Saavedra. 5433-5436 [doi]
- Novel systolic array architecture for the decorrelator using conjugate gradient for least squares algorithmArchana Chidanandan, Magdy A. Bayoumi. 5437-5440 [doi]
- An efficient pre-traceback approach for Viterbi decoding in wireless communicationYao Gang, Tughrul Arslan, Ahmet T. Erdogan. 5441-5444 [doi]
- Bifurcation analysis of on-chip LC VCOsMarcus Prochaska, Wolfgang Mathis, Alexander Belski. 5445-5448 [doi]
- A scalable DCO design for portable ADPLL designsChia-Tsun Wu, Wei Wang, I-Chyn Wey, An-Yeu Wu. 5449-5452 [doi]
- A 2.5GHz phase-switching PLL using a supply controlled 2-delay-stage 10GHz ring oscillator for improved jitter/mismatchEva Tatschl-Unterberger, Sasan Cyrusian, Michael Ruegg. 5453-5456 [doi]
- A 360° extended range phase detector for type-I PLLsCameron T. Charles, David J. Allstot. 5457-5460 [doi]
- A two-chip, 4-MHz, microelectromechanical reference oscillatorKrishnakumar Sundaresan, Paul S. Ho, Siavash Pourkamali, Farrokh Ayazi. 5461-5464 [doi]
- A study of injection locking in ring oscillatorsBehzad Mesgarzadeh, Atila Alvandpour. 5465-5468 [doi]
- One-pass computation-aware motion estimation with adaptive search strategyYu-Wen Huang, Chia-Lin Lee, Ching-Yeh Chen, Liang-Gee Chen. 5469-5472 [doi]
- A framework for fine-granular computational-complexity scalable motion estimation [real-time video coding applications]Zhi Yang, Hua Cai, Jiang Li. 5473-5476 [doi]
- Fast sub-pixel inter-prediction - based on texture direction analysis (FSIP-BTDA) [video coding applications]Hoi-Ming Wong, Oscar C. Au, Andy Chang. 5477-5480 [doi]
- Efficient search and mode prediction algorithms for motion estimation in H.264/AVCGwo-Long Li, Mei-Juan Chen, Hung-Ju Li, Ching-Ting Hsu. 5481-5484 [doi]
- Efficient video motion estimation using dual-cross search algorithmsXuan-Quang Banh, Yap-Peng Tan. 5485-5488 [doi]
- Rapid block-matching motion estimation using modified diamond search algorithmXiaoquan Yi, Nam Ling. 5489-5492 [doi]
- Current mode multi-level simultaneous bidirectional I/O scheme for chip-to-chip communicationsGe Yang, Yong Sin Kim, Sung-Mo Kang. 5493-5496 [doi]
- Algorithm for peak to average power ratio reduction operating at symbol rateStefano Marsili. 5497-5500 [doi]
- A 3.5-Gb/s CMOS burst-mode laser driver with automatic power control using single power supplyDay-Uei Li, Li-Ren Huang, Chia-Ming Tsai. 5501-5504 [doi]
- Common-mode stability in low-power LO driversSvetoslav Radoslavov Gueorguiev, Saska Lindfors, Torben Larsen. 5505-5508 [doi]
- An application-level methodology to guide the design of intelligent-processing, power-aware passive RFIDsCesare Alippi, Giovanni Vanini. 5509-5512 [doi]
- On the implementation of 128-pt FFT/IFFT for high-performance WPANC. Huggett, K. Maharatna, K. Paul. 5513-5516 [doi]
- Near-perfect cover image recovery anti-multiple watermark embedding approachesChao-Yong Hsu, Chun-Shien Lu. 5517-5520 [doi]
- Privacy preserving data mining with unidirectional interactionChai Wah Wu. 5521-5524 [doi]
- Progressive scrambling for MP3 audioWei-Gang Fu, Wei-Qi Yan, Mohan S. Kankanhalli. 5525-5528 [doi]
- Averaging attack resilient video fingerprintingIn Koo Kang, Choong-Hoon Lee, Hae-Yeoun Lee, Jong-Tae Kim, Heung-Kyu Lee. 5529-5532 [doi]
- Multimedia data encryption via random rotation in partitioned bit streamsDahua Xie, C. C. Jay Kuo. 5533-5536 [doi]
- A new visual cryptography using natural imagesHyoung Joong Kim, Yongsoo Choi. 5537-5540 [doi]
- Digital self-correction of time-interleaved ADCsPieter Harpe, Athon Zanikopoulos, Arthur H. M. van Roermund. 5541-5544 [doi]
- Automated design of a 10-bit, 80MSPS WLAN DAC for linearity and low-areaA. Seedher, Preetam Tadeparthy, K. A. S. Satheesh, V. T. Anuroop. 5545-5548 [doi]
- An analog-to-digital converter with Golomb-Rice output codesWalter D. Leon, Sina Balkir, Khalid Sayood, Michael W. Hoffman. 5549-5552 [doi]
- 10-bit programmable voltage-output digital-analog converterErhan Ozalevli, Christopher M. Twigg, Paul E. Hasler. 5553-5556 [doi]
- A background correction technique for timing errors in time-interleaved analog-to-digital convertersEchere Iroaga, Boris Murmann, L. Y. Nathawad. 5557-5560 [doi]
- Feedforward-type parasitic capacitance canceler and its application to 4 Gb/s T/H circuitTakahide Sato, Shigetaka Takagi, Nobuo Fujii, Yasuyuki Hashimoto, Kohji Sakata, Hiroyuki Okada. 5561-5564 [doi]
- Synthesis of hybrid filter banks by global frequency domain least square solvingTudor Petrescu, Jacques Oksman, Pierre Duhamel. 5565-5568 [doi]
- Implementation of a novel read-out strategy based on a Wilkinson ADC for a 16×16 pixel X-ray detector arrayVincenzo Ferragina, Piero Malcovati, Fausto Borghetti, A. Rossini, Franco Ferrari, Nicoletta Ratti, Giuseppe Bertuccio. 5569-5572 [doi]
- A 12-B 10-msamples/s CMOS switched-current delta-sigma modulatorGuo-Ming Sung, Kuo-Hsuan Chang, Wen-Sheng Lin. 5573-5576 [doi]
- A 1.5V multirate multibit sigma delta modulator for GSM/WCDMA in a 90 nm digital CMOS processOguz Altun, Jinseok Koh, Phillip E. Allen. 5577-5580 [doi]
- Time-interleaved multirate sigma-delta modulatorsFrancisco Colodro Ruiz, Antonio B. Torralba, Marta Laguna Garcia. 5581-5584 [doi]
- A direct synthesis method of cascaded continuous-time sigma-delta modulatorsRamon Tortosa Navas, José Manuel de la Rosa Utrera, Ángel Rodríguez-Vázquez, Francisco Vidal Fernández Fernández. 5585-5588 [doi]
- A sixth-order subsampling continuous-time bandpass delta-sigma modulatorYuan Chen, Kei-Tee Tiew. 5589-5592 [doi]
- High-order single-loop double-sampling sigma-delta modulator topologies for broadband applicationsMohammad Yavari, Omid Shoaei. 5593-5596 [doi]
- Adaptive processing applied to the design of highly digital analog interfacesAdão Antônio de Souza Jr., Luigi Carro, Jawad Tousaad. 5597-5600 [doi]
- Spurious tone free digital delta-sigma modulator design for DC inputsMaciej Borkowski, Juha Kostamovaara. 5601-5604 [doi]
- Towards a rigorous formulation of the space mapping technique for engineering designSlawomir Koziel, John W. Bandler, Kaj Madsen. 5605-5608 [doi]
- Behavioral modeling simulation and high-level synthesis of pipeline A/D convertersJesús Ruiz-Amaya, José Manuel de la Rosa Utrera, Manuel Delgado-Restituto, Ángel Rodríguez-Vázquez. 5609-5612 [doi]
- Delay modeling of CMOS/CPL logic circuitsYuanzhong Wan, Maitham Shams. 5613-5616 [doi]
- Ground bounce calculation due to simultaneous switching in deep sub-micron integrated circuitsMohammad Hekmat, Shahriar Mirabbasi, Majid Hashemi. 5617-5620 [doi]
- Model-compiler based efficient statistical circuit analysis: an industry case study of a 4 GHz/6-bit ADC/DAC/DEMUX ASICBo Hu, Zhao Li, Lili Zhou, C.-J. Richard Shi, Kwang-Hyun Baek, Myung-Jun Choe. 5621-5624 [doi]
- A high-level dynamic-error model of a pipelined analog-to-digital converterK. Folkesson, C. Svensson, B. Knuthammar, A. Dreyfert. 5625-5628 [doi]
- An explorative tile-based technique for automated constraint transformation, placement and routing of high frequency analog filtersHui Zhang, Preethi Karthik, Hua Tang, Alex Doboli. 5629-5632 [doi]
- A formal approach to the slack driven scheduling problem in high-level synthesisShih-Hsu Huang, Chun-Hua Cheng. 5633-5636 [doi]
- Design of MOS current mode logic gates - computing the limits of voltage swing and bias currentG. Caruso. 5637-5640 [doi]
- Interconnect delay optimization via high level re-synthesis after floorplanningYunfeng Wang, Jinian Bian, Xianlong Hong. 5641-5644 [doi]
- Using symbolic computer algebra for subexpression factorization and subexpression decomposition in high level synthesisXianwu Xing, Ching-Chuen Jong. 5645-5648 [doi]
- BDD decomposition for mixed CMOS/PTL logic circuit synthesisYen-Tai Lai, Yung-Chuan Jiang, Hong-Ming Chu. 5649-5652 [doi]
- FPGA technology mapping optimization by rewiring algorithmsWai-Chung Tang, Wing-Hang Lo, Yu-Liang Wu, Shih-Chieh Chang. 5653-5656 [doi]
- A physically-derived large-signal nonquasi-static MOSFET model for computer aided device and circuit simulation part-II the CMOS NOR gate and the CMOS NAND gateMichael Walter Payton, Fat Duen Ho. 5657-5661 [doi]
- Domain fault model and coverage metric for SoC verificationLuo Chun, Yang Jun, Gao Gugang, Shi Longxing. 5662-5665 [doi]
- Validation analysis and test flow optimization of VLSI chipYanzhuo Tan, Yinhe Han, Xiaowei Li, Feiyin Lu, Yuchuan Chen. 5666-5669 [doi]
- Deterministic and low power BIST based on scan slice overlappingJi Li, Yinhe Han, Xiaowei Li. 5670-5673 [doi]
- Modeling and formal verification of dataflow graph in system-level design using Petri netTsung-Hsi Chiang, Lan-Rong Dung, Ming-Feng Yaung. 5674-5677 [doi]
- A robust and correct computation for the curvilinear routing problemTan Yan, Haruna Murata. 5678-5681 [doi]
- Estimating likelihood of correctness for error candidates to assist debugging faulty HDL designsTai-Ying Jiang, Chien-Nan Jimmy Liu, Jing Ya Jou. 5682-5685 [doi]
- Instruction-based delay fault self-testing of pipelined processor coresVirendra Singh, Michiko Inoue, Kewal K. Saluja, Hideo Fujiwara. 5686-5689 [doi]
- Gradient-based methods for simultaneous blind separation of mixed source signalsSanqing Hu, Derong Liu, Huaguang Zhang. 5690-5693 [doi]
- Blind identification of brain mechanism in MEGKuniharu Kishida. 5694-5697 [doi]
- Chaotic signal separation from a linear mixtureBao-Yun Wang, Wei Xing Zheng. 5698-5701 [doi]
- Blind identification of MIMO channels with periodic modulationChing-An Lin, Yi-Sheng Chen. 5702-5705 [doi]
- Blind low rate multiuser detection for multirate multicarrier CDMA systems using antenna arrayYiwen Zhang, Qinye Yin, Le Ding, Ronghai Sun. 5706-5709 [doi]
- DOA-matrix decoder for STBC-MC-CDMA systems over frequency-selective channelYanxing Zeng, Qinye Yin, Le Ding, Yinkuo Meng, Ying Zhang. 5710-5713 [doi]
- An ICA based approach for blind deconvolution of three-dimensional signalsE. Principi, Stefano Squartini, Francesco Piazza. 5714-5717 [doi]
- Evaluating a blind channel estimation technique that uses a hardware efficient equalizerYun Ye, Saman S. Abeysekera. 5718-5721 [doi]
- A consideration of blind source separation using wavelet transformNoriyuki Hirai, Hiroki Matsumoto, Toshihiro Furukawa, Kiyoshi Furuya. 5722-5725 [doi]
- An approach for nonlinear blind source separation of signals with noise using neural networks and higher-order cumulantsNuo Zhang, Xiaowei Zhang, Jianming Lu, Takashi Yahagi. 5726-5729 [doi]
- Subband blind equalization using wavelet filter banksAmir Minayi Jalil, Hamidreza Amindavar, Farshad Almasganj. 5730-5733 [doi]
- Audio source separation by source localization with Hilbert spectrumM. Khademul Islam Molla, Keikichi Hirose, Nobuaki Minematsu. 5734-5737 [doi]
- Uplink channel estimation for space-time block coded multiple-input multiple-output MC-CDMA systemsKe Deng, Qinye Yin, Hongbo Tian. 5738-5741 [doi]
- An alternative natural gradient approach for multichannel blind deconvolutionMassimo Tomassoni, Stefano Squartini, Francesco Piazza. 5742-5745 [doi]
- Decision feedback equalizer with the blind matched filter estimationIzzet Ozcelik, Izzet Kale, Buyurman Baykal. 5746-5749 [doi]
- Integrated blind electronic equalizer for fiber dispersion compensationFoster F. Dai, Shengfang Wei, Richard D. Jaeger. 5750-5753 [doi]
- Linear and nonlinear macromodels for power/signal integrityStefano Grivet-Talocia, Igor S. Stievano, Ivan A. Maio, Flavio G. Canavero. 5754-5757 [doi]
- Delay extraction from frequency domain data for causal macro-modeling of passive networksRohan Mandrekar, Madhavan Swaminathan. 5758-5761 [doi]
- Passive approximation of tabulated frequency-data by Fourier expansion methodYuichi Tanji, Hidemasa Kubota. 5762-5765 [doi]
- Noise generation, coupling, isolation, and EM radiation in high-speed package and PCBJoungho Kim, Junso Pak, Jongbae Park, Hyungsoo Kim. 5766-5769 [doi]
- Accurate and closed-form SPICE compatible passive macromodels for distributed interconnects with frequency dependent parametersNatalie Nakhla, Ramachandra Achar, Michel S. Nakhla. 5770-5773 [doi]
- Modeling of power distribution networks with signal lines for SPICE simulatorsTakayuki Watanabe, Hideki Asai. 5774-5777 [doi]
- Scheduling algorithm for partially parallel architecture of LDPC decoder by matrix permutationIn-Cheol Park, Se-Hyeon Kang. 5778-5781 [doi]
- Quantized LDPC decoder design for binary symmetric channelsRohit Singhal, Gwan S. Choi, Rabi N. Mahapatra. 5782-5785 [doi]
- Low complexity, high speed decoder architecture for quasi-cyclic LDPC codesZhongfeng Wang, Qing-Wei Jia. 5786-5789 [doi]
- An analog/digital mode-switching LDPC codecDavid Haley, Chris Winstead, Vincent C. Gaudet, Alex J. Grant, Christian Schlegel. 5790-5793 [doi]
- Digital VLSI OFDM transceiver architecture for wireless SoC designWei-Hsiang Tseng, Ching-Chi Chang, Chorng-Kuang Wang. 5794-5797 [doi]
- A one-quadrant discrete-time cellular neural network CMOS chip for pixel-level snakesVictor M. Brea, Mika Laiho, David López Vilariño, Ari Paasio, Diego Cabello. 5798-5801 [doi]
- Various implementations of topographic, sensory, cellular wave computersÁkos Zarándy, Péter Földesy, Péter Szolgay, Szabolcs Tõkés, Csaba Rekeczky, Tamás Roska. 5802-5805 [doi]
- Implementation of SIMD vision chip with 128×128 array of analogue processing elementsPiotr Dudek. 5806-5809 [doi]
- Dynamically coupled multi-layer mixed-mode CNNMika Laiho, Ari Paasio. 5810-5813 [doi]
- Spatiotemporal pattern formation in the ACE16k CNN chipMustak E. Yalcin, Johan A. K. Suykens, Joos Vandewalle. 5814-5817 [doi]
- CNN wave based computation for robot navigation on ACE16KPaolo Arena, Luigi Fortuna, Mattia Frasca, Guido Vagliasindi, Adriano Basile. 5818-5821 [doi]
- A single-chip FPGA design for real-time ICA-based blind source separation algorithmCharoensak Charayaphan, Farook Sattar. 5822-5825 [doi]
- Design and FPGA implementation of finite Ridgelet transform [image processing applications]Isa Servan Uzun, Abbes Amira. 5826-5829 [doi]
- A novel metric representation for low-complexity log-MAP decoderByonghyo Shim, Hyung G. Myung. 5830-5833 [doi]
- Gradient pile up for edge detection on hardwareLeticia V. Guimaraes, André Borin Soares, Viviane Cordeiro, Altamiro Amadeu Susin. 5834-5837 [doi]
- Area-efficient systolic architectures for inversions over GF(2/sup m/)Zhiyuan Yan, Dilip V. Sarwate, Zhongzhi Liu. 5838-5841 [doi]
- A speech recognizer with selectable model parametersWei Han, Cheong-fat Chan, Chiu-sing Choy, Kong-Pang Pun. 5842-5845 [doi]
- Reconfigurable multiple scan-chains for reducing test application time of SOCsJiann-Chyi Rau, Chih-Lung Chien, Jia-Shing Ma. 5846-5849 [doi]
- The improvement for transaction level verification functional coverageWang Zhong-hai, Ye Yi-zheng. 5850-5853 [doi]
- Parallely testable design for detection of neighborhood pattern sensitive faults in high density DRAMsJu Yeob Kim, Sung Je Hong, Jong Kim. 5854-5857 [doi]
- Efficient power model for crossbar interconnectsB. Afkal, Ali Afzali-Kusha, Mahmoud El Nokali. 5858-5861 [doi]
- Coupling reduction analysis of bus-invert codingRung-Bin Lin. 5862-5865 [doi]
- Energy and latency evaluation of NoC topologiesMárcio Eduardo Kreutz, César A. M. Marcon, Luigi Carro, Altamiro Amadeu Susin, Ney Laert Vilar Calazans. 5866-5869 [doi]
- An adaptive super-exponential deflation algorithm for blind deconvolution of MIMO systems using the matrix pseudo-inversion lemmaKiyotaka Kohno, Yujiro Inouye, Mitsuru Kawamoto. 5870-5873 [doi]
- Filterbank-based blind signal separation with estimated sound directionHyung-Min Park, Chandra Shekhar Dhir, Do-Kwan Oh, Soo-Young Lee. 5874-5877 [doi]
- Blind signal separation into groups of dependent signals using joint block diagonalizationFabian J. Theis. 5878-5881 [doi]
- Blind extraction of a dominant source from mixtures of many sources using ICA and time-frequency maskingHiroshi Sawada, Shoko Araki, Ryo Mukai, Shoji Makino. 5882-5885 [doi]
- Independent arrays or independent time courses for gene expression time seriesSookjeong Kim, Seungjin Choi. 5886-5889 [doi]
- Blind separation of a class of nonlinear ICA modelsJan Eriksson, Visa Koivunen. 5890-5893 [doi]
- A novel application specific network protocol for wireless sensor networksJichuan Zhao, Ahmet T. Erdogan, Tughrul Arslan. 5894-5897 [doi]
- High-efficiency power amplifier for wireless sensor networksDevrim Yilmaz Aksin, Stefano Gregori, Franco Maloberti. 5898-5901 [doi]
- A new switched capacitor circuit for parallel-pixel image processing [vision sensor integrated signal processing]Nicola Viarani, Nicola Massari, Massimo Gottardi. 5902-5905 [doi]
- Broadband dielectric spectroscopy CMOS readout circuit for molecular sensingYoungbok Kim, Anuj Agarwal, Sameer R. Sonkusale. 5906-5909 [doi]
- Read-out circuit in RT-fluxgateSalvatore Baglio, Vincenzo Sacco, Adi R. Bulsara. 5910-5913 [doi]
- Integrated interface circuits for chemiresistor arraysCarina K. Leung, Denise M. Wilson. 5914-5917 [doi]
- SHD movie distribution system using image container with 4096×2160 pixel resolution and 36 bit colorTetsuro Fujii, Kazuhiro Shirakawa, Mitsuru Nomura, Takahiro Yamaguchi. 5918-5921 [doi]
- An implementation of JPEG 2000 interactive image communication systemJunichi Hara. 5922-5925 [doi]
- Designing and packaging technology of Renesas SIPNoriaki Sakamoto, Norihiko Sugita, Takafumi Kikuchi, Hideki Tanaka, Takashi Akazawa. 5926-5929 [doi]
- System LSI design with C-based behavioral synthesis and verificationKazutoshi Wakabayashi. 5930-5933 [doi]
- Approach for physical design in sub-100 nm eraHiroo Masuda, Shin-ichi Ohkawa, Masakazu Aoki. 5934-5937 [doi]
- An advance RTL to GDS2 design methodology for 90 nm and below system LSIs to solve timing closure, signal integrity and design for manufacturingNobuyuki Nishiguchi. 5938-5941 [doi]
- CMOS high-linear wide-dynamic range RF on-chip filters using Q-enhanced LC filtersShengyuan Li, Susanta Sengupta, Huseyin Dinc, Phillip E. Allen. 5942-5945 [doi]
- 70 MHz CMOS gm-C IF filterMuhammad S. Qureshi, Phillip E. Allen. 5946-5949 [doi]
- Voltage-mode high-order OTA-only-without-C low-pass (from 215 M to 705 M Hz) and band-pass (from 214 M to 724 M Hz) filter structureChun-Ming Chang. 5950-5953 [doi]
- Application of reverse-active npns for compact, wide-tuning f/sub T/-integration-based filters in SiGe HBT BiCMOS technologyPhanumas Khumsat, Apisak Worapishet. 5954-5957 [doi]
- A 2 V 0.25µm CMOS 250 MHz fully-differential seventh-order equiripple linear phase LF filterMasood ul-Hasan, Yichuang Sun. 5958-5961 [doi]
- Analysis of traveling wave and transversal analog adaptive equalizersShanthi Pavan, Shankar Shivappa. 5962-5965 [doi]
- Rules for systematic synthesis of all-transistor analogue circuits by admittance matrix expansionPhil Corbishley, David G. Haigh. 5966-5969 [doi]
- Fast iterative method package for high frequency circuits analysisSomsak Akatimagool. 5970-5973 [doi]
- Mixed signal and SoC design flow requirementsTuna B. Tarim. 5974-5977 [doi]
- Analog VLSI circuit-level synthesis using multi-placement structuresRaoul F. Badaoui, Ranga Vemuri. 5978-5981 [doi]
- Improved modeling of sigma-delta modulator non-idealities in SimulinkAndrea Fornasari, Piero Malcovati, Franco Maloberti. 5982-5985 [doi]
- Analysis of supply and ground noise sensitivity in ring and LC oscillatorsVolodymyr Kratyuk, Igor Vytyaz, Un-Ku Moon, Kartikeya Mayaram. 5986-5989 [doi]
- Multichannel SVD-based image de-noisingYodchanan Wongsawat, K. R. Rao, Soontorn Oraintara. 5990-5993 [doi]
- Analysis of nonlinear residual echo suppressors for telecommunications [voice communication applications]Woon S. Gan, Sen M. Kuo. 5994-5997 [doi]
- SMF robust filtering in impulsive noiseLi Guo, Yih-Fang Huang. 5998-6001 [doi]
- Modelling of high-order mechanical plate vibration systems by multidimensional wave digital filtersChien-Hsun Tseng, Stuart Lawson. 6002-6005 [doi]
- A cost-effective memory-based real-valued FFT and Hermitian symmetric IFFT processor for DMT-based wire-line transmission systemsHsiang-Feng Chi, Zhao-Hong Lai. 6006-6009 [doi]
- Defining correlation functions and power spectra for multirate random processesCharles W. Therrien. 6010-6013 [doi]
- Pilot tone design for peak-to-average power ratio reduction in OFDMShinji Hosokawa, Shuichi Ohno, Kok Ann Donny Teo, Takao Hinamoto. 6014-6017 [doi]
- High-speed and low-power design of parallel turbo decoderZhiyong He, Sébastien Roy, Paul Fortier. 6018-6021 [doi]
- Efficient view maintenance in wireless networks [mobile database view maintenance applications]Huaizhong Lin, Bo Zhou, Zengwei Zheng, Chun Chen. 6022-6025 [doi]
- Digital signal processing engine design for polar transmitter in wireless communication systemsHung Yang Ko, Yi-Chiuan Wang, An-Yeu Wu. 6026-6029 [doi]
- A novel technique for I/Q imbalance and CFO compensation in OFDM systemsJui-Yuan Yu, Ming-Fu Sun, Terng-Yin Hsu, Chen-Yi Lee. 6030-6033 [doi]
- Architectural issues in base-station frequency synthesizersSankaran Aniruddhan, David J. Allstot. 6034-6037 [doi]
- Integral observer approach for chaos synchronization with transmission disturbancesGuo-Ping Jiang, Wei Xing Zheng, Wallace Kit-Sang Tang, Guanrong Chen. 6038-6041 [doi]
- Synchronizing chaotic Colpitts circuits adaptively with parameter mismatches and channel distortionsCheng Shen, Zhiguo Shi, Lixin Ran. 6042-6045 [doi]
- Synchronization in an array of chaotic systems coupled via a directed graphChai Wah Wu. 6046-6049 [doi]
- A subtle link in switched dynamical systems: saddle-node bifurcation meets border collisionYue Ma, Hiroshi Kawakami, Chi K. Michael Tse, Takuji Kousaka. 6050-6053 [doi]
- Bifurcation and transitional dynamics in asymmetrical two-coupled oscillators with hard type nonlinearityTakuya Yoshimura, Kuniyasu Shimizu, Tetsuro Endo. 6054-6057 [doi]
- Bifurcations in modified BVP neurons connected by inhibitory and electrical couplingShigeki Tsuji, Tetsushi Ueta, Hiroshi Kawakami, Kazuyuki Aihara. 6058-6061 [doi]
- Error sensitivity testing for the MC-EZBC scalable wavelet video coderTamer Shanableh, Tony May. 6062-6065 [doi]
- A model-based rate allocation mechanism for wavelet-based embedded image and video codingYa-Hui Yu, Chun-Jen Tsai. 6066-6069 [doi]
- Optimal resynchronization for layered video over wireless channelTao Fang, Lap-Pui Chau. 6070-6073 [doi]
- Sub-sequence video coding for improved temporal scalabilityDong Tian, Miska M. Hannuksela, Moncef Gabbouj. 6074-6077 [doi]
- Scalable multiview video coding using waveletWenxian Yang, Feng Wu, Yan Lu, Jianfei Cai, King Ngi Ngan, Shipeng Li. 6078-6081 [doi]
- Stereo video coding system with hybrid coding based on joint prediction schemeLi-Fu Ding, Shao-Yi Chien, Yu-Wen Huang, Yu-Lin Chang, Liang-Gee Chen. 6082-6085 [doi]
- A generalized semi-blind channel estimation for pilot-aided OFDM systemsKa-yau Ho, Shu Hung Leung. 6086-6089 [doi]
- Jitter limitations on multi-carrier modulationJan H. Rutger Schrader, Eric A. M. Klumperink, Jan L. Visschers, Bram Nauta. 6090-6093 [doi]
- Estimating the fading coefficient in mobile OFDM systems using state-space modelVisa Koivunen, Mihai Enescu. 6094-6097 [doi]
- Block-wise adaptive modulation for OFDM WLAN systemsYin-Tsung Hwang, Chen-Yu Tsai, Cheng-Chen Lin. 6098-6101 [doi]
- A hybrid space-time and collaborative coding scheme for wireless communicationsM. Ma, E. Masoud, Y. Sun, John M. Senior. 6102-6105 [doi]
- An analog modulator/demodulator using a programmable arbitrary waveform generatorRavi Chawla, Christopher M. Twigg, Paul E. Hasler. 6106-6109 [doi]
- A novel low-cost high-performance VLSI architecture for MPEG-4 AVC/H.264 CAVLC decodingHsiu-Cheng Chang, Chien-Chang Lin, Jiun-In Guo. 6110-6113 [doi]
- A hardware-based predictive motion estimation algorithmSaku Hamalainen, Lauri Koskinen, Kari Halonen. 6114-6117 [doi]
- A multiplication-accumulation computation unit with optimized compressors and minimized switching activitiesLi-Hsun Chen, Oscal T.-C. Chen, Teng-Yi Wang, Yung-Cheng Ma. 6118-6121 [doi]
- A cost-effective media processor for embedded applications [audio decoder example]Wen-Kai Huang, I-Ting Lin, Shi-Wei Chen, Ing-Jer Huang. 6122-6125 [doi]
- Design and implementation of a new cryptographic system for multimedia transmissionJui-Cheng Yen, Hun-Chen Chen, Shu-Meng Wu. 6126-6129 [doi]
- Low-cost implementation of a super-resolution algorithm for real-time video applicationsSebastián López, Gustavo Marrero Callicó, José Francisco López, Roberto Sarmiento, Antonio Núñez. 6130-6133 [doi]
- A 0.35µm CMOS comparator circuit for high-speed ADC applicationsSamad Sheikhaei, Shahriar Mirabbasi, André Ivanov. 6134-6137 [doi]
- A 4-bit 5 GS/s flash A/D converter in 0.18µm CMOSSamad Sheikhaei, Shahriar Mirabbasi, André Ivanov. 6138-6141 [doi]
- A low-power 4-b 2.5 Gsample/s pipelined flash analog-to-digital converter using differential comparator and DCVSPG encoderShailesh Radhakrishnan, Mingzhen Wang, Chien-In Henry Chen. 6142-6145 [doi]
- A 1.2 GHz adaptive floating gate comparator with 13-bit resolutionYanyi Liu Wong, Marc H. Cohen, Pamela Abshire. 6146-6149 [doi]
- An 8-bit 160 MS/s folding-interpolating ADC with optimized active averaging/interpolating networkHamid Movahedian, Meysam Azin, Mehrdad Sharif Bakhtiar. 6150-6153 [doi]
- Offset compensation in flash ADCs using floating-gate circuitsPhilomena C. Brady, Paul E. Hasler. 6154-6157 [doi]
- A novel approach for implementing ultra-high speed flash ADC using MCML circuitsDinh Hung Dang, Yvon Savaria, Mohamad Sawan. 6158-6161 [doi]
- A 1.8 V 3.2µW comparator for use in a CMOS imager column-level single-slope ADCMartijn F. Snoeij, Albert J. P. Theuwissen, Johan H. Huijsing. 6162-6165 [doi]
- Design considerations of a floating-point ADC with embedded S/HJohan Piper, Jiren Yuan. 6166-6169 [doi]
- A new CCII-based pipelined analog to digital converterYuh-Shyan Hwang, Lu-Po Liao, Chia-Chun Tsai, Wen-Ta Lee, Trong-Yen Lee, Jiann-Jong Chen. 6170-6173 [doi]
- A 12 bits/200 MHz resolution/sampling/power-optimized ADC in 0.25µm SiGe BiCMOSQ. Wu, A. Wang. 6174-6177 [doi]
- A low power pipelined analog-to-digital converter using series sampling capacitorsSeongHwan Cho, Sungmin Ock, Sang-Hoon Lee, Joon-Suk Lee. 6178-6181 [doi]
- A generic multilevel multiplying D/A converter for pipelined ADCsVivek Sharma, Un-Ku Moon, Gabor C. Temes. 6182-6185 [doi]
- A 10-bit algorithmic A/D converter for cytosensor applicationThirumalai Rengachari, Vivek Sharma, Gabor C. Temes, Un-Ku Moon. 6186-6189 [doi]
- An adaptive, truly background calibration method for high speed pipeline ADC designDegang Chen, Zhongjun Yu, Randall L. Geiger. 6190-6193 [doi]
- The realization of a mismatch-free and 1.5-bit over-sampling pipelined ADCShigeto Tanaka, Yuji Gohda, Yasuhiro Sugimoto. 6194-6197 [doi]
- An 800 Mbps system interconnect modeling and simulation for high speed computingMohammad S. Sharawi, Daniel N. Aloi. 6198-6201 [doi]
- Ternary Walsh transformBogdan J. Falkowski, Shixing Yan. 6202-6205 [doi]
- A post layout watermarking method for IP protectionTingyuan Nie, Tomoo Kisaka, Masahiko Toyonaga. 6206-6209 [doi]
- Rapid and precise instruction set evaluation for application specific processor designMasayuki Masuda, Kazuhito Ito. 6210-6213 [doi]
- Modem floorplanning with abutment and fixed-outline constraintsChang-Tzu Lin, De-Sheng Chen, Yi-Wen Wang, Hsin-Hsien Ho. 6214-6217 [doi]
- Modeling of MOS transistors based on genetic algorithm and simulated annealingMohammad Taherzadeh-Sani, Ali Abbasian, Behnam Amelifard, Ali Afzali-Kusha. 6218-6221 [doi]
- VLSI block placement with alignment constraints based on corner block listSong Chen, Xianlong Hong, Sheqin Dong, Yuchun Ma, Chung-Kuan Cheng. 6222-6225 [doi]
- Multiobjective VLSI cell placement using distributed simulated evolution algorithmSadiq M. Sait, Ali Mustafa Zaidi, Mustafa I. Ali. 6226-6229 [doi]
- A divide-and-conquer 2.5-D floorplanning algorithm based on statistical wirelength estimationZhuoyuan Li, Xianlong Hong, Qiang Zhou, Yici Cai, Jinian Bian, Hannal Yang, Prashant Saxena, Vijay Pitchumani. 6230-6233 [doi]
- A new congestion and crosstalk aware routerChin-Hui Wang, Yung-Ching Chen, Tsai-Ming Hsieh, Chih-Hung Lee, Hsin-Hsiung Huang. 6234-6237 [doi]
- Fast integer linear programming based models for VLSI global routingLaleh Behjat, Andy Chiang. 6238-6243 [doi]
- Floorplanning with clock tree estimationChih-Hung Lee, Chin-Hung Su, Shih-Hsu Huang, Chih-Yuan Lin, Tsai-Ming Hsieh. 6244-6247 [doi]
- Segmented channel routing with pin rearrangements via satisfiabilityFei He, William N. N. Hung, Xiaoyu Song, Ming Gu, Jiaguang Sun. 6248-6251 [doi]
- An automatic face recognition system based on wavelet transformsAbbes Amira, Peter Farrell. 6252-6255 [doi]
- Hardware realization of panoramic camera with speaker-oriented face extraction for teleconferencingYukinori Nagase, Takahiko Yamamoto, Takao Kawamura, Kazunori Sugahara. 6256-6259 [doi]
- A novel content-adaptive interpolationTai-Wai Chan, Oscar C. Au, Tak-Song Chong, Wing-San Chau. 6260-6263 [doi]
- Arbitrary scale image enlargement with the prediction of high frequency componentsShuai Yuan, Akira Taguchi, Masayuki Kawamata. 6264-6267 [doi]
- Restoration from image degraded by white noise based on iterative spectral subtraction methodT. Kobayashi, T. Shimamura, T. Hosoya, Y. Takahashi. 6268-6271 [doi]
- Compensation of errors generated by an analog 2D DCTKati Virtanen, N. Pankaala, Ari Paasio. 6272-6275 [doi]
- An optimal tone reproduction curve operator for the display of high dynamic range imagesGuoping Qiu, Jiang Duan. 6276-6279 [doi]
- The FIR filter bank with given analysis filters that minimizes various worst-case measures of error at the same timeYuichi Kida, Takuro Kida. 6280-6283 [doi]
- Directionally weighted color interpolation for digital camerasHung-An Chang, Homer H. Chen. 6284-6287 [doi]
- A novel color interpolation algorithm by pre-estimating minimum square errorJhing-Fa Wang, Chien-Shun Wang, Han-Jen Hsu. 6288-6291 [doi]
- A random-valued impulse noise detector using level detectionNoritaka Yamashita, Munenori Ogura, Jianming Lu, Hiroo Sekiya, Takashi Yahagi. 6292-6295 [doi]
- Super-resolution image restoration from blurred observationsAndy C. Yau, N. K. Bose, Michael K. Ng. 6296-6299 [doi]
- A nearest neighbor graph based watershed algorithmWei-Chih Shen, Ruey-Feng Chang. 6300-6303 [doi]
- JPEG 2000 encryption enabling fine granularity scalability without decryptionBin B. Zhu, Shipeng Li, Yang Yang. 6304-6307 [doi]
- DSVD: a tensor-based image compression and recognition methodKohei Inoue, Kiichi Urahama. 6308-6311 [doi]
- Approximate treatment for calculation of the rate-distortion slope in EBCOTYue-xin Zhu, Nan-Ning Zheng, Jing Zhang, Zong-ze Wu. 6312-6315 [doi]
- A simplified algorithm of JPEG2000 rate control for VLSI implementationXing Qin, Xiaolang Yan, Haitong Ge, Ye Yang. 6316-6319 [doi]
- Quality improvement technique for JPEG images with fractal image codingMegumi Takezawa, Hirofumi Sanada, Kazuhisa Watanabe, Miki Haseyama. 6320-6323 [doi]
- A scalable encryption method allowing backward compatibility with JPEG2000 imagesOsamu Watanabe, Akiko Nakazaki, Hitoshi Kiya. 6324-6327 [doi]
- Lossless implementation of Motion JPEG2000 integrated with invertible deinterlacingTakuma Ishida, Shogo Muramatsu, Hisakazu Kikuchi. 6328-6331 [doi]
- Improved fast encoding method for vector quantization based on subvector techniqueZhibin Pan, Koji Kotani, Tadahiro Ohmi. 6332-6335 [doi]